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powerpc: mpc8xx: Change CONFIG_8xx to CONFIG_MPC8xx

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CONFIG_8xx doesn't mean much outside of arch/powerpc/
This patch renames it CONFIG_MPC8xx just like CONFIG_MPC85xx etc ...
It also renames 8xx_immap.h to immap_8xx.h to be consistent with
other file names.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
This commit is contained in:
Christophe Leroy 2018-03-16 17:20:41 +01:00 committed by Tom Rini
parent 0ebb5388b4
commit ee1e600c13
19 changed files with 24 additions and 24 deletions
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2
api/api_platform-powerpc.c
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@ -30,7 +30,7 @@ int platform_sys_info(struct sys_info *si)
si->clk_bus = gd->bus_clk;
si->clk_cpu = gd->cpu_clk;
#if defined(CONFIG_8xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
#if defined(CONFIG_MPC8xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
#define bi_bar bi_immr_base
#elif defined(CONFIG_MPC83xx)
#define bi_bar bi_immrbar

2
arch/powerpc/Kconfig
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@ -30,7 +30,7 @@ config MPC86xx
select SYS_FSL_DDR_BE
imply CMD_REGINFO
config 8xx
config MPC8xx
bool "MPC8xx"
imply CMD_REGINFO

2
arch/powerpc/cpu/mpc8xx/Kconfig
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@ -1,5 +1,5 @@
menu "mpc8xx CPU"
depends on 8xx
depends on MPC8xx
config SYS_CPU
default "mpc8xx"

2
arch/powerpc/cpu/mpc8xx/immap.c
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@ -12,7 +12,7 @@
#include <common.h>
#include <command.h>
#include <asm/8xx_immap.h>
#include <asm/immap_8xx.h>
#include <commproc.h>
#include <asm/iopin_8xx.h>
#include <asm/io.h>

6
arch/powerpc/include/asm/cache.h
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@ -7,7 +7,7 @@
#include <asm/processor.h>
/* bytes per L1 cache line */
#if defined(CONFIG_8xx)
#if defined(CONFIG_MPC8xx)
#define L1_CACHE_SHIFT 4
#elif defined(CONFIG_PPC64BRIDGE)
#define L1_CACHE_SHIFT 7
@ -72,7 +72,7 @@ void disable_cpc_sram(void);
#define L2CACHE_NONE 0x03 /* NONE */
#define L2CACHE_PARITY 0x08 /* Mask for L2 Cache Parity Protected bit */
#ifdef CONFIG_8xx
#ifdef CONFIG_MPC8xx
/* Cache control on the MPC8xx is provided through some additional
* special purpose registers.
*/
@ -139,6 +139,6 @@ static inline void wr_dc_adr(uint val)
mtspr(DC_ADR, val);
}
#endif
#endif /* CONFIG_8xx */
#endif /* CONFIG_MPC8xx */
#endif

2
arch/powerpc/include/asm/global_data.h
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@ -19,7 +19,7 @@ struct arch_global_data {
u8 sdhc_adapter;
#endif
#endif
#if defined(CONFIG_8xx)
#if defined(CONFIG_MPC8xx)
unsigned long brg_clk;
#endif
#if defined(CONFIG_CPM2)

0
arch/powerpc/include/asm/8xx_immap.h → arch/powerpc/include/asm/immap_8xx.h
View File

2
arch/powerpc/include/asm/iopin_8xx.h
View File

@ -11,7 +11,7 @@
#define _ASM_IOPIN_8XX_H_
#include <linux/types.h>
#include <asm/8xx_immap.h>
#include <asm/immap_8xx.h>
#include <asm/io.h>
#ifdef __KERNEL__

4
arch/powerpc/include/asm/ppc.h
View File

@ -13,8 +13,8 @@
#ifndef __ASSEMBLY__
#if defined(CONFIG_8xx)
#include <asm/8xx_immap.h>
#if defined(CONFIG_MPC8xx)
#include <asm/immap_8xx.h>
#endif
#ifdef CONFIG_MPC86xx
#include <mpc86xx.h>

2
cmd/bdinfo.c
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@ -180,7 +180,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
print_bi_flash(bd);
print_num("sramstart", bd->bi_sramstart);
print_num("sramsize", bd->bi_sramsize);
#if defined(CONFIG_8xx) || defined(CONFIG_E500)
#if defined(CONFIG_MPC8xx) || defined(CONFIG_E500)
print_num("immr_base", bd->bi_immr_base);
#endif
print_num("bootflags", bd->bi_bootflags);

2
configs/MCR3000_defconfig
View File

@ -1,6 +1,6 @@
CONFIG_PPC=y
CONFIG_SYS_TEXT_BASE=0x4000000
CONFIG_8xx=y
CONFIG_MPC8xx=y
CONFIG_TARGET_MCR3000=y
CONFIG_8xx_GCLK_FREQ=132000000
CONFIG_CMD_IMMAP=y

2
drivers/net/Kconfig
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@ -331,7 +331,7 @@ config RENESAS_RAVB
config MPC8XX_FEC
bool "Fast Ethernet Controller on MPC8XX"
depends on 8xx
depends on MPC8xx
select MII
help
This driver implements support for the Fast Ethernet Controller

2
drivers/serial/Kconfig
View File

@ -624,7 +624,7 @@ config ZYNQ_SERIAL
config MPC8XX_CONS
bool "Console driver for MPC8XX"
depends on 8xx
depends on MPC8xx
default y
choice

2
drivers/spi/Kconfig
View File

@ -276,7 +276,7 @@ config LPC32XX_SSP
config MPC8XX_SPI
bool "MPC8XX SPI Driver"
depends on 8xx
depends on MPC8xx
help
Enable support for SPI on MPC8XX

2
include/asm-generic/u-boot.h
View File

@ -37,7 +37,7 @@ typedef struct bd_info {
unsigned long bi_dsp_freq; /* dsp core frequency */
unsigned long bi_ddr_freq; /* ddr frequency */
#endif
#if defined(CONFIG_8xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
#if defined(CONFIG_MPC8xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
unsigned long bi_immr_base; /* base of IMMR register */
#endif
#if defined(CONFIG_M68K)

2
include/commproc.h
View File

@ -16,7 +16,7 @@
#ifndef __CPM_8XX__
#define __CPM_8XX__
#include <asm/8xx_immap.h>
#include <asm/immap_8xx.h>
/* CPM Command register.
*/

4
include/mpc8xx.h
View File

@ -81,7 +81,7 @@
#define TBSCR_TBIRQ2 0x0400 /* Time Base Interrupt Request 2 */
#define TBSCR_TBIRQ1 0x0200 /* Time Base Interrupt Request 1 */
#define TBSCR_TBIRQ0 0x0100 /* Time Base Interrupt Request 0 */
#if 0 /* already in asm/8xx_immap.h */
#if 0 /* already in asm/immap_8xx.h */
#define TBSCR_REFA 0x0080 /* Reference Interrupt Status A */
#define TBSCR_REFB 0x0040 /* Reference Interrupt Status B */
#define TBSCR_REFAE 0x0008 /* Second Interrupt Enable A */
@ -95,7 +95,7 @@
*/
#undef PISCR_PIRQ /* TBD */
#define PISCR_PITF 0x0002 /* Periodic Interrupt Timer Freeze */
#if 0 /* already in asm/8xx_immap.h */
#if 0 /* already in asm/immap_8xx.h */
#define PISCR_PS 0x0080 /* Periodic interrupt Status */
#define PISCR_PIE 0x0004 /* Periodic Interrupt Enable */
#define PISCR_PTE 0x0001 /* Periodic Timer Enable */

6
include/ppc_asm.tmpl
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@ -81,7 +81,7 @@
#define r30 30
#define r31 31
#if defined(CONFIG_8xx)
#if defined(CONFIG_MPC8xx)
/* Some special registers */
@ -93,10 +93,10 @@
#define LCTRL2 157 /* Load/Store Support (37-41) */
#define ICTRL 158
#endif /* CONFIG_8xx */
#endif /* CONFIG_MPC8xx */
#if defined(CONFIG_8xx)
#if defined(CONFIG_MPC8xx)
/* Registers in the processor's internal memory map that we use.
*/

2
include/watchdog.h
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@ -73,7 +73,7 @@ int init_func_watchdog_reset(void);
*/
/* MPC 8xx */
#if defined(CONFIG_8xx) && !defined(__ASSEMBLY__)
#if defined(CONFIG_MPC8xx) && !defined(__ASSEMBLY__)
void reset_8xx_watchdog(immap_t __iomem *immr);
#endif