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soc/fsl-layerscape: Update SVR number for LS2081A and LS2041A

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Update SVR as per the SOC document.
 -LS2081A: 0x870919 -> 0x870918
 -LS2041A: 0x870915 -> 0x870914

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Santan Kumar 2017-06-09 11:48:08 +05:30 committed by York Sun
parent e478307918
commit ec8a7d7743
2 changed files with 4 additions and 4 deletions
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4
arch/arm/include/asm/arch-fsl-layerscape/soc.h
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@ -65,8 +65,8 @@ struct cpu_type {
#define SVR_LS2084A 0x870910
#define SVR_LS2048A 0x870920
#define SVR_LS2044A 0x870930
#define SVR_LS2081A 0x870919
#define SVR_LS2041A 0x870915
#define SVR_LS2081A 0x870918
#define SVR_LS2041A 0x870914
#define SVR_DEV_LS2080A 0x8701

4
drivers/pci/pcie_layerscape.h
View File

@ -118,8 +118,8 @@
#define SVR_LS2084A 0x870910
#define SVR_LS2048A 0x870920
#define SVR_LS2044A 0x870930
#define SVR_LS2081A 0x870919
#define SVR_LS2041A 0x870915
#define SVR_LS2081A 0x870918
#define SVR_LS2041A 0x870914
/* LS1021a PCIE space */
#define LS1021_PCIE_SPACE_OFFSET 0x4000000000ULL