Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-marvell into next
- Enable CONFIG_TIMER for all Kirkwood / MVEBU boards (Stefan) - u-boot-spl.kwb/SPL: Add / improve size limit setup / detection (Pali) - mvebu: theadorable: Misc updates in defconfig und dts (Stefan)
This commit is contained in:
commit
ebdd6afa54
1
Makefile
1
Makefile
@ -1474,6 +1474,7 @@ endif
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|||||||
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||||||
u-boot-spl.kwb: u-boot.bin spl/u-boot-spl.bin FORCE
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u-boot-spl.kwb: u-boot.bin spl/u-boot-spl.bin FORCE
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||||||
$(call if_changed,mkimage)
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$(call if_changed,mkimage)
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$(BOARD_SIZE_CHECK)
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||||||
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u-boot.sha1: u-boot.bin
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u-boot.sha1: u-boot.bin
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tools/ubsha1 u-boot.bin
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tools/ubsha1 u-boot.bin
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@ -627,6 +627,7 @@ config ARCH_KIRKWOOD
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select BOARD_EARLY_INIT_F
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select BOARD_EARLY_INIT_F
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select CPU_ARM926EJS
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select CPU_ARM926EJS
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select GPIO_EXTRA_HEADER
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select GPIO_EXTRA_HEADER
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select TIMER
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config ARCH_MVEBU
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config ARCH_MVEBU
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bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
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bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
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@ -638,6 +639,8 @@ config ARCH_MVEBU
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select GPIO_EXTRA_HEADER
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select GPIO_EXTRA_HEADER
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select SPL_DM_SPI if SPL
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select SPL_DM_SPI if SPL
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select SPL_DM_SPI_FLASH if SPL
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select SPL_DM_SPI_FLASH if SPL
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select SPL_TIMER if SPL
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select TIMER
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select OF_CONTROL
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select OF_CONTROL
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select OF_SEPARATE
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select OF_SEPARATE
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select SPI
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select SPI
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@ -648,6 +651,7 @@ config ARCH_ORION5X
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select CPU_ARM926EJS
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select CPU_ARM926EJS
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select GPIO_EXTRA_HEADER
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select GPIO_EXTRA_HEADER
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select SPL_SEPARATE_BSS if SPL
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select SPL_SEPARATE_BSS if SPL
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select TIMER
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config TARGET_STV0991
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config TARGET_STV0991
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bool "Support stv0991"
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bool "Support stv0991"
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@ -233,8 +233,11 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
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tegra210-p3450-0000.dtb
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tegra210-p3450-0000.dtb
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ifdef CONFIG_ARMADA_32BIT
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ifdef CONFIG_ARMADA_32BIT
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ifdef CONFIG_ARMADA_375
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dtb-$(CONFIG_ARCH_MVEBU) += \
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armada-375-db.dtb
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else
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dtb-$(CONFIG_ARCH_MVEBU) += \
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dtb-$(CONFIG_ARCH_MVEBU) += \
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armada-375-db.dtb \
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armada-385-atl-x530.dtb \
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armada-385-atl-x530.dtb \
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armada-385-atl-x530DP.dtb \
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armada-385-atl-x530DP.dtb \
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armada-385-db-88f6820-amc.dtb \
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armada-385-db-88f6820-amc.dtb \
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@ -254,6 +257,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
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armada-xp-maxbcm.dtb \
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armada-xp-maxbcm.dtb \
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armada-xp-synology-ds414.dtb \
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armada-xp-synology-ds414.dtb \
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armada-xp-theadorable.dtb
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armada-xp-theadorable.dtb
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endif
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else
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else
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dtb-$(CONFIG_ARCH_MVEBU) += \
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dtb-$(CONFIG_ARCH_MVEBU) += \
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armada-3720-db.dtb \
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armada-3720-db.dtb \
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@ -187,7 +187,7 @@
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reg = <0xc000 0x58>;
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reg = <0xc000 0x58>;
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};
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};
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timer@c600 {
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timer0: timer@c600 {
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compatible = "arm,cortex-a9-twd-timer";
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compatible = "arm,cortex-a9-twd-timer";
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reg = <0xc600 0x20>;
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reg = <0xc600 0x20>;
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interrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
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interrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
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@ -416,7 +416,7 @@
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interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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timer@20300 {
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timer1: timer@20300 {
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compatible = "marvell,armada-375-timer", "marvell,armada-370-timer";
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compatible = "marvell,armada-375-timer", "marvell,armada-370-timer";
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reg = <0x20300 0x30>, <0x21040 0x30>;
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reg = <0x20300 0x30>, <0x21040 0x30>;
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interrupts-extended = <&gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
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interrupts-extended = <&gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
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@ -107,20 +107,6 @@
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status = "okay";
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status = "okay";
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};
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};
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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||||||
phy0: ethernet-phy@0 {
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||||||
reg = <0>;
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|
||||||
};
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||||||
};
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ethernet@70000 {
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status = "okay";
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||||||
phy = <&phy0>;
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phy-mode = "sgmii";
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};
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usb@50000 {
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usb@50000 {
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status = "okay";
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status = "okay";
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};
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};
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@ -166,6 +152,18 @@
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clock-frequency = <100000>;
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clock-frequency = <100000>;
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};
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};
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&mdio {
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phy0: ethernet-phy@0 {
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||||||
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reg = <0>;
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};
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};
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ð0 {
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status = "okay";
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phy = <&phy0>;
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phy-mode = "sgmii";
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};
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||||||
&spi0 {
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&spi0 {
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status = "okay";
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status = "okay";
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@ -198,7 +196,6 @@
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|||||||
};
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};
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||||||
};
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};
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&pciec {
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&pciec {
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status = "okay";
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status = "okay";
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@ -15,6 +15,17 @@
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u-boot,dm-pre-reloc;
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u-boot,dm-pre-reloc;
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};
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};
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#ifdef CONFIG_ARMADA_375
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/* Armada 375 has multiple timers, use timer1 here */
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&timer1 {
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u-boot,dm-pre-reloc;
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};
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#else
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&timer {
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u-boot,dm-pre-reloc;
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};
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#endif
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#ifdef CONFIG_SPL_SPI
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#ifdef CONFIG_SPL_SPI
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&spi0 {
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&spi0 {
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u-boot,dm-pre-reloc;
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u-boot,dm-pre-reloc;
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@ -39,9 +39,4 @@
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|||||||
#endif
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#endif
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||||||
#endif
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#endif
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||||||
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||||||
/* Use common timer */
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||||||
#define CONFIG_SYS_TIMER_COUNTS_DOWN
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||||||
#define CONFIG_SYS_TIMER_COUNTER (MVEBU_TIMER_BASE + 0x14)
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#define CONFIG_SYS_TIMER_RATE 25000000
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||||||
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#endif /* __MVEBU_CONFIG_H */
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#endif /* __MVEBU_CONFIG_H */
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@ -40,6 +40,7 @@ config SPL_SIZE_LIMIT
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hex "Maximum size of SPL image"
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hex "Maximum size of SPL image"
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default 0x11000 if ARCH_MX6 && !MX6_OCRAM_256KB
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default 0x11000 if ARCH_MX6 && !MX6_OCRAM_256KB
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default 0x31000 if ARCH_MX6 && MX6_OCRAM_256KB
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default 0x31000 if ARCH_MX6 && MX6_OCRAM_256KB
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default 0x30000 if ARCH_MVEBU && ARMADA_32BIT
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default 0x0
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default 0x0
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help
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help
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Specifies the maximum length of the U-Boot SPL image.
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Specifies the maximum length of the U-Boot SPL image.
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@ -70,7 +70,5 @@ CONFIG_SYS_NS16550=y
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CONFIG_SPI=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_KIRKWOOD_SPI=y
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CONFIG_KIRKWOOD_SPI=y
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CONFIG_TIMER=y
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CONFIG_ORION_TIMER=y
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CONFIG_USB=y
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CONFIG_USB=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_EHCI_HCD=y
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@ -71,7 +71,5 @@ CONFIG_SYS_NS16550=y
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CONFIG_SPI=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_KIRKWOOD_SPI=y
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CONFIG_KIRKWOOD_SPI=y
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CONFIG_TIMER=y
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CONFIG_ORION_TIMER=y
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CONFIG_USB=y
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CONFIG_USB=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_EHCI_HCD=y
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@ -22,6 +22,7 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
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CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
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CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_FIT=y
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CONFIG_FIT=y
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# CONFIG_FIT_PRINT is not set
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CONFIG_BOOTDELAY=3
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CONFIG_BOOTDELAY=3
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CONFIG_USE_PREBOOT=y
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CONFIG_USE_PREBOOT=y
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# CONFIG_CONSOLE_MUX is not set
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# CONFIG_CONSOLE_MUX is not set
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@ -98,3 +99,5 @@ CONFIG_VIDEO_MVEBU=y
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CONFIG_BMP_16BPP=y
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CONFIG_BMP_16BPP=y
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CONFIG_BMP_24BPP=y
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CONFIG_BMP_24BPP=y
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CONFIG_BMP_32BPP=y
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CONFIG_BMP_32BPP=y
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CONFIG_FAT_WRITE=y
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# CONFIG_EFI_LOADER is not set
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@ -28,6 +28,8 @@ CONFIG_SYS_MEMTEST_END=0x00ffffff
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
|
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
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||||||
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
|
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000
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||||||
|
CONFIG_HAS_BOARD_SIZE_LIMIT=y
|
||||||
|
CONFIG_BOARD_SIZE_LIMIT=983040
|
||||||
CONFIG_FIT=y
|
CONFIG_FIT=y
|
||||||
CONFIG_FIT_VERBOSE=y
|
CONFIG_FIT_VERBOSE=y
|
||||||
CONFIG_OF_BOARD_SETUP=y
|
CONFIG_OF_BOARD_SETUP=y
|
||||||
|
@ -203,8 +203,11 @@ config OMAP_TIMER
|
|||||||
config ORION_TIMER
|
config ORION_TIMER
|
||||||
bool "Orion timer support"
|
bool "Orion timer support"
|
||||||
depends on TIMER
|
depends on TIMER
|
||||||
|
default y if ARCH_KIRKWOOD || (ARCH_MVEBU && ARMADA_32BIT)
|
||||||
|
select TIMER_EARLY if ARCH_MVEBU
|
||||||
help
|
help
|
||||||
Select this to enable an timer for Orion devices.
|
Select this to enable an timer for Orion and Armada devices
|
||||||
|
like Armada XP etc.
|
||||||
|
|
||||||
config RISCV_TIMER
|
config RISCV_TIMER
|
||||||
bool "RISC-V timer support"
|
bool "RISC-V timer support"
|
||||||
|
@ -1,6 +1,7 @@
|
|||||||
// SPDX-License-Identifier: GPL-2.0+
|
// SPDX-License-Identifier: GPL-2.0+
|
||||||
#include <asm/io.h>
|
#include <asm/io.h>
|
||||||
#include <common.h>
|
#include <common.h>
|
||||||
|
#include <div64.h>
|
||||||
#include <dm/device.h>
|
#include <dm/device.h>
|
||||||
#include <dm/fdtaddr.h>
|
#include <dm/fdtaddr.h>
|
||||||
#include <timer.h>
|
#include <timer.h>
|
||||||
@ -11,20 +12,100 @@
|
|||||||
#define TIMER0_RELOAD 0x10
|
#define TIMER0_RELOAD 0x10
|
||||||
#define TIMER0_VAL 0x14
|
#define TIMER0_VAL 0x14
|
||||||
|
|
||||||
|
enum input_clock_type {
|
||||||
|
INPUT_CLOCK_NON_FIXED,
|
||||||
|
INPUT_CLOCK_25MHZ, /* input clock rate is fixed to 25MHz */
|
||||||
|
};
|
||||||
|
|
||||||
struct orion_timer_priv {
|
struct orion_timer_priv {
|
||||||
void *base;
|
void *base;
|
||||||
};
|
};
|
||||||
|
|
||||||
static uint64_t orion_timer_get_count(struct udevice *dev)
|
#define MVEBU_TIMER_FIXED_RATE_25MHZ 25000000
|
||||||
|
|
||||||
|
static bool early_init_done __section(".data") = false;
|
||||||
|
|
||||||
|
/* Common functions for early (boot) and DM based timer */
|
||||||
|
static void orion_timer_init(void *base, enum input_clock_type type)
|
||||||
|
{
|
||||||
|
writel(~0, base + TIMER0_VAL);
|
||||||
|
writel(~0, base + TIMER0_RELOAD);
|
||||||
|
|
||||||
|
if (type == INPUT_CLOCK_25MHZ) {
|
||||||
|
/*
|
||||||
|
* On Armada XP / 38x ..., the 25MHz clock source needs to
|
||||||
|
* be enabled
|
||||||
|
*/
|
||||||
|
setbits_le32(base + TIMER_CTRL, BIT(11));
|
||||||
|
}
|
||||||
|
|
||||||
|
/* enable timer */
|
||||||
|
setbits_le32(base + TIMER_CTRL, TIMER0_EN | TIMER0_RELOAD_EN);
|
||||||
|
}
|
||||||
|
|
||||||
|
static uint64_t orion_timer_get_count(void *base)
|
||||||
|
{
|
||||||
|
return timer_conv_64(~readl(base + TIMER0_VAL));
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Early (e.g. bootstage etc) timer functions */
|
||||||
|
static void notrace timer_early_init(void)
|
||||||
|
{
|
||||||
|
/* Only init the timer once */
|
||||||
|
if (early_init_done)
|
||||||
|
return;
|
||||||
|
early_init_done = true;
|
||||||
|
|
||||||
|
if (IS_ENABLED(CONFIG_ARCH_MVEBU))
|
||||||
|
orion_timer_init((void *)MVEBU_TIMER_BASE, INPUT_CLOCK_25MHZ);
|
||||||
|
else
|
||||||
|
orion_timer_init((void *)MVEBU_TIMER_BASE, INPUT_CLOCK_NON_FIXED);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* timer_early_get_rate() - Get the timer rate before driver model
|
||||||
|
*/
|
||||||
|
unsigned long notrace timer_early_get_rate(void)
|
||||||
|
{
|
||||||
|
timer_early_init();
|
||||||
|
|
||||||
|
if (IS_ENABLED(CONFIG_ARCH_MVEBU))
|
||||||
|
return MVEBU_TIMER_FIXED_RATE_25MHZ;
|
||||||
|
else
|
||||||
|
return CONFIG_SYS_TCLK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* timer_early_get_count() - Get the timer count before driver model
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
u64 notrace timer_early_get_count(void)
|
||||||
|
{
|
||||||
|
timer_early_init();
|
||||||
|
|
||||||
|
return orion_timer_get_count((void *)MVEBU_TIMER_BASE);
|
||||||
|
}
|
||||||
|
|
||||||
|
ulong timer_get_boot_us(void)
|
||||||
|
{
|
||||||
|
u64 ticks;
|
||||||
|
|
||||||
|
ticks = timer_early_get_count();
|
||||||
|
return lldiv(ticks * 1000, timer_early_get_rate());
|
||||||
|
}
|
||||||
|
|
||||||
|
/* DM timer functions */
|
||||||
|
static uint64_t dm_orion_timer_get_count(struct udevice *dev)
|
||||||
{
|
{
|
||||||
struct orion_timer_priv *priv = dev_get_priv(dev);
|
struct orion_timer_priv *priv = dev_get_priv(dev);
|
||||||
|
|
||||||
return timer_conv_64(~readl(priv->base + TIMER0_VAL));
|
return orion_timer_get_count(priv->base);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int orion_timer_probe(struct udevice *dev)
|
static int orion_timer_probe(struct udevice *dev)
|
||||||
{
|
{
|
||||||
struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
|
struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
|
||||||
|
enum input_clock_type type = dev_get_driver_data(dev);
|
||||||
struct orion_timer_priv *priv = dev_get_priv(dev);
|
struct orion_timer_priv *priv = dev_get_priv(dev);
|
||||||
|
|
||||||
priv->base = devfdt_remap_addr_index(dev, 0);
|
priv->base = devfdt_remap_addr_index(dev, 0);
|
||||||
@ -33,23 +114,23 @@ static int orion_timer_probe(struct udevice *dev)
|
|||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
|
|
||||||
uc_priv->clock_rate = CONFIG_SYS_TCLK;
|
if (type == INPUT_CLOCK_25MHZ)
|
||||||
|
uc_priv->clock_rate = MVEBU_TIMER_FIXED_RATE_25MHZ;
|
||||||
writel(~0, priv->base + TIMER0_VAL);
|
else
|
||||||
writel(~0, priv->base + TIMER0_RELOAD);
|
uc_priv->clock_rate = CONFIG_SYS_TCLK;
|
||||||
|
orion_timer_init(priv->base, type);
|
||||||
/* enable timer */
|
|
||||||
setbits_le32(priv->base + TIMER_CTRL, TIMER0_EN | TIMER0_RELOAD_EN);
|
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static const struct timer_ops orion_timer_ops = {
|
static const struct timer_ops orion_timer_ops = {
|
||||||
.get_count = orion_timer_get_count,
|
.get_count = dm_orion_timer_get_count,
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct udevice_id orion_timer_ids[] = {
|
static const struct udevice_id orion_timer_ids[] = {
|
||||||
{ .compatible = "marvell,orion-timer" },
|
{ .compatible = "marvell,orion-timer", .data = INPUT_CLOCK_NON_FIXED },
|
||||||
|
{ .compatible = "marvell,armada-370-timer", .data = INPUT_CLOCK_25MHZ },
|
||||||
|
{ .compatible = "marvell,armada-xp-timer", .data = INPUT_CLOCK_25MHZ },
|
||||||
{}
|
{}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user