mtd: nand: Remove docg4 driver and palmtreo680 flashing tool
Commit ad4f54ea86 ("arm: Remove palmtreo680 board") removed the only
user of the docg4 driver and the palmtreo680 image flashing tool. This
patch removes them.
Signed-off-by: Scott Wood <oss@buserror.net>
Cc: Mike Dunn <mikedunn@newsguy.com>
Cc: Simon Glass <sjg@chromium.org>
This commit is contained in:
@@ -13,7 +13,6 @@ endif
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obj-$(CONFIG_SPL_NAND_AM33XX_BCH) += am335x_spl_bch.o
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obj-$(CONFIG_SPL_NAND_DENALI) += denali_spl.o
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obj-$(CONFIG_SPL_NAND_DOCG4) += docg4_spl.o
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obj-$(CONFIG_SPL_NAND_SIMPLE) += nand_spl_simple.o
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obj-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o
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obj-$(CONFIG_SPL_NAND_ECC) += nand_ecc.o
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@@ -67,7 +66,6 @@ obj-$(CONFIG_TEGRA_NAND) += tegra_nand.o
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obj-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
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obj-$(CONFIG_NAND_OMAP_ELM) += omap_elm.o
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obj-$(CONFIG_NAND_PLAT) += nand_plat.o
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obj-$(CONFIG_NAND_DOCG4) += docg4.o
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else # minimal SPL drivers
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File diff suppressed because it is too large
Load Diff
@@ -1,219 +0,0 @@
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/*
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* SPL driver for Diskonchip G4 nand flash
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*
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* Copyright (C) 2013 Mike Dunn <mikedunn@newsguy.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* This driver basically mimics the load functionality of a typical IPL (initial
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* program loader) resident in the 2k NOR-like region of the docg4 that is
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* mapped to the reset vector. It allows the u-boot SPL to continue loading if
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* the IPL loads a fixed number of flash blocks that is insufficient to contain
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* the entire u-boot image. In this case, a concatenated spl + u-boot image is
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* written at the flash offset from which the IPL loads an image, and when the
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* IPL jumps to the SPL, the SPL resumes loading where the IPL left off. See
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* the palmtreo680 for an example.
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*
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* This driver assumes that the data was written to the flash using the device's
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* "reliable" mode, and also assumes that each 512 byte page is stored
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* redundantly in the subsequent page. This storage format is likely to be used
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* by all boards that boot from the docg4. The format compensates for the lack
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* of ecc in the IPL.
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*
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* Reliable mode reduces the capacity of a block by half, and the redundant
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* pages reduce it by half again. As a result, the normal 256k capacity of a
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* block is reduced to 64k for the purposes of the IPL/SPL.
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*/
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#include <asm/io.h>
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#include <linux/mtd/docg4.h>
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/* forward declarations */
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static inline void write_nop(void __iomem *docptr);
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static int poll_status(void __iomem *docptr);
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static void write_addr(void __iomem *docptr, uint32_t docg4_addr);
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static void address_sequence(unsigned int g4_page, unsigned int g4_index,
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void __iomem *docptr);
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static int docg4_load_block_reliable(uint32_t flash_offset, void *dest_addr);
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int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
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{
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void *load_addr = dst;
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uint32_t flash_offset = offs;
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const unsigned int block_count =
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(size + DOCG4_BLOCK_CAPACITY_SPL - 1)
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/ DOCG4_BLOCK_CAPACITY_SPL;
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int i;
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for (i = 0; i < block_count; i++) {
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int ret = docg4_load_block_reliable(flash_offset, load_addr);
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if (ret)
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return ret;
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load_addr += DOCG4_BLOCK_CAPACITY_SPL;
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flash_offset += DOCG4_BLOCK_SIZE;
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}
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return 0;
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}
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static inline void write_nop(void __iomem *docptr)
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{
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writew(0, docptr + DOC_NOP);
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}
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static int poll_status(void __iomem *docptr)
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{
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/*
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* Busy-wait for the FLASHREADY bit to be set in the FLASHCONTROL
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* register. Operations known to take a long time (e.g., block erase)
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* should sleep for a while before calling this.
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*/
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uint8_t flash_status;
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/* hardware quirk requires reading twice initially */
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flash_status = readb(docptr + DOC_FLASHCONTROL);
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do {
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flash_status = readb(docptr + DOC_FLASHCONTROL);
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} while (!(flash_status & DOC_CTRL_FLASHREADY));
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return 0;
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}
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static void write_addr(void __iomem *docptr, uint32_t docg4_addr)
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{
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/* write the four address bytes packed in docg4_addr to the device */
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writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
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docg4_addr >>= 8;
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writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
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docg4_addr >>= 8;
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writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
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docg4_addr >>= 8;
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writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
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}
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static void address_sequence(unsigned int g4_page, unsigned int g4_index,
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void __iomem *docptr)
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{
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writew(DOCG4_SEQ_PAGE_READ, docptr + DOC_FLASHSEQUENCE);
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writew(DOCG4_CMD_PAGE_READ, docptr + DOC_FLASHCOMMAND);
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write_nop(docptr);
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write_addr(docptr, ((uint32_t)g4_page << 16) | g4_index);
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write_nop(docptr);
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}
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static int docg4_load_block_reliable(uint32_t flash_offset, void *dest_addr)
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{
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void __iomem *docptr = (void *)CONFIG_SYS_NAND_BASE;
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unsigned int g4_page = flash_offset >> 11; /* 2k page */
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const unsigned int last_g4_page = g4_page + 0x80; /* last in block */
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int g4_index = 0;
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uint16_t flash_status;
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uint16_t *buf;
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/* flash_offset must be aligned to the start of a block */
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if (flash_offset & 0x3ffff)
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return -1;
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writew(DOC_SEQ_RESET, docptr + DOC_FLASHSEQUENCE);
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writew(DOC_CMD_RESET, docptr + DOC_FLASHCOMMAND);
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write_nop(docptr);
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write_nop(docptr);
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poll_status(docptr);
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write_nop(docptr);
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writew(0x45, docptr + DOC_FLASHSEQUENCE);
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writew(0xa3, docptr + DOC_FLASHCOMMAND);
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write_nop(docptr);
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writew(0x22, docptr + DOC_FLASHCOMMAND);
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write_nop(docptr);
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/* read 1st 4 oob bytes of first subpage of block */
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address_sequence(g4_page, 0x0100, docptr); /* index at oob */
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write_nop(docptr);
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flash_status = readw(docptr + DOC_FLASHCONTROL);
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flash_status = readw(docptr + DOC_FLASHCONTROL);
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if (flash_status & 0x06) /* sequence or protection errors */
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return -1;
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writew(DOCG4_CMD_READ2, docptr + DOC_FLASHCOMMAND);
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write_nop(docptr);
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write_nop(docptr);
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poll_status(docptr);
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writew(DOC_ECCCONF0_READ_MODE | 4, docptr + DOC_ECCCONF0);
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write_nop(docptr);
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write_nop(docptr);
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write_nop(docptr);
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write_nop(docptr);
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write_nop(docptr);
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/*
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* Here we read the first four oob bytes of the first page of the block.
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* The IPL on the palmtreo680 requires that this contain a 32 bit magic
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* number, or the load aborts. We'll ignore it.
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*/
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readw(docptr + 0x103c); /* hw quirk; 1st read discarded */
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readw(docptr + 0x103c); /* lower 16 bits of magic number */
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readw(docptr + DOCG4_MYSTERY_REG); /* upper 16 bits of magic number */
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writew(0, docptr + DOC_DATAEND);
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write_nop(docptr);
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write_nop(docptr);
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/* load contents of block to memory */
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buf = (uint16_t *)dest_addr;
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do {
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int i;
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address_sequence(g4_page, g4_index, docptr);
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writew(DOCG4_CMD_READ2,
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docptr + DOC_FLASHCOMMAND);
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write_nop(docptr);
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write_nop(docptr);
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poll_status(docptr);
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writew(DOC_ECCCONF0_READ_MODE |
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DOC_ECCCONF0_ECC_ENABLE |
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DOCG4_BCH_SIZE,
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docptr + DOC_ECCCONF0);
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write_nop(docptr);
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write_nop(docptr);
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write_nop(docptr);
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write_nop(docptr);
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write_nop(docptr);
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/* read the 512 bytes of page data, 2 bytes at a time */
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readw(docptr + 0x103c); /* hw quirk */
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for (i = 0; i < 256; i++)
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*buf++ = readw(docptr + 0x103c);
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/* read oob, but discard it */
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for (i = 0; i < 7; i++)
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readw(docptr + 0x103c);
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readw(docptr + DOCG4_OOB_6_7);
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readw(docptr + DOCG4_OOB_6_7);
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writew(0, docptr + DOC_DATAEND);
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write_nop(docptr);
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write_nop(docptr);
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if (!(g4_index & 0x100)) {
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/* not redundant subpage read; check for ecc error */
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write_nop(docptr);
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flash_status = readw(docptr + DOC_ECCCONF1);
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flash_status = readw(docptr + DOC_ECCCONF1);
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if (flash_status & 0x80) { /* ecc error */
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g4_index += 0x108; /* read redundant subpage */
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buf -= 256; /* back up ram ptr */
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continue;
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} else /* no ecc error */
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g4_index += 0x210; /* skip redundant subpage */
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} else /* redundant page was just read; skip ecc error check */
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g4_index += 0x108;
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if (g4_index == 0x420) { /* finished with 2k page */
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g4_index = 0;
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g4_page += 2; /* odd-numbered 2k pages skipped */
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}
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} while (g4_page != last_g4_page); /* while still on same block */
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return 0;
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}
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