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* Patch by George G. Davis, 02 Apr 2004:

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add support for Intel Assabet board
This commit is contained in:
wdenk
2004-04-15 23:23:39 +00:00
parent db01a2ea99
commit ea66bc8804
12 changed files with 558 additions and 11 deletions
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49
board/assabet/Makefile Normal file
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#
# (C) Copyright 2000-2004
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# 2004 (c) MontaVista Software, Inc.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS := assabet.o
SOBJS := setup.o
$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
#########################################################################
.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
-include .depend
#########################################################################

121
board/assabet/assabet.c Normal file
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/*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* 2004 (c) MontaVista Software, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <SA-1100.h>
/* ------------------------------------------------------------------------- */
/*
* Board dependent initialisation
*/
#define ECOR 0x8000
#define ECOR_RESET 0x80
#define ECOR_LEVEL_IRQ 0x40
#define ECOR_WR_ATTRIB 0x04
#define ECOR_ENABLE 0x01
#define ECSR 0x8002
#define ECSR_IOIS8 0x20
#define ECSR_PWRDWN 0x04
#define ECSR_INT 0x02
#define SMC_IO_SHIFT 2
#define NCR_0 (*((volatile u_char *)(0x100000a0)))
#define NCR_ENET_OSC_EN (1<<3)
static inline u8
readb(volatile u8 * p)
{
return *p;
}
static inline void
writeb(u8 v, volatile u8 * p)
{
*p = v;
}
static void
smc_init(void)
{
u8 ecor;
u8 ecsr;
volatile u8 *addr = (volatile u8 *)(0x18000000 + (1 << 25));
NCR_0 |= NCR_ENET_OSC_EN;
udelay(100);
ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
udelay(100);
/*
* The device will ignore all writes to the enable bit while
* reset is asserted, even if the reset bit is cleared in the
* same write. Must clear reset first, then enable the device.
*/
writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
/*
* Set the appropriate byte/word mode.
*/
ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
ecsr |= ECSR_IOIS8;
writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
udelay(100);
}
static void
neponset_init(void)
{
smc_init();
}
int
board_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_arch_number = 25; /* Intel Assabet Board */
gd->bd->bi_boot_params = 0xc0000100;
neponset_init();
return 0;
}
int
dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
return (0);
}

7
board/assabet/config.mk Normal file
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#
# SA-1110 based Intel Assabet board
#
# The Intel Assabet 1 bank of 32 MiB SDRAM
#
TEXT_BASE = 0xc1f00000

136
board/assabet/setup.S Normal file
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/*
* Memory Setup stuff - taken from blob memsetup.S
*
* Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
* Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
* 2004 (c) MontaVista Software, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include "config.h"
#include "version.h"
/*-----------------------------------------------------------------------
* Board defines:
*/
#define MDCNFG 0x00
#define MDCAS00 0x04
#define MDCAS01 0x08
#define MDCAS02 0x0C
#define MSC0 0x10
#define MSC1 0x14
#define MECR 0x18
#define MDREFR 0x1C
#define MDCAS20 0x20
#define MDCAS21 0x24
#define MDCAS22 0x28
#define MSC2 0x2C
#define SMCNFG 0x30
#define ASSABET_BCR (0x12000000)
#define ASSABET_BCR_DB1110 (0x00a07490 | (0<<16) | (0<<17))
#define ASSABET_SCR_nNEPONSET (1 << 9)
#define NEPONSET_LEDS (0x10000010)
/*-----------------------------------------------------------------------
* Setup parameters for the board:
*/
MEM_BASE: .long 0xa0000000
MEM_START: .long 0xc0000000
mdcnfg: .long 0x72547254
mdcas00: .long 0xaaaaaa7f
mdcas01: .long 0xaaaaaaaa
mdcas02: .long 0xaaaaaaaa
msc0: .long 0x4b384370
msc1: .long 0x22212419
mecr: .long 0x994a994a
mdrefr: .long 0x04340327
mdcas20: .long 0xaaaaaa7f
mdcas21: .long 0xaaaaaaaa
mdcas22: .long 0xaaaaaaaa
msc2: .long 0x42196669
smcnfg: .long 0x00000000
BCR: .long ASSABET_BCR
BCR_DB1110: .long ASSABET_BCR_DB1110
LEDS: .long NEPONSET_LEDS
.globl memsetup
memsetup:
/* Setting up the memory and stuff */
ldr r0, MEM_BASE
ldr r1, mdcas00
str r1, [r0, #MDCAS00]
ldr r1, mdcas01
str r1, [r0, #MDCAS01]
ldr r1, mdcas02
str r1, [r0, #MDCAS02]
ldr r1, mdcas20
str r1, [r0, #MDCAS20]
ldr r1, mdcas21
str r1, [r0, #MDCAS21]
ldr r1, mdcas22
str r1, [r0, #MDCAS22]
ldr r1, mdrefr
str r1, [r0, #MDREFR]
ldr r1, mecr
str r1, [r0, #MECR]
ldr r1, msc0
str r1, [r0, #MSC0]
ldr r1, msc1
str r1, [r0, #MSC1]
ldr r1, msc2
str r1, [r0, #MSC2]
ldr r1, smcnfg
str r1, [r0, #SMCNFG]
ldr r1, mdcnfg
str r1, [r0, #MDCNFG]
/* Load something to activate bank */
ldr r2, MEM_START
.rept 8
ldr r3, [r2]
.endr
/* Enable SDRAM */
orr r1, r1, #0x00000001
str r1, [r0, #MDCNFG]
ldr r1, BCR
ldr r2, BCR_DB1110
str r2, [r1]
ldr r1, LEDS
mov r0, #0x3
str r0, [r1]
/* All done... */
mov pc, lr

57
board/assabet/u-boot.lds Normal file
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/*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
* 2004 (c) MontaVista Software, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/sa1100/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}