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display5: ddr: Enable support for DDR3 auto calibration

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This code performs DDR3 memory calibration for display5 board.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
This commit is contained in:
Lukasz Majewski
2018-05-11 16:51:13 +02:00
committed by Stefano Babic
parent b5f4543c92
commit ea4584d73d
2 changed files with 48 additions and 0 deletions
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configs/display5_defconfig
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@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x17800000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_MX6_DDRCAL=y
CONFIG_TARGET_DISPLAY5=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y