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configs: Migrate CORTINA_FW_ADDR and CORTINA_FW_LENGTH to Kconfig

Browse Source 
Use moveconfig.py script to convert below defines to Kconfig and move
these entries to defconfigs.
    CONFIG_CORTINA_FW_ADDR
    CONFIG_CORTINA_FW_LENGTH

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Kuldeep Singh 2021-08-10 11:20:07 +05:30 committed by Priyanka Jain
parent 9b90e0d08f
commit e99b1dfcb7
21 changed files with 26 additions and 20 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
configs/T2080RDB_NAND_defconfig
View File

@ -69,6 +69,7 @@ CONFIG_PHYLIB=y
CONFIG_PHY_AQUANTIA=y
CONFIG_PHY_CORTINA=y
CONFIG_SYS_CORTINA_FW_IN_NAND=y
CONFIG_CORTINA_FW_ADDR=0x200000
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y

1
configs/T2080RDB_SDCARD_defconfig
View File

@ -66,6 +66,7 @@ CONFIG_PHYLIB=y
CONFIG_PHY_AQUANTIA=y
CONFIG_PHY_CORTINA=y
CONFIG_SYS_CORTINA_FW_IN_MMC=y
CONFIG_CORTINA_FW_ADDR=0x114000
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y

1
configs/T2080RDB_SPIFLASH_defconfig
View File

@ -68,6 +68,7 @@ CONFIG_PHYLIB=y
CONFIG_PHY_AQUANTIA=y
CONFIG_PHY_CORTINA=y
CONFIG_SYS_CORTINA_FW_IN_SPIFLASH=y
CONFIG_CORTINA_FW_ADDR=0x120000
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y

1
configs/T2080RDB_defconfig
View File

@ -53,6 +53,7 @@ CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_PHY_AQUANTIA=y
CONFIG_PHY_CORTINA=y
CONFIG_CORTINA_FW_ADDR=0xEFE00000
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y

1
configs/T2080RDB_revD_NAND_defconfig
View File

@ -70,6 +70,7 @@ CONFIG_PHYLIB=y
CONFIG_PHY_AQUANTIA=y
CONFIG_PHY_CORTINA=y
CONFIG_SYS_CORTINA_FW_IN_NAND=y
CONFIG_CORTINA_FW_ADDR=0x200000
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y

1
configs/T2080RDB_revD_SDCARD_defconfig
View File

@ -67,6 +67,7 @@ CONFIG_PHYLIB=y
CONFIG_PHY_AQUANTIA=y
CONFIG_PHY_CORTINA=y
CONFIG_SYS_CORTINA_FW_IN_MMC=y
CONFIG_CORTINA_FW_ADDR=0x114000
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y

1
configs/T2080RDB_revD_SPIFLASH_defconfig
View File

@ -69,6 +69,7 @@ CONFIG_PHYLIB=y
CONFIG_PHY_AQUANTIA=y
CONFIG_PHY_CORTINA=y
CONFIG_SYS_CORTINA_FW_IN_SPIFLASH=y
CONFIG_CORTINA_FW_ADDR=0x120000
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y

1
configs/T2080RDB_revD_defconfig
View File

@ -54,6 +54,7 @@ CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHYLIB=y
CONFIG_PHY_AQUANTIA=y
CONFIG_PHY_CORTINA=y
CONFIG_CORTINA_FW_ADDR=0xEFE00000
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y

1
configs/T4240RDB_SDCARD_defconfig
View File

@ -57,6 +57,7 @@ CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHYLIB_10G=y
CONFIG_PHY_CORTINA=y
CONFIG_CORTINA_FW_ADDR=0x77f000
CONFIG_PHY_TERANETICS=y
CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y

1
configs/T4240RDB_defconfig
View File

@ -45,6 +45,7 @@ CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHYLIB_10G=y
CONFIG_PHY_CORTINA=y
CONFIG_CORTINA_FW_ADDR=0xefe00000
CONFIG_PHY_TERANETICS=y
CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y

1
configs/ls2080ardb_SECURE_BOOT_defconfig
View File

@ -47,6 +47,7 @@ CONFIG_DM_SPI_FLASH=y
CONFIG_PHYLIB=y
CONFIG_PHY_AQUANTIA=y
CONFIG_PHY_CORTINA=y
CONFIG_CORTINA_FW_ADDR=0x580980000
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_NVME=y

1
configs/ls2080ardb_defconfig
View File

@ -50,6 +50,7 @@ CONFIG_DM_SPI_FLASH=y
CONFIG_PHYLIB=y
CONFIG_PHY_AQUANTIA=y
CONFIG_PHY_CORTINA=y
CONFIG_CORTINA_FW_ADDR=0x580980000
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_NVME=y

1
configs/ls2080ardb_nand_defconfig
View File

@ -58,6 +58,7 @@ CONFIG_SYS_FLASH_CFI=y
CONFIG_PHYLIB=y
CONFIG_PHY_AQUANTIA=y
CONFIG_PHY_CORTINA=y
CONFIG_CORTINA_FW_ADDR=0x980000
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_NVME=y

1
configs/ls2081ardb_defconfig
View File

@ -45,6 +45,7 @@ CONFIG_DM_SPI_FLASH=y
CONFIG_PHYLIB=y
CONFIG_PHY_AQUANTIA=y
CONFIG_PHY_CORTINA=y
CONFIG_CORTINA_FW_ADDR=0x980000
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_NVME=y

1
configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
View File

@ -44,6 +44,7 @@ CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_PHY_AQUANTIA=y
CONFIG_PHY_CORTINA=y
CONFIG_CORTINA_FW_ADDR=0x980000
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_E1000=y

1
configs/ls2088ardb_qspi_defconfig
View File

@ -51,6 +51,7 @@ CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_PHY_AQUANTIA=y
CONFIG_PHY_CORTINA=y
CONFIG_CORTINA_FW_ADDR=0x980000
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_E1000=y

10
drivers/net/phy/Kconfig
View File

@ -131,6 +131,16 @@ config SYS_CORTINA_FW_IN_SPIFLASH
endchoice
config CORTINA_FW_ADDR
hex "Cortina Firmware Address"
depends on PHY_CORTINA && !SYS_CORTINA_NO_FW_UPLOAD
default 0x0
config CORTINA_FW_LENGTH
hex "Cortina Firmware Length"
depends on PHY_CORTINA && !SYS_CORTINA_NO_FW_UPLOAD
default 0x40000
config PHY_CORTINA_ACCESS
bool "Cortina Access Ethernet PHYs support"
default y

6
include/configs/T208xRDB.h
View File

@ -479,7 +479,6 @@ unsigned long get_board_ddr_clk(void);
* env, so we got 0x110000.
*/
#define CONFIG_SYS_FMAN_FW_ADDR 0x110000
#define CONFIG_CORTINA_FW_ADDR 0x120000
#elif defined(CONFIG_SDCARD)
/*
@ -488,11 +487,9 @@ unsigned long get_board_ddr_clk(void);
* 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080.
*/
#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820)
#define CONFIG_CORTINA_FW_ADDR (512 * 0x8a0)
#elif defined(CONFIG_MTD_RAW_NAND)
#define CONFIG_SYS_FMAN_FW_ADDR (3 * CONFIG_SYS_NAND_BLOCK_SIZE)
#define CONFIG_CORTINA_FW_ADDR (4 * CONFIG_SYS_NAND_BLOCK_SIZE)
#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
/*
* Slave has no ucode locally, it can fetch this from remote. When implementing
@ -502,17 +499,14 @@ unsigned long get_board_ddr_clk(void);
* master LAW->the ucode address in master's memory space.
*/
#define CONFIG_SYS_FMAN_FW_ADDR 0xFFE00000
#define CONFIG_CORTINA_FW_ADDR 0xFFE10000
#else
#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000
#define CONFIG_CORTINA_FW_ADDR 0xEFE00000
#endif
#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
#endif /* CONFIG_NOBQFMAN */
#ifdef CONFIG_SYS_DPAA_FMAN
#define CONFIG_CORTINA_FW_LENGTH 0x40000
#define RGMII_PHY1_ADDR 0x01 /* RealTek RTL8211E */
#define RGMII_PHY2_ADDR 0x02
#define CORTINA_PHY_ADDR1 0x0c /* Cortina CS4315 */

2
include/configs/T4240RDB.h
View File

@ -517,8 +517,6 @@ unsigned long get_board_ddr_clk(void);
#endif /* CONFIG_NOBQFMAN */
#ifdef CONFIG_SYS_DPAA_FMAN
#define CONFIG_CORTINA_FW_ADDR 0xefe00000
#define CONFIG_CORTINA_FW_LENGTH 0x40000
#define SGMII_PHY_ADDR1 0x0
#define SGMII_PHY_ADDR2 0x1
#define SGMII_PHY_ADDR3 0x2

10
include/configs/ls2080ardb.h
View File

@ -560,14 +560,6 @@ unsigned long get_board_sys_clk(void);
#endif
/* MAC/PHY configuration */
#ifdef CONFIG_FSL_MC_ENET
#ifdef CONFIG_QSPI_BOOT
#define CONFIG_CORTINA_FW_ADDR 0x20980000
#else
#define CONFIG_CORTINA_FW_ADDR 0x580980000
#endif
#define CONFIG_CORTINA_FW_LENGTH 0x40000
#define CORTINA_PHY_ADDR1 0x10
#define CORTINA_PHY_ADDR2 0x11
#define CORTINA_PHY_ADDR3 0x12
@ -577,9 +569,7 @@ unsigned long get_board_sys_clk(void);
#define AQ_PHY_ADDR3 0x02
#define AQ_PHY_ADDR4 0x03
#define AQR405_IRQ_MASK 0x36
#define CONFIG_ETHPRIME "DPMAC1@xgmii"
#endif
#include <asm/fsl_secure_boot.h>

2
scripts/config_whitelist.txt
View File

@ -190,8 +190,6 @@ CONFIG_CONS_SCIF1
CONFIG_CONS_SCIF2
CONFIG_CONS_SCIF4
CONFIG_CON_ROT
CONFIG_CORTINA_FW_ADDR
CONFIG_CORTINA_FW_LENGTH
CONFIG_CPLD_BR_PRELIM
CONFIG_CPLD_OR_PRELIM
CONFIG_CPM2