powerpc: mpc83xx: Minimize r1 modification
The r1 register is modified several times during the cache-ram setup of the MPC83xx SoCs. Since this SP modification confuses debuggers, we use a general purpose register to compute the new stack pointer value, and only set the SP once after all computations are done. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com> Reviewed-by: York Sun <york.sun@nxp.com>
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@ -258,14 +258,17 @@ in_flash:
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#endif
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/* set up the stack pointer in our newly created
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* cache-ram (r1) */
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lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
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ori r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l
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* cache-ram; use r3 to keep the new SP for now to
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* avoid overiding the SP it uselessly */
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lis r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
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ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l
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li r0, 0 /* Make room for stack frame header and */
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stwu r0, -4(r1) /* clear final stack frame so that */
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stwu r0, -4(r1) /* stack backtraces terminate cleanly */
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stwu r0, -4(r3) /* clear final stack frame so that */
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stwu r0, -4(r3) /* stack backtraces terminate cleanly */
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/* Finally, actually set SP */
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mr r1, r3
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/* let the C-code set up the rest */
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/* */
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