Convert CONFIG_NAND_ATMEL to Kconfig
This converts the following to Kconfig: CONFIG_NAND_ATMEL Signed-off-by: Adam Ford <aford173@gmail.com>
This commit is contained in:
parent
d294335e5d
commit
e7db856bf9
@ -34,6 +34,8 @@ CONFIG_CLK_AT91=y
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CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -34,6 +34,8 @@ CONFIG_CLK_AT91=y
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CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -34,6 +34,8 @@ CONFIG_CLK_AT91=y
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CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -35,6 +35,8 @@ CONFIG_CLK_AT91=y
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CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -35,6 +35,8 @@ CONFIG_CLK_AT91=y
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CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -35,6 +35,8 @@ CONFIG_CLK_AT91=y
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CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -39,6 +39,8 @@ CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -39,6 +39,8 @@ CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -39,6 +39,8 @@ CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -38,6 +38,8 @@ CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -38,6 +38,8 @@ CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -35,6 +35,8 @@ CONFIG_CLK_AT91=y
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CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -35,6 +35,8 @@ CONFIG_CLK_AT91=y
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CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -35,6 +35,8 @@ CONFIG_CLK_AT91=y
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CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -36,6 +36,8 @@ CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -36,6 +36,8 @@ CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -34,6 +34,8 @@ CONFIG_CLK_AT91=y
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CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -34,6 +34,8 @@ CONFIG_CLK_AT91=y
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CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -34,6 +34,8 @@ CONFIG_CLK_AT91=y
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CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -38,6 +38,8 @@ CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_ETH=y
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CONFIG_MACB=y
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CONFIG_PINCTRL=y
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@ -38,6 +38,8 @@ CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_ETH=y
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CONFIG_MACB=y
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CONFIG_PINCTRL=y
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@ -38,6 +38,8 @@ CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -38,6 +38,8 @@ CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -38,6 +38,8 @@ CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -37,6 +37,8 @@ CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -39,6 +39,8 @@ CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -39,6 +39,8 @@ CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -39,6 +39,8 @@ CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -39,6 +39,8 @@ CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -34,6 +34,8 @@ CONFIG_CLK_AT91=y
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CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -34,6 +34,8 @@ CONFIG_CLK_AT91=y
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CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -34,6 +34,8 @@ CONFIG_CLK_AT91=y
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CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -37,6 +37,8 @@ CONFIG_OF_CONTROL=y
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CONFIG_OF_EMBED=y
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CONFIG_ENV_IS_IN_NAND=y
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# CONFIG_MMC is not set
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_PHYLIB=y
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@ -40,6 +40,8 @@ CONFIG_CLK=y
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CONFIG_CLK_AT91=y
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CONFIG_DFU_NAND=y
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# CONFIG_MMC is not set
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_PHYLIB=y
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CONFIG_ATMEL_USART=y
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CONFIG_USB=y
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@ -49,6 +49,8 @@ CONFIG_CLK_AT91=y
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CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -24,6 +24,8 @@ CONFIG_CMD_PING=y
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CONFIG_CMD_FAT=y
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CONFIG_OF_CONTROL=y
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CONFIG_ENV_IS_IN_NAND=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_PHYLIB=y
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CONFIG_TIMER=y
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CONFIG_ATMEL_PIT_TIMER=y
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@ -25,6 +25,8 @@ CONFIG_CLK_AT91=y
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CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -35,6 +35,8 @@ CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -35,6 +35,8 @@ CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -21,5 +21,7 @@ CONFIG_CMD_CACHE=y
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CONFIG_CMD_JFFS2=y
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CONFIG_ENV_IS_IN_NAND=y
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# CONFIG_MMC is not set
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_USB=y
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CONFIG_USB_STORAGE=y
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@ -45,6 +45,8 @@ CONFIG_I2C_EEPROM=y
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CONFIG_DM_MMC=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_ATMEL=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_ETH=y
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CONFIG_MACB=y
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CONFIG_PINCTRL=y
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@ -45,6 +45,8 @@ CONFIG_I2C_EEPROM=y
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CONFIG_DM_MMC=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_ATMEL=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_ETH=y
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CONFIG_MACB=y
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CONFIG_PINCTRL=y
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@ -40,6 +40,8 @@ CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -40,6 +40,8 @@ CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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@ -40,6 +40,8 @@ CONFIG_DM_GPIO=y
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CONFIG_AT91_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_GENERIC_ATMEL_MCI=y
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CONFIG_NAND=y
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CONFIG_NAND_ATMEL=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_ATMEL=y
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|
@ -57,6 +57,8 @@ CONFIG_DM_GPIO=y
|
||||
CONFIG_AT91_GPIO=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_GENERIC_ATMEL_MCI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_MACB=y
|
||||
CONFIG_PINCTRL=y
|
||||
|
@ -54,6 +54,8 @@ CONFIG_DM_GPIO=y
|
||||
CONFIG_AT91_GPIO=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_GENERIC_ATMEL_MCI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_MACB=y
|
||||
CONFIG_PINCTRL=y
|
||||
|
@ -61,6 +61,8 @@ CONFIG_AT91_GPIO=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_GENERIC_ATMEL_MCI=y
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
|
@ -56,6 +56,8 @@ CONFIG_AT91_GPIO=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_GENERIC_ATMEL_MCI=y
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
|
@ -56,6 +56,8 @@ CONFIG_AT91_GPIO=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_GENERIC_ATMEL_MCI=y
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
|
@ -55,6 +55,8 @@ CONFIG_SYS_I2C_AT91=y
|
||||
CONFIG_I2C_EEPROM=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_GENERIC_ATMEL_MCI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
|
@ -52,6 +52,8 @@ CONFIG_SYS_I2C_AT91=y
|
||||
CONFIG_I2C_EEPROM=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_GENERIC_ATMEL_MCI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
|
@ -55,6 +55,8 @@ CONFIG_SYS_I2C_AT91=y
|
||||
CONFIG_I2C_EEPROM=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_GENERIC_ATMEL_MCI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
|
@ -55,6 +55,8 @@ CONFIG_DM_GPIO=y
|
||||
CONFIG_AT91_GPIO=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_GENERIC_ATMEL_MCI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
|
@ -52,6 +52,8 @@ CONFIG_DM_GPIO=y
|
||||
CONFIG_AT91_GPIO=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_GENERIC_ATMEL_MCI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
|
@ -52,6 +52,8 @@ CONFIG_DM_GPIO=y
|
||||
CONFIG_AT91_GPIO=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_GENERIC_ATMEL_MCI=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
|
@ -43,6 +43,8 @@ CONFIG_CLK=y
|
||||
CONFIG_CLK_AT91=y
|
||||
CONFIG_DFU_NAND=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_NAND=y
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_DM_USB=y
|
||||
|
@ -27,5 +27,7 @@ CONFIG_CMD_FAT=y
|
||||
CONFIG_ENV_IS_IN_NAND=y
|
||||
CONFIG_CMD_PCA953X=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_NAND=y
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
|
@ -26,5 +26,7 @@ CONFIG_CMD_FAT=y
|
||||
CONFIG_ENV_IS_IN_NAND=y
|
||||
CONFIG_CMD_PCA953X=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_NAND=y
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
|
@ -47,6 +47,8 @@ CONFIG_CLK=y
|
||||
CONFIG_CLK_AT91=y
|
||||
CONFIG_DFU_NAND=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_NAND=y
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_PHYLIB=y
|
||||
|
@ -30,6 +30,8 @@ CONFIG_CLK_AT91=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_AT91_GPIO=y
|
||||
# CONFIG_MMC is not set
|
||||
CONFIG_NAND=y
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
|
@ -23,5 +23,7 @@ CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_ENV_IS_IN_NAND=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_LZMA=y
|
||||
CONFIG_OF_LIBFDT=y
|
||||
|
@ -24,6 +24,8 @@ CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_ENV_IS_IN_NAND=y
|
||||
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
||||
CONFIG_NAND=y
|
||||
CONFIG_NAND_ATMEL=y
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHY_MICREL=y
|
||||
CONFIG_PHY_MICREL_KSZ90X1=y
|
||||
|
@ -9,6 +9,13 @@ config SYS_NAND_SELF_INIT
|
||||
This option, if enabled, provides more flexible and linux-like
|
||||
NAND initialization process.
|
||||
|
||||
config NAND_ATMEL
|
||||
bool "Support Atmel NAND controller"
|
||||
imply SYS_NAND_USE_FLASH_BBT
|
||||
help
|
||||
Enable this driver for NAND flash platforms using an Atmel NAND
|
||||
controller.
|
||||
|
||||
config NAND_DENALI
|
||||
bool
|
||||
select SYS_NAND_SELF_INIT
|
||||
|
@ -90,7 +90,6 @@
|
||||
|
||||
/* NAND flash */
|
||||
#ifdef CONFIG_CMD_NAND
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
|
||||
#define CONFIG_SYS_NAND_DBW_8
|
||||
|
@ -59,7 +59,6 @@
|
||||
|
||||
/* NAND flash */
|
||||
#ifdef CONFIG_CMD_NAND
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE 0x40000000
|
||||
#define CONFIG_SYS_NAND_DBW_8
|
||||
|
@ -190,7 +190,6 @@
|
||||
|
||||
/* NAND flash */
|
||||
#ifdef CONFIG_CMD_NAND
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
|
||||
#define CONFIG_SYS_NAND_DBW_8 1
|
||||
|
@ -52,7 +52,6 @@
|
||||
|
||||
/* NAND flash */
|
||||
#ifdef CONFIG_CMD_NAND
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
|
||||
#define CONFIG_SYS_NAND_DBW_8
|
||||
|
@ -52,7 +52,6 @@
|
||||
|
||||
/* NAND flash */
|
||||
#ifdef CONFIG_CMD_NAND
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE 0x40000000
|
||||
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
|
||||
|
@ -50,7 +50,6 @@
|
||||
|
||||
/* NAND flash */
|
||||
#ifdef CONFIG_CMD_NAND
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
|
||||
#define CONFIG_SYS_NAND_DBW_8 1
|
||||
|
@ -45,7 +45,6 @@
|
||||
|
||||
/* NAND flash */
|
||||
#ifdef CONFIG_CMD_NAND
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE 0x40000000
|
||||
#define CONFIG_SYS_NAND_DBW_8 1
|
||||
|
@ -64,7 +64,6 @@
|
||||
|
||||
/* NAND flash */
|
||||
#ifdef CONFIG_CMD_NAND
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
|
||||
#define CONFIG_SYS_NAND_DBW_8
|
||||
|
@ -63,7 +63,6 @@
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE 0x40000000
|
||||
#define CONFIG_SYS_NAND_DBW_8
|
||||
#define CONFIG_NAND_ATMEL
|
||||
/* our ALE is AD21 */
|
||||
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
|
||||
/* our CLE is AD22 */
|
||||
|
@ -77,7 +77,6 @@
|
||||
|
||||
/* NAND flash */
|
||||
#ifdef CONFIG_CMD_NAND
|
||||
# define CONFIG_NAND_ATMEL
|
||||
# define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
# define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 /* 0x40000000 */
|
||||
# define CONFIG_SYS_NAND_DBW_8
|
||||
|
@ -159,7 +159,6 @@
|
||||
#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
|
||||
|
||||
/* NAND flash */
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE 0x40000000
|
||||
#define CONFIG_SYS_NAND_DBW_8 1
|
||||
|
@ -182,7 +182,6 @@
|
||||
|
||||
/* NAND flash */
|
||||
#ifdef CONFIG_CMD_NAND
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE 0x40000000
|
||||
#define CONFIG_SYS_NAND_DBW_8 1
|
||||
|
@ -71,7 +71,6 @@
|
||||
|
||||
/* NAND flash */
|
||||
#ifdef CONFIG_CMD_NAND
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE 0x40000000
|
||||
#define CONFIG_SYS_NAND_DBW_8 1
|
||||
|
@ -29,7 +29,6 @@
|
||||
|
||||
/* NAND Flash */
|
||||
#ifdef CONFIG_CMD_NAND
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
|
||||
/* our ALE is AD21 */
|
||||
|
@ -36,7 +36,6 @@
|
||||
|
||||
/* NAND flash */
|
||||
#ifdef CONFIG_CMD_NAND
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE 0x60000000
|
||||
/* our ALE is AD21 */
|
||||
|
@ -58,7 +58,6 @@
|
||||
|
||||
/* NAND flash */
|
||||
#ifdef CONFIG_CMD_NAND
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE 0x60000000
|
||||
/* our ALE is AD21 */
|
||||
|
@ -33,7 +33,6 @@
|
||||
|
||||
/* NAND flash */
|
||||
#ifdef CONFIG_CMD_NAND
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE 0x80000000
|
||||
/* our ALE is AD21 */
|
||||
|
@ -31,7 +31,6 @@
|
||||
|
||||
/* NAND flash */
|
||||
#ifdef CONFIG_CMD_NAND
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE 0x80000000
|
||||
/* our ALE is AD21 */
|
||||
|
@ -78,7 +78,6 @@
|
||||
ROUND(3 * CONFIG_ENV_SIZE + (4 * SZ_1M), 0x1000)
|
||||
|
||||
/* NAND flash settings */
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
|
||||
#define CONFIG_SYS_NAND_DBW_8
|
||||
|
@ -38,7 +38,6 @@
|
||||
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
|
||||
|
||||
/* NAND Flash */
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
|
||||
#define CONFIG_SYS_NAND_DBW_8
|
||||
|
@ -36,7 +36,6 @@
|
||||
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
|
||||
|
||||
/* NAND Flash */
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_ATMEL_NAND_HWECC
|
||||
#define CONFIG_SYS_NAND_ECC_BASE ATMEL_BASE_ECC
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
|
@ -72,7 +72,6 @@
|
||||
|
||||
/* NAND flash */
|
||||
#ifdef CONFIG_CMD_NAND
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
|
||||
#define CONFIG_SYS_NAND_DBW_8
|
||||
|
@ -48,7 +48,6 @@
|
||||
|
||||
/* NAND flash */
|
||||
#ifdef CONFIG_CMD_NAND
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
|
||||
/* our ALE is AD21 */
|
||||
|
@ -40,7 +40,6 @@
|
||||
(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
|
||||
|
||||
/* NAND flash */
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE 0x40000000
|
||||
/* our ALE is AD21 */
|
||||
|
@ -51,7 +51,6 @@
|
||||
#define CONFIG_SYS_MEMTEST_END 0x22000000
|
||||
|
||||
/* NAND flash */
|
||||
#define CONFIG_NAND_ATMEL
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
|
||||
/* our ALE is AD21 */
|
||||
|
@ -1367,7 +1367,6 @@ CONFIG_MY_OPTION
|
||||
CONFIG_NANDFLASH_SIZE
|
||||
CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
|
||||
CONFIG_NAND_ACTL
|
||||
CONFIG_NAND_ATMEL
|
||||
CONFIG_NAND_CS_INIT
|
||||
CONFIG_NAND_DATA_REG
|
||||
CONFIG_NAND_DAVINCI
|
||||
|
Loading…
Reference in New Issue
Block a user