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Merge https://source.denx.de/u-boot/custodians/u-boot-marvell

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- mrvl_uart.sh: Remove script (Pali)
- Fix Espressobin build for configs where ENV is not in SPI (Rogier)
- mvebu: a37xx: Add support for reading OTP (Pali)
- mvebu: uDPU: Ethernet fixes and misc DT and defconfig changes (Robert)
- mvebu: Add support for reading LD0 and LD1 eFuse (Pali)
- kwboot: Replace fstat()+st_size by lseek()+SEEK_END (Pali)
- mvebu: turris_omnia: Enable CONFIG_CMD_FUSE (Pali)
- arm: Add CONFIG_SPL_SYS_NO_VECTOR_TABLE used on 32bit MVEBU (Pali)
- mvebu: a37xx: Add support for writing Security OTP values (Pali)
- mvebu: turris: Misc enhancements and cleanups / fixes (Pali)
- Sheevaplug : Use Marvell uclass mvgbe and PHY driver for Ethernet (Tony)
This commit is contained in:
Tom Rini
2022-04-21 11:44:54 -04:00
parent feeacc7ec7 ac47bd230c
commit e50f66e364
33 changed files with 628 additions and 432 deletions
Download Patch File Download Diff File Expand all files Collapse all files

119
board/CZ.NIC/turris_atsha_otp.c Normal file
View File

@@ -0,0 +1,119 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Marek Behun <marek.behun@nic.cz>
* Copyright (C) 2016 Tomas Hlavacek <tomas.hlavacek@nic.cz>
*/
#include <env.h>
#include <net.h>
#include <dm/uclass.h>
#include <atsha204a-i2c.h>
#include "turris_atsha_otp.h"
#define TURRIS_ATSHA_OTP_VERSION 0
#define TURRIS_ATSHA_OTP_SERIAL 1
#define TURRIS_ATSHA_OTP_MAC0 3
#define TURRIS_ATSHA_OTP_MAC1 4
static struct udevice *get_atsha204a_dev(void)
{
/* Cannot be static because BSS does not have to be ready at this early stage */
struct udevice *dev;
if (uclass_get_device_by_name(UCLASS_MISC, "crypto@64", &dev)) {
puts("Cannot find ATSHA204A on I2C bus!\n");
dev = NULL;
}
return dev;
}
static void increment_mac(u8 *mac)
{
int i;
for (i = 5; i >= 3; i--) {
mac[i] += 1;
if (mac[i])
break;
}
}
static void set_mac_if_invalid(int i, u8 *mac)
{
u8 oldmac[6];
if (is_valid_ethaddr(mac) &&
!eth_env_get_enetaddr_by_index("eth", i, oldmac))
eth_env_set_enetaddr_by_index("eth", i, mac);
}
int turris_atsha_otp_init_mac_addresses(int first_idx)
{
struct udevice *dev = get_atsha204a_dev();
u8 mac0[4], mac1[4], mac[6];
int ret;
if (!dev)
return -1;
ret = atsha204a_wakeup(dev);
if (ret)
return ret;
ret = atsha204a_read(dev, ATSHA204A_ZONE_OTP, false,
TURRIS_ATSHA_OTP_MAC0, mac0);
if (ret)
return ret;
ret = atsha204a_read(dev, ATSHA204A_ZONE_OTP, false,
TURRIS_ATSHA_OTP_MAC1, mac1);
if (ret)
return ret;
atsha204a_sleep(dev);
mac[0] = mac0[1];
mac[1] = mac0[2];
mac[2] = mac0[3];
mac[3] = mac1[1];
mac[4] = mac1[2];
mac[5] = mac1[3];
set_mac_if_invalid((first_idx + 0) % 3, mac);
increment_mac(mac);
set_mac_if_invalid((first_idx + 1) % 3, mac);
increment_mac(mac);
set_mac_if_invalid((first_idx + 2) % 3, mac);
return 0;
}
int turris_atsha_otp_get_serial_number(u32 *version_num, u32 *serial_num)
{
struct udevice *dev = get_atsha204a_dev();
int ret;
if (!dev)
return -1;
ret = atsha204a_wakeup(dev);
if (ret)
return ret;
ret = atsha204a_read(dev, ATSHA204A_ZONE_OTP, false,
TURRIS_ATSHA_OTP_VERSION,
(u8 *)version_num);
if (ret)
return ret;
ret = atsha204a_read(dev, ATSHA204A_ZONE_OTP, false,
TURRIS_ATSHA_OTP_SERIAL,
(u8 *)serial_num);
if (ret)
return ret;
atsha204a_sleep(dev);
return 0;
}

9
board/CZ.NIC/turris_atsha_otp.h Normal file
View File

@@ -0,0 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+
#ifndef TURRIS_ATSHA_OTP_H
#define TURRIS_ATSHA_OTP_H
int turris_atsha_otp_init_mac_addresses(int first_idx);
int turris_atsha_otp_get_serial_number(u32 *version_num, u32 *serial_num);
#endif

73
board/CZ.NIC/turris_mox/mox_sp.c
View File

@@ -8,74 +8,7 @@
#include <asm/io.h>
#include <linux/bitops.h>
#include <linux/delay.h>
#define RWTM_BASE (MVEBU_REGISTER(0xb0000))
#define RWTM_CMD_PARAM(i) (size_t)(RWTM_BASE + (i) * 4)
#define RWTM_CMD (RWTM_BASE + 0x40)
#define RWTM_CMD_RETSTATUS (RWTM_BASE + 0x80)
#define RWTM_CMD_STATUS(i) (size_t)(RWTM_BASE + 0x84 + (i) * 4)
#define RWTM_HOST_INT_RESET (RWTM_BASE + 0xc8)
#define RWTM_HOST_INT_MASK (RWTM_BASE + 0xcc)
#define SP_CMD_COMPLETE BIT(0)
#define MBOX_STS_SUCCESS (0x0 << 30)
#define MBOX_STS_FAIL (0x1 << 30)
#define MBOX_STS_BADCMD (0x2 << 30)
#define MBOX_STS_LATER (0x3 << 30)
#define MBOX_STS_ERROR(s) ((s) & (3 << 30))
#define MBOX_STS_VALUE(s) (((s) >> 10) & 0xfffff)
#define MBOX_STS_CMD(s) ((s) & 0x3ff)
enum mbox_cmd {
MBOX_CMD_GET_RANDOM = 1,
MBOX_CMD_BOARD_INFO,
MBOX_CMD_ECDSA_PUB_KEY,
MBOX_CMD_HASH,
MBOX_CMD_SIGN,
MBOX_CMD_VERIFY,
MBOX_CMD_OTP_READ,
MBOX_CMD_OTP_WRITE
};
static int mbox_do_cmd(enum mbox_cmd cmd, u32 *out, int nout)
{
const int tries = 50;
int i;
u32 status;
clrbits_le32(RWTM_HOST_INT_MASK, SP_CMD_COMPLETE);
writel(cmd, RWTM_CMD);
for (i = 0; i < tries; ++i) {
mdelay(10);
if (readl(RWTM_HOST_INT_RESET) & SP_CMD_COMPLETE)
break;
}
if (i == tries) {
/* if timed out, don't read status */
setbits_le32(RWTM_HOST_INT_RESET, SP_CMD_COMPLETE);
return -ETIMEDOUT;
}
for (i = 0; i < nout; ++i)
out[i] = readl(RWTM_CMD_STATUS(i));
status = readl(RWTM_CMD_RETSTATUS);
setbits_le32(RWTM_HOST_INT_RESET, SP_CMD_COMPLETE);
if (MBOX_STS_CMD(status) != cmd)
return -EIO;
else if (MBOX_STS_ERROR(status) == MBOX_STS_FAIL)
return -(int)MBOX_STS_VALUE(status);
else if (MBOX_STS_ERROR(status) != MBOX_STS_SUCCESS)
return -EIO;
else
return MBOX_STS_VALUE(status);
}
#include <mach/mbox.h>
const char *mox_sp_get_ecdsa_public_key(void)
{
@@ -86,7 +19,7 @@ const char *mox_sp_get_ecdsa_public_key(void)
if (public_key[0])
return public_key;
res = mbox_do_cmd(MBOX_CMD_ECDSA_PUB_KEY, out, 16);
res = mbox_do_cmd(MBOX_CMD_ECDSA_PUB_KEY, NULL, 0, out, 16);
if (res < 0)
return NULL;
@@ -114,7 +47,7 @@ int mbox_sp_get_board_info(u64 *sn, u8 *mac1, u8 *mac2, int *bv, int *ram)
u32 out[8];
int res;
res = mbox_do_cmd(MBOX_CMD_BOARD_INFO, out, 8);
res = mbox_do_cmd(MBOX_CMD_BOARD_INFO, NULL, 0, out, 8);
if (res < 0)
return res;

2
board/CZ.NIC/turris_omnia/Makefile
View File

@@ -2,4 +2,4 @@
#
# Copyright (C) 2017 Marek Behun <marek.behun@nic.cz>
obj-y := turris_omnia.o
obj-y := turris_omnia.o ../turris_atsha_otp.o

108
board/CZ.NIC/turris_omnia/turris_omnia.c
View File

@@ -14,8 +14,6 @@
#include <log.h>
#include <miiphy.h>
#include <mtd.h>
#include <net.h>
#include <netdev.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
@@ -25,10 +23,10 @@
#include <time.h>
#include <linux/bitops.h>
#include <u-boot/crc.h>
# include <atsha204a-i2c.h>
#include "../drivers/ddr/marvell/a38x/ddr3_init.h"
#include <../serdes/a38x/high_speed_env_spec.h>
#include "../turris_atsha_otp.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -71,11 +69,6 @@ enum status_word_bits {
MSATA_IND_STSBIT = 0x0020,
};
#define OMNIA_ATSHA204_OTP_VERSION 0
#define OMNIA_ATSHA204_OTP_SERIAL 1
#define OMNIA_ATSHA204_OTP_MAC0 3
#define OMNIA_ATSHA204_OTP_MAC1 4
/*
* Those values and defines are taken from the Marvell U-Boot version
* "u-boot-2013.01-2014_T3.0"
@@ -594,49 +587,12 @@ int board_late_init(void)
return 0;
}
static struct udevice *get_atsha204a_dev(void)
{
static struct udevice *dev;
if (dev)
return dev;
if (uclass_get_device_by_name(UCLASS_MISC, "atsha204a@64", &dev)) {
puts("Cannot find ATSHA204A on I2C bus!\n");
dev = NULL;
}
return dev;
}
int show_board_info(void)
{
u32 version_num, serial_num;
int err = 1;
int err;
struct udevice *dev = get_atsha204a_dev();
if (dev) {
err = atsha204a_wakeup(dev);
if (err)
goto out;
err = atsha204a_read(dev, ATSHA204A_ZONE_OTP, false,
OMNIA_ATSHA204_OTP_VERSION,
(u8 *)&version_num);
if (err)
goto out;
err = atsha204a_read(dev, ATSHA204A_ZONE_OTP, false,
OMNIA_ATSHA204_OTP_SERIAL,
(u8 *)&serial_num);
if (err)
goto out;
atsha204a_sleep(dev);
}
out:
err = turris_atsha_otp_get_serial_number(&version_num, &serial_num);
printf("Model: Turris Omnia\n");
printf(" RAM size: %i MiB\n", omnia_get_ram_size_gb() * 1024);
if (err)
@@ -648,65 +604,9 @@ out:
return 0;
}
static void increment_mac(u8 *mac)
{
int i;
for (i = 5; i >= 3; i--) {
mac[i] += 1;
if (mac[i])
break;
}
}
static void set_mac_if_invalid(int i, u8 *mac)
{
u8 oldmac[6];
if (is_valid_ethaddr(mac) &&
!eth_env_get_enetaddr_by_index("eth", i, oldmac))
eth_env_set_enetaddr_by_index("eth", i, mac);
}
int misc_init_r(void)
{
int err;
struct udevice *dev = get_atsha204a_dev();
u8 mac0[4], mac1[4], mac[6];
if (!dev)
goto out;
err = atsha204a_wakeup(dev);
if (err)
goto out;
err = atsha204a_read(dev, ATSHA204A_ZONE_OTP, false,
OMNIA_ATSHA204_OTP_MAC0, mac0);
if (err)
goto out;
err = atsha204a_read(dev, ATSHA204A_ZONE_OTP, false,
OMNIA_ATSHA204_OTP_MAC1, mac1);
if (err)
goto out;
atsha204a_sleep(dev);
mac[0] = mac0[1];
mac[1] = mac0[2];
mac[2] = mac0[3];
mac[3] = mac1[1];
mac[4] = mac1[2];
mac[5] = mac1[3];
set_mac_if_invalid(1, mac);
increment_mac(mac);
set_mac_if_invalid(2, mac);
increment_mac(mac);
set_mac_if_invalid(0, mac);
out:
turris_atsha_otp_init_mac_addresses(1);
return 0;
}

4
board/Marvell/mvebu_armada-37xx/board.c
View File

@@ -328,9 +328,10 @@ int board_network_enable(struct mii_dev *bus)
return 0;
}
#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_ENV_IS_IN_SPI_FLASH)
#ifdef CONFIG_OF_BOARD_SETUP
int ft_board_setup(void *blob, struct bd_info *bd)
{
#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
int ret;
int spi_off;
int parts_off;
@@ -424,6 +425,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
return 0;
}
#endif
return 0;
}
#endif

83
board/Marvell/sheevaplug/sheevaplug.c
View File

@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2021 Tony Dinh <mibodhi@gmail.com>
* Copyright (C) 2021-2022 Tony Dinh <mibodhi@gmail.com>
* (C) Copyright 2009
* Marvell Semiconductor <www.marvell.com>
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
@@ -8,17 +8,21 @@
#include <common.h>
#include <init.h>
#include <miiphy.h>
#include <net.h>
#include <netdev.h>
#include <asm/global_data.h>
#include <asm/mach-types.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
#include <asm/arch/mpp.h>
#include "sheevaplug.h"
#include <linux/bitops.h>
DECLARE_GLOBAL_DATA_PTR;
#define SHEEVAPLUG_OE_LOW (~(0))
#define SHEEVAPLUG_OE_HIGH (~(0))
#define SHEEVAPLUG_OE_VAL_LOW BIT(29) /* USB_PWEN low */
#define SHEEVAPLUG_OE_VAL_HIGH BIT(17) /* LED pin high */
int board_early_init_f(void)
{
/*
@@ -88,6 +92,11 @@ int board_early_init_f(void)
return 0;
}
int board_eth_init(struct bd_info *bis)
{
return cpu_eth_init(bis);
}
int board_init(void)
{
/*
@@ -95,72 +104,8 @@ int board_init(void)
*/
gd->bd->bi_arch_number = MACH_TYPE_SHEEVAPLUG;
/* adress of boot parameters */
/* address of boot parameters */
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0;
}
static int fdt_get_phy_addr(const char *path)
{
const void *fdt = gd->fdt_blob;
const u32 *reg;
const u32 *val;
int node, phandle, addr;
/* Find the node by its full path */
node = fdt_path_offset(fdt, path);
if (node >= 0) {
/* Look up phy-handle */
val = fdt_getprop(fdt, node, "phy-handle", NULL);
if (val) {
phandle = fdt32_to_cpu(*val);
if (!phandle)
return -1;
/* Follow it to its node */
node = fdt_node_offset_by_phandle(fdt, phandle);
if (node) {
/* Look up reg */
reg = fdt_getprop(fdt, node, "reg", NULL);
if (reg) {
addr = fdt32_to_cpu(*reg);
return addr;
}
}
}
}
return -1;
}
#ifdef CONFIG_RESET_PHY_R
/* Configure and enable MV88E1116 PHY */
void reset_phy(void)
{
u16 reg;
int phyaddr;
char *name = "ethernet-controller@72000";
char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0";
if (miiphy_set_current_dev(name))
return;
phyaddr = fdt_get_phy_addr(eth0_path);
if (phyaddr < 0)
return;
/*
* Enable RGMII delay on Tx and Rx for CPU port
* Ref: sec 4.7.2 of chip datasheet
*/
miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2);
miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL_REG, &reg);
reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL_REG, reg);
miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0);
/* reset the phy */
miiphy_reset(name, phyaddr);
printf("88E1116 Initialized on %s\n", name);
}
#endif /* CONFIG_RESET_PHY_R */

24
board/Marvell/sheevaplug/sheevaplug.h
View File

@@ -1,24 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2009
* Marvell Semiconductor <www.marvell.com>
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*/
#ifndef __SHEEVAPLUG_H
#define __SHEEVAPLUG_H
#define SHEEVAPLUG_OE_LOW (~(0))
#define SHEEVAPLUG_OE_HIGH (~(0))
#define SHEEVAPLUG_OE_VAL_LOW (1 << 29) /* USB_PWEN low */
#define SHEEVAPLUG_OE_VAL_HIGH (1 << 17) /* LED pin high */
/* PHY related */
#define MV88E1116_LED_FCTRL_REG 10
#define MV88E1116_CPRSP_CR3_REG 21
#define MV88E1116_MAC_CTRL_REG 21
#define MV88E1116_PGADR_REG 22
#define MV88E1116_RGMII_TXTM_CTRL (1 << 4)
#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
#endif /* __SHEEVAPLUG_H */