leandrof/u-boot
1
0
Fork 1
Code Issues Pull Requests Packages Projects Releases Wiki Activity

* Code cleanup, mostly for GCC-3.3.x

Browse Source 
* Cleanup confusing use of CONFIG_ETH*ADDR - ust his only to
  pre-define a MAC address; use CONFIG_HAS_ETH* to enable support for
  additional ethernet addresses.

* Cleanup drivers/i82365.c - avoid duplication of code

* Fix bogus "cannot span across banks" flash error message

* Add support for CompactFlash for the CPC45 Board.
This commit is contained in:
wdenk
2004-12-31 09:32:47 +00:00
parent 400ab719c6
commit e2ffd59b4d
59 changed files with 964 additions and 129 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
board/cmc_pu2/flash.c
View File

@@ -264,7 +264,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
{
vu_short *addr = (vu_short *)(info->start[0]);
int flag, prot, sect, ssect, l_sect;
ulong start, now, last;
ulong now, last;
debug ("flash_erase: first: %d last: %d\n", s_first, s_last);
@@ -336,7 +336,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
goto DONE;
reset_timer_masked ();
last = start;
last = 0;
addr = (vu_short *)(info->start[l_sect]);
while ((addr[0] & 0x0080) != 0x0080) {
if ((now = get_timer_masked ()) > CFG_FLASH_ERASE_TOUT) {
@@ -432,7 +432,6 @@ printf ("write_buff 1: write_word_amd() rc=%d\n", rc);
*/
static int write_word_amd (flash_info_t *info, vu_short *dest, ushort data)
{
ulong start;
int flag;
vu_short *base; /* first address in flash bank */

2
board/cpc45/Makefile
View File

@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = lib$(BOARD).a
OBJS = $(BOARD).o flash.o plx9030.o
OBJS = $(BOARD).o flash.o plx9030.o pd67290.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $(OBJS)

40
board/cpc45/cpc45.c
View File

@@ -24,11 +24,13 @@
#include <common.h>
#include <mpc824x.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <pci.h>
#include <i2c.h>
int sysControlDisplay(int digit, uchar ascii_code);
extern void Plx9030Init(void);
extern void SPD67290Init(void);
/* We have to clear the initial data area here. Couldn't have done it
* earlier because DRAM had not been initialized.
@@ -180,6 +182,10 @@ static struct pci_config_table pci_cpc45_config_table[] = {
pci_cfgfunc_config_device, { PCI_PLX9030_IOADDR,
PCI_PLX9030_MEMADDR,
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0E, PCI_ANY_ID,
pci_cfgfunc_config_device, { PCMCIA_IO_BASE,
PCMCIA_IO_BASE,
PCI_COMMAND_MEMORY | PCI_COMMAND_IO }},
#endif /*CONFIG_PCI_PNP*/
{ }
};
@@ -233,3 +239,37 @@ int sysControlDisplay (int digit, /* number of digit 0..7 */
return (0);
}
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
#ifdef CFG_PCMCIA_MEM_ADDR
volatile unsigned char *pcmcia_mem = (unsigned char*)CFG_PCMCIA_MEM_ADDR;
#endif
int pcmcia_init(void)
{
u_int rc;
debug ("Enable PCMCIA " PCMCIA_SLOT_MSG "\n");
rc = i82365_init();
return rc;
}
#endif /* CFG_CMD_PCMCIA */
# ifdef CONFIG_IDE_LED
void ide_led (uchar led, uchar status)
{
u_char val;
/* We have one PCMCIA slot and use LED H4 for the IDE Interface */
val = readb(BCSR_BASE + 0x04);
if (status) { /* led on */
val |= B_CTRL_LED0;
} else {
val &= ~B_CTRL_LED0;
}
writeb(val, BCSR_BASE + 0x04);
}
# endif

68
board/cpc45/pd67290.c Normal file
View File

@@ -0,0 +1,68 @@
/* pd67290.c - system configuration module for SPD67290
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
* (C) 2004 DENX Software Engineering, Heiko Schocher <hs@denx.de>
*/
#include <common.h>
#include <malloc.h>
#include <net.h>
#include <asm/io.h>
#include <pci.h>
/* imports */
#include <mpc824x.h>
static struct pci_device_id supported[] = {
{PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_6729},
{}
};
/***************************************************************************
*
* SPD67290Init -
*
* RETURNS: -1 on error, 0 if OK
*/
int SPD67290Init (void)
{
pci_dev_t devno;
int idx = 0; /* general index */
ulong membaseCsr; /* base address of device memory space */
/* find PD67290 device */
if ((devno = pci_find_devices (supported, idx++)) < 0) {
printf ("No PD67290 device found !!\n");
return -1;
}
/* - 0xfe000000 see MPC 8245 Users Manual Adress Map B */
membaseCsr = PCMCIA_IO_BASE - 0xfe000000;
/* set base address */
pci_write_config_dword (devno, PCI_BASE_ADDRESS_0, membaseCsr);
/* enable mapped memory and IO addresses */
pci_write_config_dword (devno,
PCI_COMMAND,
PCI_COMMAND_MEMORY |
PCI_COMMAND_IO | PCI_COMMAND_WAIT);
return 0;
}

24
board/esd/cpci750/cpci750.c
View File

@@ -494,18 +494,18 @@ static void move64 (unsigned long long *src, unsigned long long *dest)
#if defined (CFG_DRAM_TEST_DATA)
unsigned long long pattern[] = {
0xaaaaaaaaaaaaaaaa,
0xcccccccccccccccc,
0xf0f0f0f0f0f0f0f0,
0xff00ff00ff00ff00,
0xffff0000ffff0000,
0xffffffff00000000,
0x00000000ffffffff,
0x0000ffff0000ffff,
0x00ff00ff00ff00ff,
0x0f0f0f0f0f0f0f0f,
0x3333333333333333,
0x5555555555555555
0xaaaaaaaaaaaaaaaaLL,
0xccccccccccccccccLL,
0xf0f0f0f0f0f0f0f0LL,
0xff00ff00ff00ff00LL,
0xffff0000ffff0000LL,
0xffffffff00000000LL,
0x00000000ffffffffLL,
0x0000ffff0000ffffLL,
0x00ff00ff00ff00ffLL,
0x0f0f0f0f0f0f0f0fLL,
0x3333333333333333LL,
0x5555555555555555LL,
};
/*********************************************************************/

2
board/esd/cpci750/local.h
View File

@@ -76,7 +76,9 @@
#define CONFIG_ETHADDR 64:36:00:00:00:01
/* next two ethernet hwaddrs */
#define CONFIG_HAS_ETH1
#define CONFIG_ETH1ADDR 86:06:2d:7e:c6:54
#define CONFIG_HAS_ETH2
#define CONFIG_ETH2ADDR 86:06:2d:7e:c6:55
#define CONFIG_ENV_OVERWRITE

2
board/esd/pci405/pci405.c
View File

@@ -306,7 +306,7 @@ int misc_init_r (void)
/* mtspr(ccr0, (mfspr(ccr0) & 0xff8fffff) | 0x00100000); */
mtspr(ccr0, (mfspr(ccr0) & 0xff8fffff) | 0x00000000);
#endif
/* printf("CCR0=%08x\n", mfspr(ccr0));*/ /* test-only */
/* printf("CCR0=%08x\n", mfspr(ccr0)); */ /* test-only */
#endif
free(dst);

2
board/evb64260/local.h
View File

@@ -53,7 +53,9 @@
#define CONFIG_ETHADDR 00:11:22:33:44:55
/* next two ethernet hwaddrs */
#define CONFIG_HAS_ETH1
#define CONFIG_ETH1ADDR 00:11:22:33:44:66
#define CONFIG_HAS_ETH2
#define CONFIG_ETH2ADDR 00:11:22:33:44:77
#define CONFIG_ENV_OVERWRITE

2
board/jse/host_bridge.c
View File

@@ -39,8 +39,6 @@ void host_bridge_init (void)
/* The bridge chip is at a fixed location. */
pci_dev_t dev = PCI_BDF (0, 10, 0);
int rc;
/* Set PCI Class code --
The primary side sees this class code at 0x08 in the
primary config space. This must be something other then a

2
board/pn62/pn62.c
View File

@@ -145,11 +145,13 @@ int misc_init_r (void)
}
show_startup_phase (10);
#ifdef CONFIG_HAS_ETH1
if (getenv ("eth1addr") == NULL &&
get_mac_address (1, mac, str, sizeof (str)) > 0) {
setenv ("eth1addr", str);
memcpy (gd->bd->bi_enet1addr, mac, 6);
}
#endif /* CONFIG_HAS_ETH1 */
show_startup_phase (11);
/* Tell everybody that U-Boot is up and runnig */

5
board/xilinx/xilinx_iic/iic_adapter.c
View File

@@ -328,8 +328,9 @@ convert_env(void)
s = getenv("E");
if (s != NULL) {
sprintf(temp, "%c%c.%c%c.%c%c.%c%c.%c%c.%c%c",
*s++, *s++, *s++, *s++, *s++, *s++,
*s++, *s++, *s++, *s++, *s++, *s);
s[0], s[1], s[ 2], s[ 3],
s[4], s[5], s[ 6], s[ 7],
s[8], s[9], s[10], s[11] );
setenv("ethaddr", temp);
setenv("E", NULL);
}