armv8: fsl-layerscape: SMP support for loading 32-bit OS
Spin-table method is used for secondary cores to load 32-bit OS. The architecture information will be got through checking FIT image and saved in the os_arch element of spin-table, then the secondary cores will check os_arch and jump to 32-bit OS or 64-bit OS automatically. Signed-off-by: Alison Wang <alison.wang@nxp.com> Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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@ -24,6 +24,16 @@ phys_addr_t determine_mp_bootpg(void)
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return (phys_addr_t)&secondary_boot_code;
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}
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void update_os_arch_secondary_cores(uint8_t os_arch)
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{
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u64 *table = get_spin_tbl_addr();
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int i;
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for (i = 1; i < CONFIG_MAX_CPUS; i++)
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table[i * WORDS_PER_SPIN_TABLE_ENTRY +
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SPIN_TABLE_ELEM_OS_ARCH_IDX] = os_arch;
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}
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#ifdef CONFIG_FSL_LSCH3
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void wake_secondary_core_n(int cluster, int core, int cluster_cores)
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{
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@ -13,6 +13,7 @@
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* uint64_t entry_addr;
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* uint64_t status;
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* uint64_t lpid;
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* uint64_t os_arch;
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* };
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* we pad this struct to 64 bytes so each entry is in its own cacheline
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* the actual spin table is an array of these structures
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@ -20,6 +21,7 @@
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#define SPIN_TABLE_ELEM_ENTRY_ADDR_IDX 0
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#define SPIN_TABLE_ELEM_STATUS_IDX 1
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#define SPIN_TABLE_ELEM_LPID_IDX 2
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#define SPIN_TABLE_ELEM_OS_ARCH_IDX 3
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#define WORDS_PER_SPIN_TABLE_ENTRY 8 /* pad to 64 bytes */
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#define SPIN_TABLE_ELEM_SIZE 64
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@ -277,6 +277,10 @@ bool armv7_boot_nonsec(void)
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#endif
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#ifdef CONFIG_ARM64
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__weak void update_os_arch_secondary_cores(uint8_t os_arch)
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{
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}
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#ifdef CONFIG_ARMV8_SWITCH_TO_EL1
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static void switch_to_el1(void)
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{
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@ -314,6 +318,8 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
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if (!fake) {
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do_nonsec_virt_switch();
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update_os_arch_secondary_cores(images->os.arch);
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#ifdef CONFIG_ARMV8_SWITCH_TO_EL1
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armv8_switch_to_el2((u64)images->ft_addr, 0, 0,
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(u64)switch_to_el1, ES_TO_AARCH64);
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