usb: ehci-mx6: use phy_type from device tree
Allow using different PHY interfaces for multiple USB controllers. When no value is set in DT, we fall back to CONFIG_MXC_USB_PORTSC for now to stay compatible with current board configurations. This also adds support for the HSIC mode of the i.MX7. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
This commit is contained in:
committed by
Ramon Fried
parent
656bc27d50
commit
e2a41bf638
@@ -23,6 +23,7 @@
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#include <asm/mach-types.h>
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#include <asm/mach-types.h>
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#include <power/regulator.h>
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#include <power/regulator.h>
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#include <linux/usb/otg.h>
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#include <linux/usb/otg.h>
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#include <linux/usb/phy.h>
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#include "ehci.h"
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#include "ehci.h"
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@@ -435,6 +436,7 @@ struct ehci_mx6_priv_data {
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struct clk clk;
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struct clk clk;
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struct phy phy;
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struct phy phy;
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enum usb_init_type init_type;
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enum usb_init_type init_type;
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enum usb_phy_interface phy_type;
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#if !defined(CONFIG_PHY)
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#if !defined(CONFIG_PHY)
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int portnr;
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int portnr;
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void __iomem *phy_addr;
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void __iomem *phy_addr;
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@@ -443,6 +445,24 @@ struct ehci_mx6_priv_data {
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#endif
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#endif
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};
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};
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static u32 mx6_portsc(enum usb_phy_interface phy_type)
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{
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switch (phy_type) {
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case USBPHY_INTERFACE_MODE_UTMI:
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return PORT_PTS_UTMI;
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case USBPHY_INTERFACE_MODE_UTMIW:
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return PORT_PTS_UTMI | PORT_PTS_PTW;
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case USBPHY_INTERFACE_MODE_ULPI:
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return PORT_PTS_ULPI;
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case USBPHY_INTERFACE_MODE_SERIAL:
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return PORT_PTS_SERIAL;
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case USBPHY_INTERFACE_MODE_HSIC:
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return PORT_PTS_HSIC;
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default:
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return CONFIG_MXC_USB_PORTSC;
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}
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}
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static int mx6_init_after_reset(struct ehci_ctrl *dev)
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static int mx6_init_after_reset(struct ehci_ctrl *dev)
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{
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{
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struct ehci_mx6_priv_data *priv = dev->priv;
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struct ehci_mx6_priv_data *priv = dev->priv;
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@@ -479,7 +499,7 @@ static int mx6_init_after_reset(struct ehci_ctrl *dev)
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return 0;
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return 0;
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setbits_le32(&ehci->usbmode, CM_HOST);
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setbits_le32(&ehci->usbmode, CM_HOST);
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writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc);
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writel(mx6_portsc(priv->phy_type), &ehci->portsc);
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setbits_le32(&ehci->portsc, USB_EN);
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setbits_le32(&ehci->portsc, USB_EN);
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mdelay(10);
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mdelay(10);
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@@ -641,6 +661,7 @@ static int ehci_usb_probe(struct udevice *dev)
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priv->ehci = ehci;
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priv->ehci = ehci;
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priv->init_type = type;
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priv->init_type = type;
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priv->phy_type = usb_get_phy_mode(dev_ofnode(dev));
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#if CONFIG_IS_ENABLED(CLK)
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#if CONFIG_IS_ENABLED(CLK)
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ret = clk_get_by_index(dev, 0, &priv->clk);
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ret = clk_get_by_index(dev, 0, &priv->clk);
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@@ -690,7 +711,7 @@ static int ehci_usb_probe(struct udevice *dev)
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if (priv->init_type == USB_INIT_HOST) {
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if (priv->init_type == USB_INIT_HOST) {
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setbits_le32(&ehci->usbmode, CM_HOST);
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setbits_le32(&ehci->usbmode, CM_HOST);
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writel(CONFIG_MXC_USB_PORTSC, &ehci->portsc);
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writel(mx6_portsc(priv->phy_type), &ehci->portsc);
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setbits_le32(&ehci->portsc, USB_EN);
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setbits_le32(&ehci->portsc, USB_EN);
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}
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}
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@@ -23,6 +23,7 @@
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#define PORT_PTS_ULPI (2 << 30)
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#define PORT_PTS_ULPI (2 << 30)
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#define PORT_PTS_SERIAL (3 << 30)
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#define PORT_PTS_SERIAL (3 << 30)
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#define PORT_PTS_PTW (1 << 28)
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#define PORT_PTS_PTW (1 << 28)
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#define PORT_PTS_HSIC (1 << 25)
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#define PORT_PFSC (1 << 24) /* Defined on Page 39-44 of the mpc5151 ERM */
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#define PORT_PFSC (1 << 24) /* Defined on Page 39-44 of the mpc5151 ERM */
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#define PORT_PTS_PHCD (1 << 23)
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#define PORT_PTS_PHCD (1 << 23)
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#define PORT_PP (1 << 12)
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#define PORT_PP (1 << 12)
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