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mmc: sdhci: revert "mmc: sdhci: Claer high speed if not supported"

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This "commit 429790026021d522d51617217d4b86218cca5750" is wrong.
SDHCI_QUIRK_NO_HISPD_BIT is for skipping to set CTRL_HISPD bit.

For example, Exynos didn't have CTRL_HISPD. But Highspeed mode
is supported.
(This quirks doesn't mean  that driver didn't support the Highseepd mode.)

Note: If driver didn't support the Highspeed Mode, use or add the other
quirks.

After applied this patch, all Exynos SoCs are just running with 25MHz.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
This commit is contained in:
Jaehoon Chung 2016-07-26 19:03:49 +09:00
parent 1bd4f92cdb
commit e1ea7c44d6
1 changed files with 0 additions and 3 deletions
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3
drivers/mmc/sdhci.c
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@ -554,9 +554,6 @@ int sdhci_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth,
cfg->host_caps |= MMC_MODE_8BIT;
}
if (quirks & SDHCI_QUIRK_NO_HISPD_BIT)
cfg->host_caps &= ~(MMC_MODE_HS | MMC_MODE_HS_52MHz);
if (host_caps)
cfg->host_caps |= host_caps;