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Merge branch 'master' of git://git.denx.de/u-boot-mmc

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This commit is contained in:
Tom Rini 2013-12-10 09:33:13 -05:00
commit e1e3de7951
7 changed files with 71 additions and 17 deletions
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1
drivers/mmc/Makefile
View File

@ -9,6 +9,7 @@ obj-$(CONFIG_BFIN_SDH) += bfin_sdh.o
obj-$(CONFIG_DAVINCI_MMC) += davinci_mmc.o
obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o
obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o
obj-$(CONFIG_FTSDC021) += ftsdc021_sdhci.o
obj-$(CONFIG_GENERIC_MMC) += mmc.o
obj-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o
obj-$(CONFIG_MMC_SPI) += mmc_spi.o

21
drivers/mmc/dw_mmc.c
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@ -11,7 +11,6 @@
#include <mmc.h>
#include <dwmmc.h>
#include <asm-generic/errno.h>
#include <asm/arch/dwmmc.h>
#define PAGE_SIZE 4096
@ -300,17 +299,9 @@ static void dwmci_set_ios(struct mmc *mmc)
static int dwmci_init(struct mmc *mmc)
{
struct dwmci_host *host = (struct dwmci_host *)mmc->priv;
u32 fifo_size;
if (host->quirks & DWMCI_QUIRK_DISABLE_SMU) {
dwmci_writel(host, EMMCP_MPSBEGIN0, 0);
dwmci_writel(host, EMMCP_SEND0, 0);
dwmci_writel(host, EMMCP_CTRL0,
MPSCTRL_SECURE_READ_BIT |
MPSCTRL_SECURE_WRITE_BIT |
MPSCTRL_NON_SECURE_READ_BIT |
MPSCTRL_NON_SECURE_WRITE_BIT | MPSCTRL_VALID);
}
if (host->board_init)
host->board_init(host);
dwmci_writel(host, DWMCI_PWREN, 1);
@ -330,13 +321,9 @@ static int dwmci_init(struct mmc *mmc)
dwmci_writel(host, DWMCI_IDINTEN, 0);
dwmci_writel(host, DWMCI_BMOD, 1);
if (!host->fifoth_val) {
fifo_size = dwmci_readl(host, DWMCI_FIFOTH);
fifo_size = ((fifo_size & RX_WMARK_MASK) >> RX_WMARK_SHIFT) + 1;
host->fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size / 2 - 1) |
TX_WMARK(fifo_size / 2);
if (host->fifoth_val) {
dwmci_writel(host, DWMCI_FIFOTH, host->fifoth_val);
}
dwmci_writel(host, DWMCI_FIFOTH, host->fifoth_val);
dwmci_writel(host, DWMCI_CLKENA, 0);
dwmci_writel(host, DWMCI_CLKSRC, 0);

14
drivers/mmc/exynos_dw_mmc.c
View File

@ -34,6 +34,19 @@ unsigned int exynos_dwmci_get_clk(int dev_index)
return get_mmc_clk(dev_index);
}
static void exynos_dwmci_board_init(struct dwmci_host *host)
{
if (host->quirks & DWMCI_QUIRK_DISABLE_SMU) {
dwmci_writel(host, EMMCP_MPSBEGIN0, 0);
dwmci_writel(host, EMMCP_SEND0, 0);
dwmci_writel(host, EMMCP_CTRL0,
MPSCTRL_SECURE_READ_BIT |
MPSCTRL_SECURE_WRITE_BIT |
MPSCTRL_NON_SECURE_READ_BIT |
MPSCTRL_NON_SECURE_WRITE_BIT | MPSCTRL_VALID);
}
}
/*
* This function adds the mmc channel to be registered with mmc core.
* index - mmc channel number.
@ -65,6 +78,7 @@ int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel)
#ifdef CONFIG_EXYNOS5420
host->quirks = DWMCI_QUIRK_DISABLE_SMU;
#endif
host->board_init = exynos_dwmci_board_init;
if (clksel) {
host->clksel_val = clksel;

5
drivers/mmc/fsl_esdhc_spl.c
View File

@ -42,6 +42,10 @@ void __noreturn mmc_boot(void)
hang();
}
#ifdef CONFIG_FSL_CORENET
offset = CONFIG_SYS_MMC_U_BOOT_OFFS;
code_len = CONFIG_SYS_MMC_U_BOOT_SIZE;
#else
blklen = mmc->read_bl_len;
tmp_buf = malloc(blklen);
if (!tmp_buf) {
@ -91,6 +95,7 @@ void __noreturn mmc_boot(void)
/*
* Load U-Boot image from mmc into RAM
*/
#endif
blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len;
blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len;
err = mmc->block_dev.block_read(0, blk_start, blk_cnt,

33
drivers/mmc/ftsdc021_sdhci.c Normal file
View File

@ -0,0 +1,33 @@
/*
* (C) Copyright 2013 Faraday Technology
* Kuo-Jung Su <dantesu@faraday-tech.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <malloc.h>
#include <sdhci.h>
#ifndef CONFIG_FTSDC021_CLOCK
#define CONFIG_FTSDC021_CLOCK clk_get_rate("MMC")
#endif
int ftsdc021_sdhci_init(u32 regbase)
{
struct sdhci_host *host = NULL;
uint32_t freq = CONFIG_FTSDC021_CLOCK;
host = calloc(1, sizeof(struct sdhci_host));
if (!host) {
puts("sdh_host malloc fail!\n");
return 1;
}
host->name = "FTSDC021";
host->ioaddr = (void __iomem *)regbase;
host->quirks = 0;
add_sdhci(host, freq, 0);
return 0;
}

1
include/dwmmc.h
View File

@ -141,6 +141,7 @@ struct dwmci_host {
struct mmc *mmc;
void (*clksel)(struct dwmci_host *host);
void (*board_init)(struct dwmci_host *host);
unsigned int (*get_mmc_clk)(int dev_index);
};

13
include/faraday/ftsdc021.h Normal file
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@ -0,0 +1,13 @@
/*
* (C) Copyright 2013 Faraday Technology
* Dante Su <dantesu@faraday-tech.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __FTSDC021_H
#define __FTSDC021_H
int ftsdc021_sdhci_init(u32 regbase);
#endif /* __FTSDC021_H */