socrates: changes to support FDT
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
This commit is contained in:
Sergei Poselenov
Wolfgang Denk
parent
5d108ac8f4
commit
e18575d5f5
@ -33,6 +33,8 @@
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#include <asm/immap_85xx.h>
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#include <ioports.h>
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#include <flash.h>
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#include <libfdt.h>
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#include <fdt_support.h>
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DECLARE_GLOBAL_DATA_PTR;
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@ -184,3 +186,26 @@ int board_early_init_r (void)
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return (0);
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}
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#endif /* CONFIG_BOARD_EARLY_INIT_R */
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#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
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void
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ft_board_setup(void *blob, bd_t *bd)
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{
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u32 val[4];
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int rc;
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ft_cpu_setup(blob, bd);
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/* Fixup NOR mapping */
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val[0] = 0; /* chip select number */
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val[1] = 0; /* always 0 */
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val[2] = gd->bd->bi_flashstart;
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val[3] = gd->bd->bi_flashsize;
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rc = fdt_find_and_setprop(blob, "/localbus", "ranges",
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val, sizeof(val), 1);
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if (rc)
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printf("Unable to update property NOR mapping, err=%s\n",
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fdt_strerror(rc));
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}
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#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
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@ -114,11 +114,9 @@
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#define CFG_DDR_CLK_CONTROL 0x03800000
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#define CFG_SDRAM_SIZE 256 /* in Megs */
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#if 1
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#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for DDR setup*/
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#define SPD_EEPROM_ADDRESS 0x50 /* DDR DIMM */
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#define MPC85xx_DDR_SDRAM_CLK_CNTL /* 85xx has clock control reg */
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#endif
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/*
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* Flash on the Local Bus
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@ -145,7 +143,7 @@
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#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector */
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#define CFG_MAX_FLASH_BANKS 2 /* number of banks */
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#define CFG_MAX_FLASH_SECT 512 /* sectors per device */
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#define CFG_MAX_FLASH_SECT 256 /* sectors per device */
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#undef CFG_FLASH_CHECKSUM
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#define CFG_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
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#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
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@ -205,28 +203,8 @@
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#define CFG_I2C_OFFSET 0x3000
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/* I2C RTC */
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#define CONFIG_RTC_DS1337 /* Use ds1337 rtc via i2c */
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#define CFG_I2C_RTC_ADDR 0x68 /* at address 0x68 */
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#if 0
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/* I2C EEPROM */
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/*
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* EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work also).
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*/
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#define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
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#define CFG_I2C_EEPROM_ADDR_LEN 2
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#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
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#define CFG_EEPROM_PAGE_WRITE_ENABLE
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
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#define CFG_I2C_MULTI_EEPROMS 1 /* more than one eeprom */
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/* I2C SYSMON (LM75) */
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#define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */
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#define CONFIG_DTT_SENSORS {0} /* Sensor addresses */
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#define CFG_DTT_MAX_TEMP 70
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#define CFG_DTT_LOW_TEMP -30
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#define CFG_DTT_HYSTERESIS 3
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#endif
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#define CONFIG_RTC_RX8025 /* Use Epson rx8025 rtc via i2c */
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#define CFG_I2C_RTC_ADDR 0x32 /* at address 0x32 */
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/* RapidIO MMU */
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#define CFG_RIO_MEM_BASE 0xc0000000 /* base address */
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@ -280,6 +258,9 @@
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#define CONFIG_ETHPRIME "TSEC0"
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#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
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#define CONFIG_HAS_ETH0
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#define CONFIG_HAS_ETH1
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/*
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* Environment
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*/
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@ -379,7 +360,7 @@
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#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"bootfile=/tftpboot/socrates\0" \
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"bootfile=/tftpboot/socrates/uImage\0" \
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"netdev=eth0\0" \
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"consdev=ttyS0\0" \
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"nfsargs=setenv bootargs root=/dev/nfs rw " \
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@ -390,15 +371,22 @@
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":$hostname:$netdev:off panic=1\0" \
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"addcons=setenv bootargs $bootargs " \
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"console=$consdev,$baudrate\0" \
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"flash_nfs=run nfsargs addip addcons;" \
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"bootm $kernel_addr\0" \
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"flash_self=run ramargs addip addcons;" \
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"bootm $kernel_addr $ramdisk_addr\0" \
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"net_nfs=tftp $loadaddr $bootfile;" \
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"run nfsargs addip addcons;bootm\0" \
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"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
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"flash_nfs=run nfsargs addip addcons;" \
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"bootm ${kernel_addr} - ${fdt_addr}\0" \
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"net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
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"tftp ${fdt_addr_r} ${fdt_file}; " \
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"run nfsargs addip addcons;" \
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"bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
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"fdt_file=socrates/socrates.dtb\0" \
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"fdt_addr_r=B00000\0" \
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"fdt_addr=FC1E0000\0" \
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"rootpath=/opt/eldk/ppc_85xx\0" \
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"kernel_addr=FE000000\0" \
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"ramdisk_addr=FE180000\0" \
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"kernel_addr=FC000000\0" \
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"kernel_addr_r=200000\0" \
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"ramdisk_addr=FC200000\0" \
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"ramdisk_addr_r=400000\0" \
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"load=tftp 100000 /tftpboot/$hostname/u-boot.bin\0" \
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"update=protect off fffc0000 ffffffff;era fffc0000 ffffffff;" \
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"cp.b 100000 fffc0000 40000;" \
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@ -407,4 +395,8 @@
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""
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#define CONFIG_BOOTCOMMAND "run flash_self"
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/* pass open firmware flat tree */
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#define CONFIG_OF_LIBFDT 1
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#define CONFIG_OF_BOARD_SETUP 1
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#endif /* __CONFIG_H */
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