diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index 27193e08f7..4205fb7b52 100644
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -82,9 +82,7 @@ int cpu_eth_init(bd_t *bis)
 	/* Release the EMAC controller from reset */
 	socfpga_per_reset(reset, 0);
 
-	/* initialize and register the emac */
-	return designware_initialize(CONFIG_EMAC_BASE,
-				     CONFIG_PHY_INTERFACE_MODE);
+	return 0;
 }
 #endif
 
diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
index 992ce7e0de..75ed347f0e 100644
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@@ -7,6 +7,7 @@ CONFIG_SPL=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_OF_CONTROL=y
 CONFIG_SPI_FLASH=y
+CONFIG_DM_ETH=y
 CONFIG_NETDEVICES=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SPL_DM=y
diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
index 98894bb283..2e50ce9a2c 100644
--- a/configs/socfpga_socrates_defconfig
+++ b/configs/socfpga_socrates_defconfig
@@ -7,6 +7,7 @@ CONFIG_SPL=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_OF_CONTROL=y
 CONFIG_SPI_FLASH=y
+CONFIG_DM_ETH=y
 CONFIG_NETDEVICES=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_SPL_DM=y
diff --git a/include/configs/socfpga_arria5.h b/include/configs/socfpga_arria5.h
index 2d31df8a45..ff02ed5393 100644
--- a/include/configs/socfpga_arria5.h
+++ b/include/configs/socfpga_arria5.h
@@ -49,7 +49,6 @@
 /* Ethernet on SoC (EMAC) */
 #if defined(CONFIG_CMD_NET)
 #define CONFIG_EMAC_BASE		SOCFPGA_EMAC1_ADDRESS
-#define CONFIG_PHY_INTERFACE_MODE	PHY_INTERFACE_MODE_RGMII
 
 /* PHY */
 #define CONFIG_PHY_MICREL
diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h
index 96d5412b1e..90ba0c9f76 100644
--- a/include/configs/socfpga_cyclone5.h
+++ b/include/configs/socfpga_cyclone5.h
@@ -49,7 +49,6 @@
 /* Ethernet on SoC (EMAC) */
 #if defined(CONFIG_CMD_NET)
 #define CONFIG_EMAC_BASE		SOCFPGA_EMAC1_ADDRESS
-#define CONFIG_PHY_INTERFACE_MODE	PHY_INTERFACE_MODE_RGMII
 
 /* PHY */
 #define CONFIG_PHY_MICREL