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armv8: fsl-lsch3: Conditionally apply workaround for erratum a0009203

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This i2c errata only applies to LS2080A and its variants, namely
LS2080A, LS2085A and LS2088A.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Ashish kumar 2017-02-23 16:03:57 +05:30 committed by York Sun
parent 2652a28fee
commit dd48f0bfb5
2 changed files with 8 additions and 0 deletions
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4
arch/arm/cpu/armv8/fsl-layerscape/Kconfig
View File

@ -73,6 +73,7 @@ config ARCH_LS2080A
select SYS_FSL_ERRATUM_A009803
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_A010165
select SYS_FSL_ERRATUM_A009203
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
@ -307,6 +308,9 @@ config SYS_FSL_ERRATUM_A008585
config SYS_FSL_ERRATUM_A008850
bool
config SYS_FSL_ERRATUM_A009203
bool
config SYS_FSL_ERRATUM_A009635
bool

4
arch/arm/cpu/armv8/fsl-layerscape/soc.c
View File

@ -152,6 +152,7 @@ static void erratum_rcw_src(void)
* This erratum requires setting glitch_en bit to enable
* digital glitch filter to improve clock stability.
*/
#ifdef CONFIG_SYS_FSL_ERRATUM_A009203
static void erratum_a009203(void)
{
u8 __iomem *ptr;
@ -178,6 +179,7 @@ static void erratum_a009203(void)
#endif
#endif
}
#endif
void bypass_smmu(void)
{
@ -191,7 +193,9 @@ void fsl_lsch3_early_init_f(void)
{
erratum_rcw_src();
init_early_memctl_regs(); /* tighten IFC timing */
#ifdef CONFIG_SYS_FSL_ERRATUM_A009203
erratum_a009203();
#endif
erratum_a008514();
erratum_a008336();
#ifdef CONFIG_CHAIN_OF_TRUST