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Merge git://git.denx.de/u-boot-socfpga

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- Assorted Gen5 fixes
This commit is contained in:
Tom Rini
2019-11-28 07:34:41 -05:00
parent c4f697b291 a1a9843a29
commit dd38416d6b
3 changed files with 24 additions and 1 deletions
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11
Makefile
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@@ -1476,6 +1476,17 @@ cmd_socboot = cat spl/u-boot-spl.sfp spl/u-boot-spl.sfp \
u-boot.img > $@ || rm -f $@ u-boot.img > $@ || rm -f $@
u-boot-with-spl.sfp: spl/u-boot-spl.sfp u-boot.img FORCE u-boot-with-spl.sfp: spl/u-boot-spl.sfp u-boot.img FORCE
$(call if_changed,socboot) $(call if_changed,socboot)
quiet_cmd_socnandboot = SOCNANDBOOT $@
cmd_socnandboot = dd if=/dev/zero of=spl/u-boot-spl.pad bs=64 count=1024 ; \
cat spl/u-boot-spl.sfp spl/u-boot-spl.pad \
spl/u-boot-spl.sfp spl/u-boot-spl.pad \
spl/u-boot-spl.sfp spl/u-boot-spl.pad \
spl/u-boot-spl.sfp spl/u-boot-spl.pad \
u-boot.img > $@ || rm -f $@ spl/u-boot-spl.pad
u-boot-with-nand-spl.sfp: spl/u-boot-spl.sfp u-boot.img FORCE
$(call if_changed,socnandboot)
endif endif
ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy) ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy)

7
arch/arm/mach-socfpga/misc_gen5.c
View File

@@ -79,6 +79,8 @@ static const struct {
{ 0x2d02, "Cyclone V, SE/A6 or SX/C6 or ST/D6", "cv_se_a6" }, { 0x2d02, "Cyclone V, SE/A6 or SX/C6 or ST/D6", "cv_se_a6" },
/* Arria V */ /* Arria V */
{ 0x2d03, "Arria V, D5", "av_d5" }, { 0x2d03, "Arria V, D5", "av_d5" },
/* Arria V ST/SX */
{ 0x2d13, "Arria V, ST/D3 or SX/B3", "av_st_d3" },
}; };
static int socfpga_fpga_id(const bool print_id) static int socfpga_fpga_id(const bool print_id)
@@ -228,10 +230,13 @@ void do_bridge_reset(int enable, unsigned int mask)
writel(iswgrp_handoff[3], &sdr_ctrl->fpgaport_rst); writel(iswgrp_handoff[3], &sdr_ctrl->fpgaport_rst);
writel(iswgrp_handoff[0], &reset_manager_base->brg_mod_reset); writel(iswgrp_handoff[0], &reset_manager_base->brg_mod_reset);
writel(iswgrp_handoff[1], &nic301_regs->remap); writel(iswgrp_handoff[1], &nic301_regs->remap);
writel(0x7, &reset_manager_base->brg_mod_reset);
writel(iswgrp_handoff[0], &reset_manager_base->brg_mod_reset);
} else { } else {
writel(0, &sysmgr_regs->fpgaintfgrp_module); writel(0, &sysmgr_regs->fpgaintfgrp_module);
writel(0, &sdr_ctrl->fpgaport_rst); writel(0, &sdr_ctrl->fpgaport_rst);
writel(0, &reset_manager_base->brg_mod_reset); writel(0x7, &reset_manager_base->brg_mod_reset);
writel(1, &nic301_regs->remap); writel(1, &nic301_regs->remap);
} }
} }

7
arch/arm/mach-socfpga/spl_gen5.c
View File

@@ -138,6 +138,13 @@ void board_init_f(ulong dummy)
if (ret) if (ret)
debug("Reset init failed: %d\n", ret); debug("Reset init failed: %d\n", ret);
#ifdef CONFIG_SPL_NAND_DENALI
struct socfpga_reset_manager *reset_manager_base =
(struct socfpga_reset_manager *)SOCFPGA_RSTMGR_ADDRESS;
clrbits_le32(&reset_manager_base->per_mod_reset, BIT(4));
#endif
/* enable console uart printing */ /* enable console uart printing */
preloader_console_init(); preloader_console_init();