clk: clk_versaclock: Add support for versaclock driver

The driver is based on the Versaclock driver from the Linux code, but
due differences in the clock API between them, some pieces had to be
changed.

This driver creates a mux, pfd, pll, and a series of fod ouputs.
 Rate               Usecnt      Name
------------------------------------------
 25000000             0        `-- x304-clock
 25000000             0            `-- clock-controller@6a.mux
 25000000             0                |-- clock-controller@6a.pfd
 2800000000           0                |   `-- clock-controller@6a.pll
 33333333             0                |       |-- clock-controller@6a.fod0
 33333333             0                |       |   `-- clock-controller@6a.out1
 33333333             0                |       |-- clock-controller@6a.fod1
 33333333             0                |       |   `-- clock-controller@6a.out2
 50000000             0                |       |-- clock-controller@6a.fod2
 50000000             0                |       |   `-- clock-controller@6a.out3
 125000000            0                |       `-- clock-controller@6a.fod3
 125000000            0                |           `-- clock-controller@6a.out4
 25000000             0                `-- clock-controller@6a.out0_sel_i2cb

A translation function is added so the references to <&versaclock X> get routed
to the corresponding clock-controller@6a.outX.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
This commit is contained in:
Adam Ford 2021-06-04 12:26:06 -05:00 committed by Tom Rini
parent 79d389a548
commit dcf2cee77f
3 changed files with 1110 additions and 0 deletions

View File

@ -220,4 +220,13 @@ config SANDBOX_CLK_CCF
Enable this option if you want to test the Linux kernel's Common
Clock Framework [CCF] code in U-Boot's Sandbox clock driver.
config CLK_VERSACLOCK
tristate "Enable VersaClock 5/6 devices"
depends on CLK
depends on CLK_CCF
depends on OF_CONTROL
help
This driver supports the IDT VersaClock 5 and VersaClock 6
programmable clock generators.
endmenu

View File

@ -52,3 +52,4 @@ obj-$(CONFIG_SANDBOX_CLK_CCF) += clk_sandbox_ccf.o
obj-$(CONFIG_STM32H7) += clk_stm32h7.o
obj-$(CONFIG_CLK_VERSAL) += clk_versal.o
obj-$(CONFIG_CLK_CDCE9XX) += clk-cdce9xx.o
obj-$(CONFIG_CLK_VERSACLOCK) += clk_versaclock.o

1100
drivers/clk/clk_versaclock.c Normal file

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