Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

arch/powerpc/cpu/mpc85xx/cpu.c

@@ -310,6 +310,14 @@ __weak unsigned long get_tbclk (void)
 
 
 #if defined(CONFIG_WATCHDOG)
+#define WATCHDOG_MASK (TCR_WP(63) | TCR_WRC(3) | TCR_WIE)
+void
+init_85xx_watchdog(void)
+{
+	mtspr(SPRN_TCR, (mfspr(SPRN_TCR) & ~WATCHDOG_MASK) |
+	      TCR_WP(CONFIG_WATCHDOG_PRESC) | TCR_WRC(CONFIG_WATCHDOG_RC));
+}
+
 void
 reset_85xx_watchdog(void)
 {

arch/powerpc/cpu/mpc85xx/interrupts.c

@@ -42,7 +42,7 @@ int interrupt_init_cpu(unsigned int *decrementer_count)
 	*decrementer_count = get_tbclk() / CONFIG_SYS_HZ;
 
 	/* PIE is same as DIE, dec interrupt enable */
-	mtspr(SPRN_TCR, TCR_PIE);
+	mtspr(SPRN_TCR, mfspr(SPRN_TCR) | TCR_PIE);
 
 #ifdef CONFIG_INTERRUPTS
 	pic->iivpr1 = 0x810001;	/* 50220 enable ecm interrupts */

arch/powerpc/include/asm/processor.h

@@ -378,11 +378,16 @@
 #else
 #define SPRN_TCR	0x154	/* Book E Timer Control Register */
 #endif /* CONFIG_BOOKE */
+#ifdef CONFIG_E500MC
+#define  TCR_WP(x)		(((64-x)&0x3)<<30)| \
+				(((64-x)&0x3c)<<15) /* WDT Period 2^x clocks*/
+#else
 #define   TCR_WP(x)		(((x)&0x3)<<30)	/* WDT Period */
 #define     WP_2_17		0		/* 2^17 clocks */
 #define     WP_2_21		1		/* 2^21 clocks */
 #define     WP_2_25		2		/* 2^25 clocks */
 #define     WP_2_29		3		/* 2^29 clocks */
+#endif /* CONFIG_E500 */
 #define   TCR_WRC(x)		(((x)&0x3)<<28)	/* WDT Reset Control */
 #define     WRC_NONE		0		/* No reset will occur */
 #define     WRC_CORE		1		/* Core reset will occur */

arch/powerpc/lib/board.c

@@ -226,6 +226,9 @@ static int init_func_spi(void)
 #if defined(CONFIG_WATCHDOG)
 int init_func_watchdog_init(void)
 {
+#if defined(CONFIG_MPC85xx)
+	init_85xx_watchdog();
+#endif
 	puts("       Watchdog enabled\n");
 	WATCHDOG_RESET();
 	return 0;