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imx8mm: synchronise device tree with linux

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Synchronise device tree with linux v6.1-rc3.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8m{m,n,p}-venice-*
This commit is contained in:
Marcel Ziswiler 2022-11-07 22:22:41 +01:00 committed by Stefano Babic
parent f067b59743
commit dbd5ca2e46
12 changed files with 179 additions and 58 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/dts/imx8mm-beacon-baseboard.dtsi
View File

@ -285,14 +285,14 @@
&usbotg1 {
vbus-supply = <&reg_usbotg1>;
disable-over-current;
dr_mode="otg";
dr_mode = "otg";
status = "okay";
};
&usbotg2 {
pinctrl-names = "default";
disable-over-current;
dr_mode="host";
dr_mode = "host";
status = "okay";
};

43
arch/arm/dts/imx8mm-evk.dtsi
View File

@ -75,6 +75,11 @@
linux,autosuspend-period = <125>;
};
audio_codec_bt_sco: audio-codec-bt-sco {
compatible = "linux,bt-sco";
#sound-dai-cells = <1>;
};
wm8524: audio-codec {
#sound-dai-cells = <0>;
compatible = "wlf,wm8524";
@ -83,6 +88,25 @@
wlf,mute-gpios = <&gpio5 21 GPIO_ACTIVE_LOW>;
};
sound-bt-sco {
compatible = "simple-audio-card";
simple-audio-card,name = "bt-sco-audio";
simple-audio-card,format = "dsp_a";
simple-audio-card,bitclock-inversion;
simple-audio-card,frame-master = <&btcpu>;
simple-audio-card,bitclock-master = <&btcpu>;
btcpu: simple-audio-card,cpu {
sound-dai = <&sai2>;
dai-tdm-slot-num = <2>;
dai-tdm-slot-width = <16>;
};
simple-audio-card,codec {
sound-dai = <&audio_codec_bt_sco 1>;
};
};
sound-wm8524 {
compatible = "simple-audio-card";
simple-audio-card,name = "wm8524-audio";
@ -346,6 +370,16 @@
status = "okay";
};
&sai2 {
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai2>;
assigned-clocks = <&clk IMX8MM_CLK_SAI2>;
assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
assigned-clock-rates = <24576000>;
status = "okay";
};
&sai3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai3>;
@ -494,6 +528,15 @@
>;
};
pinctrl_sai2: sai2grp {
fsl,pins = <
MX8MM_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6
MX8MM_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6
MX8MM_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6
MX8MM_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6
>;
};
pinctrl_sai3: sai3grp {
fsl,pins = <
MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6

14
arch/arm/dts/imx8mm-icore-mx8mm.dtsi
View File

@ -2,7 +2,7 @@
/*
* Copyright (c) 2018 NXP
* Copyright (c) 2019 Engicam srl
* Copyright (c) 2020 Amarula Solutons(India)
* Copyright (c) 2020 Amarula Solutions(India)
*/
/ {
@ -84,42 +84,42 @@
};
reg_buck1: buck1 {
regulator-min-microvolt = <400000>;
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
reg_buck2: buck2 {
regulator-min-microvolt = <400000>;
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
reg_buck3: buck3 {
regulator-min-microvolt = <400000>;
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
reg_buck4: buck4 {
regulator-min-microvolt = <400000>;
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
reg_buck5: buck5 {
regulator-min-microvolt = <400000>;
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
reg_buck6: buck6 {
regulator-min-microvolt = <400000>;
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;

14
arch/arm/dts/imx8mm-mx8menlo.dts
View File

@ -20,13 +20,13 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
user1 {
led-1 {
label = "TestLed601";
gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
};
user2 {
led-2 {
label = "TestLed602";
gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
@ -152,11 +152,11 @@
* CPLD_reset is RESET_SOFT in schematic
*/
gpio-line-names =
"CPLD_D[1]", "CPLD_int", "CPLD_reset", "",
"", "CPLD_D[0]", "", "",
"", "", "", "CPLD_D[2]",
"CPLD_D[3]", "CPLD_D[4]", "CPLD_D[5]", "CPLD_D[6]",
"CPLD_D[7]", "", "", "",
"CPLD_D[6]", "CPLD_int", "CPLD_reset", "",
"", "CPLD_D[7]", "", "",
"", "", "", "CPLD_D[5]",
"CPLD_D[4]", "CPLD_D[3]", "CPLD_D[2]", "CPLD_D[1]",
"CPLD_D[0]", "", "", "",
"", "", "", "",
"", "", "", "KBD_intK",
"", "", "", "";

2
arch/arm/dts/imx8mm-u-boot.dtsi
View File

@ -9,7 +9,7 @@
};
};
&{/soc@0} {
&soc {
u-boot,dm-pre-reloc;
u-boot,dm-spl;
};

24
arch/arm/dts/imx8mm-venice-gw700x.dtsi
View File

@ -16,13 +16,13 @@
gpio-keys {
compatible = "gpio-keys";
user-pb {
key-user-pb {
label = "user_pb";
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
};
user-pb1x {
key-user-pb1x {
label = "user_pb1x";
linux,code = <BTN_1>;
interrupt-parent = <&gsc>;
@ -36,14 +36,14 @@
interrupts = <1>;
};
eeprom-wp {
key-eeprom-wp {
label = "eeprom_wp";
linux,code = <BTN_3>;
interrupt-parent = <&gsc>;
interrupts = <2>;
};
tamper {
key-tamper {
label = "tamper";
linux,code = <BTN_4>;
interrupt-parent = <&gsc>;
@ -286,8 +286,8 @@
regulator-name = "buck1";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1000000>;
regulator-min-microamp = <3800000>;
regulator-max-microamp = <6800000>;
regulator-min-microamp = <3800000>;
regulator-max-microamp = <6800000>;
regulator-boot-on;
regulator-always-on;
};
@ -297,8 +297,8 @@
regulator-name = "buck2";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <900000>;
regulator-min-microamp = <2200000>;
regulator-max-microamp = <5200000>;
regulator-min-microamp = <2200000>;
regulator-max-microamp = <5200000>;
regulator-boot-on;
regulator-always-on;
};
@ -308,8 +308,8 @@
regulator-name = "buck3";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1000000>;
regulator-min-microamp = <3800000>;
regulator-max-microamp = <6800000>;
regulator-min-microamp = <3800000>;
regulator-max-microamp = <6800000>;
regulator-always-on;
};
@ -318,8 +318,8 @@
regulator-name = "buck4";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-min-microamp = <2200000>;
regulator-max-microamp = <5200000>;
regulator-min-microamp = <2200000>;
regulator-max-microamp = <5200000>;
regulator-boot-on;
regulator-always-on;
};

12
arch/arm/dts/imx8mm-venice-gw7901.dts
View File

@ -38,13 +38,13 @@
gpio-keys {
compatible = "gpio-keys";
user-pb {
key-user-pb {
label = "user_pb";
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
};
user-pb1x {
key-user-pb1x {
label = "user_pb1x";
linux,code = <BTN_1>;
interrupt-parent = <&gsc>;
@ -58,14 +58,14 @@
interrupts = <1>;
};
eeprom-wp {
key-eeprom-wp {
label = "eeprom_wp";
linux,code = <BTN_3>;
interrupt-parent = <&gsc>;
interrupts = <2>;
};
tamper {
key-tamper {
label = "tamper";
linux,code = <BTN_4>;
interrupt-parent = <&gsc>;
@ -626,24 +626,28 @@
lan1: port@0 {
reg = <0>;
label = "lan1";
phy-mode = "internal";
local-mac-address = [00 00 00 00 00 00];
};
lan2: port@1 {
reg = <1>;
label = "lan2";
phy-mode = "internal";
local-mac-address = [00 00 00 00 00 00];
};
lan3: port@2 {
reg = <2>;
label = "lan3";
phy-mode = "internal";
local-mac-address = [00 00 00 00 00 00];
};
lan4: port@3 {
reg = <3>;
label = "lan4";
phy-mode = "internal";
local-mac-address = [00 00 00 00 00 00];
};

14
arch/arm/dts/imx8mm-venice-gw7902.dts
View File

@ -42,13 +42,13 @@
gpio-keys {
compatible = "gpio-keys";
user-pb {
key-user-pb {
label = "user_pb";
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
};
user-pb1x {
key-user-pb1x {
label = "user_pb1x";
linux,code = <BTN_1>;
interrupt-parent = <&gsc>;
@ -62,14 +62,14 @@
interrupts = <1>;
};
eeprom-wp {
key-eeprom-wp {
label = "eeprom_wp";
linux,code = <BTN_3>;
interrupt-parent = <&gsc>;
interrupts = <2>;
};
tamper {
key-tamper {
label = "tamper";
linux,code = <BTN_4>;
interrupt-parent = <&gsc>;
@ -222,7 +222,6 @@
compatible = "microchip,mcp2515";
reg = <0>;
clocks = <&can20m>;
oscillator-frequency = <20000000>;
interrupt-parent = <&gpio2>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
spi-max-frequency = <10000000>;
@ -651,7 +650,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>, <&pinctrl_uart1_gpio>;
rts-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>;
cts-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
cts-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
uart-has-rtscts;
status = "okay";
};
@ -742,9 +741,6 @@
MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000041 /* M2_RESET */
MX8MM_IOMUXC_NAND_DATA01_GPIO3_IO7 0x40000119 /* M2_OFF# */
MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x40000159 /* M2_WDIS# */
MX8MM_IOMUXC_SAI1_TXD6_GPIO4_IO18 0x40000041 /* LTE_INT */
MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x40000041 /* LTE_RST# */
MX8MM_IOMUXC_SAI1_TXD4_GPIO4_IO16 0x40000041 /* LTE_PWR */
MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14 0x40000041 /* AMP GPIO1 */
MX8MM_IOMUXC_SAI1_TXD0_GPIO4_IO12 0x40000041 /* AMP GPIO2 */
MX8MM_IOMUXC_SAI1_TXC_GPIO4_IO11 0x40000041 /* AMP GPIO3 */

6
arch/arm/dts/imx8mm-venice-gw7903.dts
View File

@ -33,13 +33,13 @@
gpio-keys {
compatible = "gpio-keys";
user-pb {
key-user-pb {
label = "user_pb";
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
};
user-pb1x {
key-user-pb1x {
label = "user_pb1x";
linux,code = <BTN_1>;
interrupt-parent = <&gsc>;
@ -53,7 +53,7 @@
interrupts = <1>;
};
eeprom-wp {
key-eeprom-wp {
label = "eeprom_wp";
linux,code = <BTN_3>;
interrupt-parent = <&gsc>;

4
arch/arm/dts/imx8mm-venice-gw7904.dts
View File

@ -617,6 +617,10 @@
status = "okay";
};
&pgc_mipi {
status = "disabled";
};
/* off-board RS232 */
&uart1 {
pinctrl-names = "default";

50
arch/arm/dts/imx8mm-verdin.dtsi
View File

@ -32,10 +32,10 @@
};
/* Fixed clock dedicated to SPI CAN controller */
clk20m: oscillator {
clk40m: oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <20000000>;
clock-frequency = <40000000>;
};
gpio-keys {
@ -43,7 +43,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_keys>;
wakeup {
key-wakeup {
debounce-interval = <10>;
/* Verdin CTRL_WAKE1_MICO# (SODIMM 252) */
gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
@ -53,6 +53,21 @@
};
};
hdmi_connector: hdmi-connector {
compatible = "hdmi-connector";
ddc-i2c-bus = <&i2c2>;
label = "hdmi";
type = "a";
status = "disabled";
};
panel_lvds: panel-lvds {
compatible = "panel-lvds";
backlight = <&backlight>;
data-mapping = "vesa-24";
status = "disabled";
};
/* Carrier Board Supplies */
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
@ -154,6 +169,14 @@
cpu-supply = <&reg_vdd_arm>;
};
&cpu_alert0 {
temperature = <95000>;
};
&cpu_crit0 {
temperature = <105000>;
};
&ddrc {
operating-points-v2 = <&ddrc_opp_table>;
@ -194,8 +217,8 @@
can1: can@0 {
compatible = "microchip,mcp251xfd";
clocks = <&clk20m>;
interrupts-extended = <&gpio1 6 IRQ_TYPE_EDGE_FALLING>;
clocks = <&clk40m>;
interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can1_int>;
reg = <0>;
@ -359,8 +382,8 @@
nxp,dvs-standby-voltage = <850000>;
regulator-always-on;
regulator-boot-on;
regulator-max-microvolt = <950000>;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1050000>;
regulator-min-microvolt = <805000>;
regulator-name = "On-module +VDD_ARM (BUCK2)";
regulator-ramp-delay = <3125>;
};
@ -368,8 +391,8 @@
reg_vdd_dram: BUCK3 {
regulator-always-on;
regulator-boot-on;
regulator-max-microvolt = <950000>;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1000000>;
regulator-min-microvolt = <805000>;
regulator-name = "On-module +VDD_GPU_VPU_DDR (BUCK3)";
};
@ -408,7 +431,7 @@
reg_vdd_snvs: LDO2 {
regulator-always-on;
regulator-boot-on;
regulator-max-microvolt = <900000>;
regulator-max-microvolt = <800000>;
regulator-min-microvolt = <800000>;
regulator-name = "On-module +V0.8_SNVS (LDO2)";
};
@ -553,8 +576,8 @@
status = "disabled";
};
lvds_ti_sn65dsi83: bridge@2c {
compatible = "ti,sn65dsi83";
lvds_ti_sn65dsi84: bridge@2c {
compatible = "ti,sn65dsi84";
/* Verdin GPIO_9_DSI (SN65DSI84 IRQ, SODIMM 17, unused) */
/* Verdin GPIO_10_DSI (SODIMM 21) */
enable-gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>;
@ -595,7 +618,7 @@
pinctrl-0 = <&pinctrl_gpio_9_dsi>, <&pinctrl_i2s_2_bclk_touch_reset>;
reg = <0x4a>;
/* Verdin I2S_2_BCLK (TOUCH_RESET#, SODIMM 42) */
reset-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
status = "disabled";
};
@ -737,6 +760,7 @@
};
&usbphynop2 {
power-domains = <&pgc_otg2>;
vcc-supply = <&reg_vdd_3v3>;
};

50
include/dt-bindings/interconnect/imx8mm.h Normal file
View File

@ -0,0 +1,50 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Interconnect framework driver for i.MX SoC
*
* Copyright (c) 2019, BayLibre
* Copyright (c) 2019-2020, NXP
* Author: Alexandre Bailon <abailon@baylibre.com>
*/
#ifndef __DT_BINDINGS_INTERCONNECT_IMX8MM_H
#define __DT_BINDINGS_INTERCONNECT_IMX8MM_H
#define IMX8MM_ICN_NOC 1
#define IMX8MM_ICS_DRAM 2
#define IMX8MM_ICS_OCRAM 3
#define IMX8MM_ICM_A53 4
#define IMX8MM_ICM_VPU_H1 5
#define IMX8MM_ICM_VPU_G1 6
#define IMX8MM_ICM_VPU_G2 7
#define IMX8MM_ICN_VIDEO 8
#define IMX8MM_ICM_GPU2D 9
#define IMX8MM_ICM_GPU3D 10
#define IMX8MM_ICN_GPU 11
#define IMX8MM_ICM_CSI 12
#define IMX8MM_ICM_LCDIF 13
#define IMX8MM_ICN_MIPI 14
#define IMX8MM_ICM_USB1 15
#define IMX8MM_ICM_USB2 16
#define IMX8MM_ICM_PCIE 17
#define IMX8MM_ICN_HSIO 18
#define IMX8MM_ICM_SDMA2 19
#define IMX8MM_ICM_SDMA3 20
#define IMX8MM_ICN_AUDIO 21
#define IMX8MM_ICN_ENET 22
#define IMX8MM_ICM_ENET 23
#define IMX8MM_ICN_MAIN 24
#define IMX8MM_ICM_NAND 25
#define IMX8MM_ICM_SDMA1 26
#define IMX8MM_ICM_USDHC1 27
#define IMX8MM_ICM_USDHC2 28
#define IMX8MM_ICM_USDHC3 29
#endif /* __DT_BINDINGS_INTERCONNECT_IMX8MM_H */