am33xx: Rework pinmux functions
- Move definition of the EEPROM contents to <asm/arch/sys_proto.h> - Make some defines a little less generic now. - Pinmux must be done by done by SPL now. - Create 3 pinmux functions, uart0, i2c0 and board. - Add pinmux specific to Starter Kit EVM for MMC now. Signed-off-by: Tom Rini <trini@ti.com>
This commit is contained in:
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726c05d2cf
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@ -25,7 +25,7 @@
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#include <asm/arch/clock.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/mmc_host_def.h>
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#include <asm/arch/mmc_host_def.h>
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#include <asm/arch/common_def.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/omap_common.h>
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#include <asm/omap_common.h>
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#include <asm/emif.h>
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#include <asm/emif.h>
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@ -58,29 +58,16 @@ const struct gpio_bank *const omap_gpio_bank = gpio_bank_am33xx;
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static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
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static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
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#define NO_OF_MAC_ADDR 3
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#define ETH_ALEN 6
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#define NAME_LEN 8
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struct am335x_baseboard_id {
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unsigned int magic;
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char name[NAME_LEN];
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char version[4];
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char serial[12];
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char config[32];
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char mac_addr[NO_OF_MAC_ADDR][ETH_ALEN];
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};
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static struct am335x_baseboard_id __attribute__((section (".data"))) header;
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static struct am335x_baseboard_id __attribute__((section (".data"))) header;
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static inline int board_is_bone(void)
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static inline int board_is_bone(void)
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{
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{
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return !strncmp(header.name, "A335BONE", NAME_LEN);
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return !strncmp(header.name, "A335BONE", HDR_NAME_LEN);
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}
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}
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static inline int board_is_evm_sk(void)
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static inline int board_is_evm_sk(void)
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{
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{
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return !strncmp("A335X_SK", header.name, NAME_LEN);
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return !strncmp("A335X_SK", header.name, HDR_NAME_LEN);
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}
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}
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/*
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/*
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@ -207,21 +194,18 @@ void s_init(void)
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if (read_eeprom() < 0)
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if (read_eeprom() < 0)
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puts("Could not get board ID.\n");
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puts("Could not get board ID.\n");
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enable_board_pin_mux(&header);
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if (board_is_evm_sk()) {
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if (board_is_evm_sk()) {
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/*
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/*
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* EVM SK 1.2A and later use gpio0_7 to enable DDR3.
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* EVM SK 1.2A and later use gpio0_7 to enable DDR3.
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* This is safe enough to do on older revs.
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* This is safe enough to do on older revs.
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*/
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*/
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enable_gpio0_7_pin_mux();
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gpio_request(GPIO_DDR_VTT_EN, "ddr_vtt_en");
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gpio_request(GPIO_DDR_VTT_EN, "ddr_vtt_en");
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gpio_direction_output(GPIO_DDR_VTT_EN, 1);
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gpio_direction_output(GPIO_DDR_VTT_EN, 1);
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}
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}
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config_ddr(board_memory_type());
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config_ddr(board_memory_type());
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#endif
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#endif
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/* Enable MMC0 */
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enable_mmc0_pin_mux();
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}
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}
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#if defined(CONFIG_OMAP_HSMMC) && !defined(CONFIG_SPL_BUILD)
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#if defined(CONFIG_OMAP_HSMMC) && !defined(CONFIG_SPL_BUILD)
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@ -238,14 +222,10 @@ void setup_clocks_for_console(void)
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}
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}
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/*
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/*
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* Basic board specific setup
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* Basic board specific setup. Pinmux has been handled already.
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*/
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*/
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int board_init(void)
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int board_init(void)
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{
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{
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enable_uart0_pin_mux();
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enable_i2c0_pin_mux();
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enable_i2c1_pin_mux();
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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if (read_eeprom() < 0)
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if (read_eeprom() < 0)
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puts("Could not get board ID.\n");
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puts("Could not get board ID.\n");
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@ -318,12 +298,10 @@ int board_eth_init(bd_t *bis)
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}
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}
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if (board_is_bone()) {
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if (board_is_bone()) {
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enable_mii1_pin_mux();
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writel(MII_MODE_ENABLE, &cdev->miisel);
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writel(MII_MODE_ENABLE, &cdev->miisel);
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cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
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cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
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PHY_INTERFACE_MODE_MII;
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PHY_INTERFACE_MODE_MII;
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} else {
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} else {
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enable_rgmii1_pin_mux();
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writel(RGMII_MODE_ENABLE, &cdev->miisel);
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writel(RGMII_MODE_ENABLE, &cdev->miisel);
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cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
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cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
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PHY_INTERFACE_MODE_RGMII;
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PHY_INTERFACE_MODE_RGMII;
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@ -1,26 +0,0 @@
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/*
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* common_def.h
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*
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* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __COMMON_DEF_H__
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#define __COMMON_DEF_H__
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extern void enable_uart0_pin_mux(void);
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extern void enable_mmc0_pin_mux(void);
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extern void enable_gpio0_7_pin_mux(void);
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extern void enable_i2c0_pin_mux(void);
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extern void enable_mii1_pin_mux(void);
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extern void enable_rgmii1_pin_mux(void);
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#endif/*__COMMON_DEF_H__ */
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@ -19,6 +19,24 @@
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#ifndef _SYS_PROTO_H_
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#ifndef _SYS_PROTO_H_
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#define _SYS_PROTO_H_
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#define _SYS_PROTO_H_
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/*
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* AM335x parts define a system EEPROM that defines certain sub-fields.
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* We use these fields to in turn see what board we are on, and what
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* that might require us to set or not set.
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*/
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#define HDR_NO_OF_MAC_ADDR 3
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#define HDR_ETH_ALEN 6
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#define HDR_NAME_LEN 8
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struct am335x_baseboard_id {
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unsigned int magic;
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char name[HDR_NAME_LEN];
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char version[4];
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char serial[12];
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char config[32];
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char mac_addr[HDR_NO_OF_MAC_ADDR][HDR_ETH_ALEN];
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};
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#define BOARD_REV_ID 0x0
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#define BOARD_REV_ID 0x0
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u32 get_cpu_rev(void);
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u32 get_cpu_rev(void);
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@ -31,4 +49,14 @@ int print_cpuinfo(void);
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u32 get_device_type(void);
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u32 get_device_type(void);
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void setup_clocks_for_console(void);
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void setup_clocks_for_console(void);
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void ddr_pll_config(unsigned int ddrpll_M);
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void ddr_pll_config(unsigned int ddrpll_M);
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/*
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* We have three pin mux functions that must exist. We must be able to enable
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* uart0, for initial output and i2c0 to read the main EEPROM. We then have a
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* main pinmux function that can be overridden to enable all other pinmux that
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* is required on the board.
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*/
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void enable_uart0_pin_mux(void);
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void enable_i2c0_pin_mux(void);
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void enable_board_pin_mux(struct am335x_baseboard_id *header);
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#endif
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#endif
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@ -18,7 +18,9 @@ include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).o
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LIB = $(obj)lib$(BOARD).o
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ifdef CONFIG_SPL_BUILD
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COBJS := mux.o
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COBJS := mux.o
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endif
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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OBJS := $(addprefix $(obj),$(COBJS))
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@ -13,8 +13,8 @@
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* GNU General Public License for more details.
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* GNU General Public License for more details.
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*/
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*/
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#include <config.h>
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#include <common.h>
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#include <asm/arch/common_def.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/hardware.h>
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#include <asm/io.h>
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#include <asm/io.h>
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@ -258,7 +258,6 @@ static struct module_pin_mux uart0_pin_mux[] = {
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{-1},
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{-1},
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};
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};
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#ifdef CONFIG_MMC
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static struct module_pin_mux mmc0_pin_mux[] = {
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static struct module_pin_mux mmc0_pin_mux[] = {
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{OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */
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{OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */
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{OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */
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{OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */
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@ -270,7 +269,17 @@ static struct module_pin_mux mmc0_pin_mux[] = {
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{OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */
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{OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */
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{-1},
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{-1},
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};
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};
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#endif
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static struct module_pin_mux mmc0_pin_mux_sk_evm[] = {
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{OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */
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{OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */
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{OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */
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{OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */
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{OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */
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{OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */
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{OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */
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{-1},
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};
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static struct module_pin_mux i2c0_pin_mux[] = {
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static struct module_pin_mux i2c0_pin_mux[] = {
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{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE |
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{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE |
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@ -349,34 +358,33 @@ void enable_uart0_pin_mux(void)
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configure_module_pin_mux(uart0_pin_mux);
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configure_module_pin_mux(uart0_pin_mux);
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}
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}
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#ifdef CONFIG_MMC
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void enable_mmc0_pin_mux(void)
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{
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configure_module_pin_mux(mmc0_pin_mux);
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}
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#endif
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void enable_i2c0_pin_mux(void)
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void enable_i2c0_pin_mux(void)
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{
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{
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configure_module_pin_mux(i2c0_pin_mux);
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configure_module_pin_mux(i2c0_pin_mux);
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}
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}
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void enable_i2c1_pin_mux(void)
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void enable_board_pin_mux(struct am335x_baseboard_id *header)
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{
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{
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/* Enable pinmux that is common to all TI boards. */
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configure_module_pin_mux(i2c1_pin_mux);
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configure_module_pin_mux(i2c1_pin_mux);
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}
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void enable_rgmii1_pin_mux(void)
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/* Now do board-specific muxes. */
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{
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if (!strncmp(header->name, "A335BONE", HDR_NAME_LEN)) {
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configure_module_pin_mux(rgmii1_pin_mux);
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/* Beaglebone pinmux */
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}
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void enable_mii1_pin_mux(void)
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{
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configure_module_pin_mux(mii1_pin_mux);
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configure_module_pin_mux(mii1_pin_mux);
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}
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configure_module_pin_mux(mmc0_pin_mux);
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} else if (!strncmp(header->config, "SKU#01", 6)) {
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void enable_gpio0_7_pin_mux(void)
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/* General Purpose EVM */
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{
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configure_module_pin_mux(rgmii1_pin_mux);
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configure_module_pin_mux(mmc0_pin_mux);
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} else if (!strncmp(header->name, "A335X_SK", HDR_NAME_LEN)) {
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/* Starter Kit EVM */
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configure_module_pin_mux(gpio0_7_pin_mux);
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configure_module_pin_mux(gpio0_7_pin_mux);
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configure_module_pin_mux(rgmii1_pin_mux);
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configure_module_pin_mux(mmc0_pin_mux_sk_evm);
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} else {
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puts("Unknown board, cannot configure pinmux.");
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hang();
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}
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}
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}
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