Merge branch 'master' of git://git.denx.de/u-boot-arm

* 'master' of git://git.denx.de/u-boot-arm:
  ARM926EJS: Fix cache.c to comply with checkpatch.pl
  ARM926EJS: Make asm routines volatile in cache ops
  MX35: mx35pdk: wrong board revision
  ARM1136: MX35: Make asm routines volatile in cache ops
  ARM: add u-boot.imx as target for i.MX SOCs
  M28: Pull out CONFIG_APBH_DMA so it's always enabled
  DMA: Split the APBH DMA init into block and channel init
  imx: Return gpio_set_value in gpio_direction_output
  imx: Use GPIO_TO_PORT macro in the gpio driver instead of (gpio >> 5)
  imx: Add GPIO_TO_PORT macro in the mxc_gpio driver
  imx: Remove unneeded/repititive definitions from imx headers
  i.MX28: Allow coexistence of PIO and DMA mode for SD/MMC
  MX31: mx31pdk: drop enable_caches from board file
  i.MX28: Fix initial stack pointer position
  mx35: mx35pdk: fix when cache functions are linked
  mx35: flea3: fix when cache functions are linked
  ARM: 926ejs: use debug() for misaligned addresses
  ARM1136: add cache flush and invalidate operations
  mx6qsabrelite: Fix the serial console port
  mx6qsabrelite: Add boot switch setting information into the README
  i.MX6: mx6qsabrelite: add cache commands if cache is enabled
  i.MX6: implement enable_caches()
  i.MX6: define CACHELINE_SIZE
  MX53: DDR: Fix ZQHWCTRL field TZQ_CS
  mx28evk: Add a README file
  mx28: Split the README into a common part and a m28 specific part
  tricorder: Load kernel from ubifs
  tricorder: Add UBIFS
  cm-t35: fix Ethernet reset timing
  hawkboard: Add CONFIG_SPL_LIBGENERIC_SUPPORT
  BeagleBoard: Remove userbutton command and use gpio command instead
  OMAP: Move omap1510inn to Unmaintained / Orphaned
This commit is contained in:
Wolfgang Denk
2012-04-16 23:01:12 +02:00
35 changed files with 531 additions and 365 deletions

View File

@@ -34,6 +34,7 @@
#define CONFIG_MX35_HCLK_FREQ 24000000
#define CONFIG_SYS_DCACHE_OFF
#define CONFIG_SYS_CACHELINE_SIZE 32
#define CONFIG_DISPLAY_CPUINFO
@@ -98,6 +99,7 @@
#define CONFIG_BOOTP_DNS
#define CONFIG_CMD_NAND
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_I2C
#define CONFIG_CMD_SPI

View File

@@ -62,6 +62,7 @@
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_NAND_LOAD
#define CONFIG_SPL_LIBGENERIC_SUPPORT /* for udelay and __div64_32 for NAND */
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-hawk.lds"
#define CONFIG_SPL_TEXT_BASE 0xc1080000

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@@ -93,7 +93,7 @@
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
/* Point initial SP in SRAM so SPL can use it too. */
#define CONFIG_SYS_INIT_RAM_ADDR 0x00002000
#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
#define CONFIG_SYS_INIT_SP_OFFSET \
@@ -145,13 +145,17 @@
#define CONFIG_MXS_MMC
#endif
/*
* APBH DMA
*/
#define CONFIG_APBH_DMA
/*
* NAND
*/
#define CONFIG_ENV_SIZE (16 * 1024)
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_MXS
#define CONFIG_APBH_DMA
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x60000000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE

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@@ -81,7 +81,7 @@
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
/* Point initial SP in SRAM so SPL can use it too. */
#define CONFIG_SYS_INIT_RAM_ADDR 0x00002000
#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
#define CONFIG_SYS_INIT_SP_OFFSET \

View File

@@ -34,10 +34,10 @@
#define CONFIG_MX35_HCLK_FREQ 24000000
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
/* Set TEXT at the beginning of the NOR flash */
#define CONFIG_SYS_TEXT_BASE 0xA0000000
#define CONFIG_SYS_CACHELINE_SIZE 32
#define CONFIG_SYS_64BIT_VSPRINTF
@@ -106,6 +106,7 @@
#define CONFIG_BOOTP_DNS
#define CONFIG_CMD_NAND
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_I2C
#define CONFIG_CMD_SPI

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@@ -169,4 +169,6 @@
#define CONFIG_OF_LIBFDT
#define CONFIG_SYS_DCACHE_OFF
#endif /* __CONFIG_H */

View File

@@ -116,7 +116,7 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
"uimage=uImage\0" \
"console=ttymxc3\0" \
"console=ttymxc1\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
"mmcdev=0\0" \
@@ -212,4 +212,10 @@
#define CONFIG_OF_LIBFDT
#define CONFIG_SYS_DCACHE_OFF
#ifndef CONFIG_SYS_DCACHE_OFF
#define CONFIG_CMD_CACHE
#endif
#endif /* __CONFIG_H */

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@@ -167,6 +167,7 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_SETEXPR /* Evaluate expressions */
#define CONFIG_CMD_GPIO /* Enable gpio command */
#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
@@ -280,10 +281,16 @@
"ramboot=echo Booting from ramdisk ...; " \
"run ramargs; " \
"bootm ${loadaddr}\0" \
"userbutton=if gpio input 173; then run userbutton_xm; " \
"else run userbutton_nonxm; fi;\0" \
"userbutton_xm=gpio input 4;\0" \
"userbutton_nonxm=gpio input 7;\0"
/* "run userbutton" will return 1 (false) if is pressed and 0 (false) if not */
#define CONFIG_BOOTCOMMAND \
"if mmc rescan ${mmcdev}; then " \
"if userbutton; then " \
"if run userbutton; then " \
"setenv bootenv uEnv.txt;" \
"else " \
"setenv bootenv user.txt;" \
"fi;" \
"echo SD/MMC found on device ${mmcdev};" \

View File

@@ -71,7 +71,7 @@
/* Size of malloc() pool */
#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
/* Sector */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512 << 10))
#define CONFIG_SYS_MALLOC_LEN (1024*1024)
/* Hardware drivers */
@@ -139,7 +139,9 @@
#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
#define CONFIG_CMD_NAND /* NAND support */
#define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
#define CONFIG_CMD_UBI /* UBIFS commands */
#define CONFIG_CMD_UBI /* UBI commands */
#define CONFIG_CMD_UBIFS /* UBIFS commands */
#define CONFIG_LZO /* LZO is needed for UBIFS */
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
@@ -180,7 +182,8 @@
"setenv bootargs ${bootargs} " \
"omapfb.mode=lcd:${lcdmode} " \
"omapdss.def_disp=${defaultdisplay} " \
"root=ubi0:rootfs " \
"root=ubi0:root " \
"ubi.mtd=4 " \
"rootfstype=ubifs " \
"${kernelopts}\0" \
"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
@@ -191,9 +194,13 @@
"mmcboot=echo Booting from mmc ...; " \
"run mmcargs; " \
"bootm ${loadaddr}\0" \
"loaduimage_ubi=mtd default; " \
"ubi part fs; " \
"ubifsmount root; " \
"ubifsload ${loadaddr} /boot/uImage\0" \
"nandboot=echo Booting from nand ...; " \
"run nandargs; " \
"nand read ${loadaddr} 280000 400000; " \
"run loaduimage_ubi; " \
"bootm ${loadaddr}\0" \
"autoboot=if mmc rescan ${mmcdev}; then " \
"if run loadbootscript; then " \