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sunxi: SPL SPI: Add SPI boot support for the Allwinner R40 SoC

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Now that we can easily select an SoC specific SPI0 base address, adding
support for the Allwinner R40 is fairly trivial:
We set the base address, add this SoC to the ones that use PC23 and
enable it in Kconfig.

This allows booting from SPI flash on R40 boards.

Tested on a Bananapi M2 Berry with SPI flash connected to the header pins.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This commit is contained in:
Andre Przywara
2020-01-28 00:46:42 +00:00
committed by Jagan Teki
parent 56f51f3875
commit da19a0dbc8
2 changed files with 6 additions and 2 deletions
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2
arch/arm/mach-sunxi/Kconfig
View File

@@ -994,7 +994,7 @@ config SPL_STACK_R_ADDR
config SPL_SPI_SUNXI config SPL_SPI_SUNXI
bool "Support for SPI Flash on Allwinner SoCs in SPL" bool "Support for SPI Flash on Allwinner SoCs in SPL"
depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_R40
help help
Enable support for SPI Flash. This option allows SPL to read from Enable support for SPI Flash. This option allows SPL to read from
sunxi SPI Flash. It uses the same method as the boot ROM, so does sunxi SPI Flash. It uses the same method as the boot ROM, so does

6
arch/arm/mach-sunxi/spl_spi_sunxi.c
View File

@@ -94,7 +94,8 @@ static void spi0_pinmux_setup(unsigned int pin_function)
for (pin = SUNXI_GPC(0); pin <= SUNXI_GPC(2); pin++) for (pin = SUNXI_GPC(0); pin <= SUNXI_GPC(2); pin++)
sunxi_gpio_set_cfgpin(pin, pin_function); sunxi_gpio_set_cfgpin(pin, pin_function);
if (IS_ENABLED(CONFIG_MACH_SUN4I) || IS_ENABLED(CONFIG_MACH_SUN7I)) if (IS_ENABLED(CONFIG_MACH_SUN4I) || IS_ENABLED(CONFIG_MACH_SUN7I) ||
IS_ENABLED(CONFIG_MACH_SUN8I_R40))
sunxi_gpio_set_cfgpin(SUNXI_GPC(23), pin_function); sunxi_gpio_set_cfgpin(SUNXI_GPC(23), pin_function);
else else
sunxi_gpio_set_cfgpin(SUNXI_GPC(3), pin_function); sunxi_gpio_set_cfgpin(SUNXI_GPC(3), pin_function);
@@ -107,6 +108,9 @@ static bool is_sun6i_gen_spi(void)
static uintptr_t spi0_base_address(void) static uintptr_t spi0_base_address(void)
{ {
if (IS_ENABLED(CONFIG_MACH_SUN8I_R40))
return 0x01C05000;
if (!is_sun6i_gen_spi()) if (!is_sun6i_gen_spi())
return 0x01C05000; return 0x01C05000;