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arch: powerpc: Move CONFIG_FSL_IFC to Kconfig

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Enable IFC from Kconfig.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Prabhakar Kushwaha 2017-02-02 15:01:13 +05:30 committed by York Sun
parent 5b404be671
commit d98b98d62e
14 changed files with 17 additions and 13 deletions
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17
arch/powerpc/cpu/mpc85xx/Kconfig
View File

@ -374,6 +374,7 @@ config ARCH_B4420
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
select FSL_IFC
config ARCH_B4860
bool
@ -398,6 +399,7 @@ config ARCH_B4860
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
select FSL_IFC
config ARCH_BSC9131
bool
@ -410,6 +412,7 @@ config ARCH_BSC9131
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select FSL_IFC
config ARCH_BSC9132
bool
@ -426,6 +429,7 @@ config ARCH_BSC9132
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_IFC
config ARCH_C29X
bool
@ -438,6 +442,7 @@ config ARCH_C29X
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_6
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_IFC
config ARCH_MPC8536
bool
@ -553,6 +558,7 @@ config ARCH_P1010
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC_E500_USE_DEBUG_TLB
select FSL_IFC
config ARCH_P1011
bool
@ -795,6 +801,7 @@ config ARCH_T1023
select SYS_FSL_QORIQ_CHASSIS2
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_5
select FSL_IFC
config ARCH_T1024
bool
@ -811,6 +818,7 @@ config ARCH_T1024
select SYS_FSL_QORIQ_CHASSIS2
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_5
select FSL_IFC
config ARCH_T1040
bool
@ -828,6 +836,7 @@ config ARCH_T1040
select SYS_FSL_QORIQ_CHASSIS2
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_5
select FSL_IFC
config ARCH_T1042
bool
@ -845,6 +854,7 @@ config ARCH_T1042
select SYS_FSL_QORIQ_CHASSIS2
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_5
select FSL_IFC
config ARCH_T2080
bool
@ -866,6 +876,7 @@ config ARCH_T2080
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
select FSL_IFC
config ARCH_T2081
bool
@ -885,6 +896,7 @@ config ARCH_T2081
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
select FSL_IFC
config ARCH_T4160
bool
@ -905,6 +917,7 @@ config ARCH_T4160
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
select FSL_IFC
config ARCH_T4240
bool
@ -928,6 +941,7 @@ config ARCH_T4240
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
select FSL_IFC
config BOOKE
bool
@ -1260,6 +1274,9 @@ config SYS_PPC64
config SYS_PPC_E500_USE_DEBUG_TLB
bool
config FSL_IFC
bool
config SYS_PPC_E500_DEBUG_TLB
int "Temporary TLB entry for external debugger"
depends on SYS_PPC_E500_USE_DEBUG_TLB

1
include/configs/B4860QDS.h
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@ -63,7 +63,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */

1
include/configs/BSC9131RDB.h
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@ -46,7 +46,6 @@
#endif
/* High Level Configuration Options */
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_TSEC_ENET

1
include/configs/BSC9132QDS.h
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@ -68,7 +68,6 @@
#endif
/* High Level Configuration Options */
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_SYS_HAS_SERDES /* common SERDES init code */

1
include/configs/C29XPCIE.h
View File

@ -68,7 +68,6 @@
#endif
/* High Level Configuration Options */
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_SYS_HAS_SERDES /* common SERDES init code */

1
include/configs/P1010RDB.h
View File

@ -130,7 +130,6 @@
#endif
/* High Level Configuration Options */
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_SYS_HAS_SERDES /* common SERDES init code */

1
include/configs/T102xQDS.h
View File

@ -23,7 +23,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_ENV_OVERWRITE

1
include/configs/T102xRDB.h
View File

@ -23,7 +23,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_ENV_OVERWRITE

1
include/configs/T1040QDS.h
View File

@ -51,7 +51,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCI_INDIRECT_BRIDGE
#define CONFIG_PCIE1 /* PCIE controller 1 */

1
include/configs/T104xRDB.h
View File

@ -162,7 +162,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCI_INDIRECT_BRIDGE
#define CONFIG_PCIE1 /* PCIE controller 1 */

1
include/configs/T208xQDS.h
View File

@ -33,7 +33,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_ENV_OVERWRITE

1
include/configs/T208xRDB.h
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@ -27,7 +27,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_ENV_OVERWRITE

1
include/configs/T4240RDB.h
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@ -73,7 +73,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCIE2 /* PCIE controller 2 */

1
include/configs/t4qds.h
View File

@ -26,7 +26,6 @@
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */
#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS
#define CONFIG_FSL_IFC /* Enable IFC Support */
#define CONFIG_PCIE1 /* PCIE controller 1 */
#define CONFIG_PCIE2 /* PCIE controller 2 */
#define CONFIG_PCIE3 /* PCIE controller 3 */