omap3_beagle: enable EHCI and USB storage.
The reset sequence/configuration for ehci is highly board specific, so this will be done in the source for the board, instead of introducing several CONFIG_* which would be needed to make those few lines in beagle.c usable across different OMAP boards. Signed-off-by: Alexander Holler <holler@ahsoftware.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
This commit is contained in:
Alexander Holler
Albert ARIBAUD
parent
7b89795f17
commit
d90859a67c
58
arch/arm/include/asm/arch-omap3/ehci_omap3.h
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58
arch/arm/include/asm/arch-omap3/ehci_omap3.h
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@ -0,0 +1,58 @@
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/*
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* (C) Copyright 2011
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* Alexander Holler <holler@ahsoftware.de>
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*
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* Based on "drivers/usb/host/ehci-omap.c" from Linux 2.6.37
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*
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* See there for additional Copyrights.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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#ifndef _EHCI_OMAP3_H_
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#define _EHCI_OMAP3_H_
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/* USB/EHCI registers */
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#define OMAP3_USBTLL_BASE 0x48062000UL
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#define OMAP3_UHH_BASE 0x48064000UL
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#define OMAP3_EHCI_BASE 0x48064800UL
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/* TLL Register Set */
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#define OMAP_USBTLL_SYSCONFIG (0x10)
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#define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1)
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#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2)
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#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3)
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#define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8)
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#define OMAP_USBTLL_SYSSTATUS (0x14)
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#define OMAP_USBTLL_SYSSTATUS_RESETDONE (1 << 0)
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/* UHH Register Set */
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#define OMAP_UHH_SYSCONFIG (0x10)
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#define OMAP_UHH_SYSCONFIG_SOFTRESET (1 << 1)
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#define OMAP_UHH_SYSCONFIG_CACTIVITY (1 << 8)
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#define OMAP_UHH_SYSCONFIG_SIDLEMODE (1 << 3)
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#define OMAP_UHH_SYSCONFIG_ENAWAKEUP (1 << 2)
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#define OMAP_UHH_SYSCONFIG_MIDLEMODE (1 << 12)
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#define OMAP_UHH_HOSTCONFIG (0x40)
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#define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN (1 << 2)
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#define OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN (1 << 3)
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#define OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN (1 << 4)
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#endif /* _EHCI_OMAP3_H_ */
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@ -40,8 +40,19 @@
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/gpio.h>
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#include <asm/mach-types.h>
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#ifdef CONFIG_USB_EHCI
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#include <usb.h>
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#include <asm/arch/clocks.h>
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#include <asm/arch/clocks_omap3.h>
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#include <asm/arch/ehci_omap3.h>
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/* from drivers/usb/host/ehci-core.h */
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extern struct ehci_hccr *hccr;
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extern volatile struct ehci_hcor *hcor;
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#endif
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#include "beagle.h"
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#define pr_debug(fmt, args...) debug(fmt, ##args)
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#define TWL4030_I2C_BUS 0
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#define EXPANSION_EEPROM_I2C_BUS 1
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#define EXPANSION_EEPROM_I2C_ADDRESS 0x50
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@ -324,3 +335,98 @@ int board_mmc_init(bd_t *bis)
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return 0;
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}
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#endif
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#ifdef CONFIG_USB_EHCI
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#define GPIO_PHY_RESET 147
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/* Reset is needed otherwise the kernel-driver will throw an error. */
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int ehci_hcd_stop(void)
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{
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pr_debug("Resetting OMAP3 EHCI\n");
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omap_set_gpio_dataout(GPIO_PHY_RESET, 0);
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writel(OMAP_UHH_SYSCONFIG_SOFTRESET, OMAP3_UHH_BASE + OMAP_UHH_SYSCONFIG);
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return 0;
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}
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/* Call usb_stop() before starting the kernel */
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void show_boot_progress(int val)
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{
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if(val == 15)
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usb_stop();
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}
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/*
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* Initialize the OMAP3 EHCI controller and PHY on the BeagleBoard.
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* Based on "drivers/usb/host/ehci-omap.c" from Linux 2.6.37.
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* See there for additional Copyrights.
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*/
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int ehci_hcd_init(void)
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{
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pr_debug("Initializing OMAP3 ECHI\n");
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/* Put the PHY in RESET */
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omap_request_gpio(GPIO_PHY_RESET);
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omap_set_gpio_direction(GPIO_PHY_RESET, 0);
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omap_set_gpio_dataout(GPIO_PHY_RESET, 0);
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/* Hold the PHY in RESET for enough time till DIR is high */
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/* Refer: ISSUE1 */
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udelay(10);
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struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
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/* Enable USBHOST_L3_ICLK (USBHOST_MICLK) */
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sr32(&prcm_base->iclken_usbhost, 0, 1, 1);
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/*
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* Enable USBHOST_48M_FCLK (USBHOST_FCLK1)
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* and USBHOST_120M_FCLK (USBHOST_FCLK2)
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*/
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sr32(&prcm_base->fclken_usbhost, 0, 2, 3);
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/* Enable USBTTL_ICLK */
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sr32(&prcm_base->iclken3_core, 2, 1, 1);
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/* Enable USBTTL_FCLK */
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sr32(&prcm_base->fclken3_core, 2, 1, 1);
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pr_debug("USB clocks enabled\n");
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/* perform TLL soft reset, and wait until reset is complete */
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writel(OMAP_USBTLL_SYSCONFIG_SOFTRESET,
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OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG);
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/* Wait for TLL reset to complete */
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while (!(readl(OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSSTATUS)
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& OMAP_USBTLL_SYSSTATUS_RESETDONE));
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pr_debug("TLL reset done\n");
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writel(OMAP_USBTLL_SYSCONFIG_ENAWAKEUP |
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OMAP_USBTLL_SYSCONFIG_SIDLEMODE |
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OMAP_USBTLL_SYSCONFIG_CACTIVITY,
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OMAP3_USBTLL_BASE + OMAP_USBTLL_SYSCONFIG);
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/* Put UHH in NoIdle/NoStandby mode */
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writel(OMAP_UHH_SYSCONFIG_ENAWAKEUP
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| OMAP_UHH_SYSCONFIG_SIDLEMODE
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| OMAP_UHH_SYSCONFIG_CACTIVITY
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| OMAP_UHH_SYSCONFIG_MIDLEMODE,
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OMAP3_UHH_BASE + OMAP_UHH_SYSCONFIG);
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/* setup burst configurations */
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writel(OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
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| OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN
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| OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN,
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OMAP3_UHH_BASE + OMAP_UHH_HOSTCONFIG);
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/*
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* Refer ISSUE1:
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* Hold the PHY in RESET for enough time till
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* PHY is settled and ready
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*/
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udelay(10);
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omap_set_gpio_dataout(GPIO_PHY_RESET, 1);
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hccr = (struct ehci_hccr *)(OMAP3_EHCI_BASE);
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hcor = (struct ehci_hcor *)(OMAP3_EHCI_BASE + 0x10);
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pr_debug("OMAP3 EHCI init done\n");
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return 0;
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}
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#endif /* CONFIG_USB_EHCI */
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@ -133,6 +133,11 @@
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#define CONFIG_USB_TTY 1
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
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/* USB EHCI */
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#define CONFIG_CMD_USB
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#define CONFIG_USB_EHCI
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#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
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/* commands to include */
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#include <config_cmd_default.h>
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@ -149,6 +154,7 @@
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#define CONFIG_CMD_I2C /* I2C serial bus support */
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#define CONFIG_CMD_MMC /* MMC support */
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#define CONFIG_USB_STORAGE /* USB storage support */
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#define CONFIG_CMD_NAND /* NAND support */
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#define CONFIG_CMD_LED /* LED support */
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