arm: stm32mp: add sub config Kconfig.15x
Add sub Kconfig for each SOC in the STM32 CPU family. It is a preliminary step to introduce a new SOC in the STM32MP family. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
This commit is contained in:
Patrick Delaunay
parent
647d319cc9
commit
d8b78fd632
@ -60,93 +60,6 @@ config STM32MP15x
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dual core A7 for STM32MP157/3, monocore for STM32MP151
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endchoice
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if STM32MP15x
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config STM32MP15x_STM32IMAGE
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bool "Support STM32 image for generated U-Boot image"
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depends on TFABOOT
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help
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Support of STM32 image generation for SOC STM32MP15x
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for TF-A boot when FIP container is not used
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choice
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prompt "STM32MP15x board select"
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optional
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config TARGET_ST_STM32MP15x
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bool "STMicroelectronics STM32MP15x boards"
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imply BOOTSTAGE
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imply CMD_BOOTSTAGE
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imply CMD_CLS if CMD_BMP
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imply DISABLE_CONSOLE
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imply PRE_CONSOLE_BUFFER
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imply SILENT_CONSOLE
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help
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target the STMicroelectronics board with SOC STM32MP15x
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managed by board/st/stm32mp1:
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Evalulation board (EV1) or Discovery board (DK1 and DK2).
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The difference between board are managed with devicetree
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config TARGET_MICROGEA_STM32MP1
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bool "Engicam MicroGEA STM32MP1 SOM"
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imply BOOTSTAGE
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imply CMD_BOOTSTAGE
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imply CMD_CLS if CMD_BMP
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imply DISABLE_CONSOLE
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imply PRE_CONSOLE_BUFFER
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imply SILENT_CONSOLE
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help
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MicroGEA STM32MP1 is a STM32MP157A based Micro SOM.
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MicroGEA STM32MP1 MicroDev 2.0:
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* MicroDev 2.0 is a general purpose miniature carrier board with CAN,
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LTE and LVDS panel interfaces.
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* MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board
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for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board.
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MicroGEA STM32MP1 MicroDev 2.0 7" OF:
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* 7" OF is a capacitive touch 7" Open Frame panel solutions with LVDS
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panel and toucscreen.
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* MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with
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pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0 7"
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Open Frame Solution board.
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config TARGET_ICORE_STM32MP1
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bool "Engicam i.Core STM32MP1 SOM"
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imply BOOTSTAGE
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imply CMD_BOOTSTAGE
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imply CMD_CLS if CMD_BMP
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imply DISABLE_CONSOLE
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imply PRE_CONSOLE_BUFFER
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imply SILENT_CONSOLE
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help
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i.Core STM32MP1 is an EDIMM SOM based on STM32MP157A.
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i.Core STM32MP1 EDIMM2.2:
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* EDIMM2.2 is a Form Factor Capacitive Evaluation Board.
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* i.Core STM32MP1 needs to mount on top of EDIMM2.2 for
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creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit.
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i.Core STM32MP1 C.TOUCH 2.0
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* C.TOUCH 2.0 is a general purpose Carrier board.
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* i.Core STM32MP1 needs to mount on top of this Carrier board
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for creating complete i.Core STM32MP1 C.TOUCH 2.0 board.
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config TARGET_DH_STM32MP1_PDK2
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bool "DH STM32MP1 PDK2"
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help
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Target the DH PDK2 development kit with STM32MP15x SoM.
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endchoice
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source "board/st/stm32mp1/Kconfig"
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source "board/dhelectronics/dh_stm32mp1/Kconfig"
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source "board/engicam/stm32mp1/Kconfig"
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endif
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config SYS_TEXT_BASE
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default 0xC0100000
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config NR_DRAM_BANKS
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default 1
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@ -195,37 +108,7 @@ config CMD_STM32KEY
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This command is used to evaluate the secure boot on stm32mp SOC,
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it is deactivated by default in real products.
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config PRE_CON_BUF_ADDR
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default 0xC02FF000
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config PRE_CON_BUF_SZ
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default 4096
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config BOOTSTAGE_STASH_ADDR
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default 0xC3000000
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if BOOTCOUNT_GENERIC
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config SYS_BOOTCOUNT_SINGLEWORD
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default y
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# TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(21)
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config SYS_BOOTCOUNT_ADDR
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default 0x5C00A154
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endif
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if DEBUG_UART
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config DEBUG_UART_BOARD_INIT
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default y
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# debug on UART4 by default
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config DEBUG_UART_BASE
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default 0x40010000
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# clock source is HSI on reset
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config DEBUG_UART_CLOCK
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default 64000000
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endif
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source "arch/arm/mach-stm32mp/Kconfig.15x"
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source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig"
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endif
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119
arch/arm/mach-stm32mp/Kconfig.15x
Normal file
119
arch/arm/mach-stm32mp/Kconfig.15x
Normal file
@ -0,0 +1,119 @@
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if STM32MP15x
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config STM32MP15x_STM32IMAGE
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bool "Support STM32 image for generated U-Boot image"
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depends on TFABOOT
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help
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Support of STM32 image generation for SOC STM32MP15x
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for TF-A boot when FIP container is not used
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choice
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prompt "STM32MP15x board select"
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optional
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config TARGET_ST_STM32MP15x
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bool "STMicroelectronics STM32MP15x boards"
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imply BOOTSTAGE
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imply CMD_BOOTSTAGE
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imply CMD_CLS if CMD_BMP
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imply DISABLE_CONSOLE
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imply PRE_CONSOLE_BUFFER
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imply SILENT_CONSOLE
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help
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target the STMicroelectronics board with SOC STM32MP15x
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managed by board/st/stm32mp1:
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Evalulation board (EV1) or Discovery board (DK1 and DK2).
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The difference between board are managed with devicetree
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config TARGET_DH_STM32MP1_PDK2
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bool "DH STM32MP1 PDK2"
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help
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Target the DH PDK2 development kit with STM32MP15x SoM.
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config TARGET_MICROGEA_STM32MP1
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bool "Engicam MicroGEA STM32MP1 SOM"
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imply BOOTSTAGE
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imply CMD_BOOTSTAGE
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imply CMD_CLS if CMD_BMP
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imply DISABLE_CONSOLE
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imply PRE_CONSOLE_BUFFER
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imply SILENT_CONSOLE
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help
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MicroGEA STM32MP1 is a STM32MP157A based Micro SOM.
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MicroGEA STM32MP1 MicroDev 2.0:
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* MicroDev 2.0 is a general purpose miniature carrier board with CAN,
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LTE and LVDS panel interfaces.
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* MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board
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for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board.
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MicroGEA STM32MP1 MicroDev 2.0 7" OF:
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* 7" OF is a capacitive touch 7" Open Frame panel solutions with LVDS
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panel and toucscreen.
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* MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with
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pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0 7"
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Open Frame Solution board.
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config TARGET_ICORE_STM32MP1
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bool "Engicam i.Core STM32MP1 SOM"
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imply BOOTSTAGE
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imply CMD_BOOTSTAGE
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imply CMD_CLS if CMD_BMP
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imply DISABLE_CONSOLE
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imply PRE_CONSOLE_BUFFER
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imply SILENT_CONSOLE
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help
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i.Core STM32MP1 is an EDIMM SOM based on STM32MP157A.
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i.Core STM32MP1 EDIMM2.2:
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* EDIMM2.2 is a Form Factor Capacitive Evaluation Board.
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* i.Core STM32MP1 needs to mount on top of EDIMM2.2 for
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creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit.
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i.Core STM32MP1 C.TOUCH 2.0
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* C.TOUCH 2.0 is a general purpose Carrier board.
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* i.Core STM32MP1 needs to mount on top of this Carrier board
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for creating complete i.Core STM32MP1 C.TOUCH 2.0 board.
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endchoice
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config SYS_TEXT_BASE
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default 0xC0100000
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config PRE_CON_BUF_ADDR
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default 0xC02FF000
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config PRE_CON_BUF_SZ
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default 4096
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config BOOTSTAGE_STASH_ADDR
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default 0xC3000000
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if BOOTCOUNT_GENERIC
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config SYS_BOOTCOUNT_SINGLEWORD
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default y
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# TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(21)
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config SYS_BOOTCOUNT_ADDR
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default 0x5C00A154
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endif
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if DEBUG_UART
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config DEBUG_UART_BOARD_INIT
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default y
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# debug on UART4 by default
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config DEBUG_UART_BASE
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default 0x40010000
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# clock source is HSI on reset
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config DEBUG_UART_CLOCK
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default 64000000
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endif
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source "board/st/stm32mp1/Kconfig"
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source "board/dhelectronics/dh_stm32mp1/Kconfig"
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source "board/engicam/stm32mp1/Kconfig"
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endif
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@ -8,10 +8,10 @@ CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
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CONFIG_SPL_TEXT_BASE=0x2FFC2500
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CONFIG_SPL_MMC=y
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CONFIG_SPL=y
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CONFIG_CMD_STM32KEY=y
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CONFIG_TARGET_ST_STM32MP15x=y
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CONFIG_TYPEC_STUSB160X=y
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CONFIG_ENV_OFFSET_REDUND=0x2C0000
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CONFIG_CMD_STM32KEY=y
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CONFIG_CMD_STM32PROG=y
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI=y
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@ -5,11 +5,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000
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CONFIG_ENV_OFFSET=0x480000
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CONFIG_ENV_SECT_SIZE=0x40000
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CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
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CONFIG_DDR_CACHEABLE_SIZE=0x10000000
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CONFIG_CMD_STM32KEY=y
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CONFIG_TARGET_ST_STM32MP15x=y
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CONFIG_TYPEC_STUSB160X=y
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CONFIG_ENV_OFFSET_REDUND=0x4C0000
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CONFIG_DDR_CACHEABLE_SIZE=0x10000000
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CONFIG_CMD_STM32KEY=y
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CONFIG_CMD_STM32PROG=y
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# CONFIG_ARMV7_NONSEC is not set
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CONFIG_SYS_LOAD_ADDR=0xc2000000
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@ -5,12 +5,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000
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CONFIG_ENV_OFFSET=0x280000
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CONFIG_ENV_SECT_SIZE=0x40000
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CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
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CONFIG_DDR_CACHEABLE_SIZE=0x10000000
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CONFIG_CMD_STM32KEY=y
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CONFIG_STM32MP15x_STM32IMAGE=y
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CONFIG_TARGET_ST_STM32MP15x=y
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CONFIG_TYPEC_STUSB160X=y
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CONFIG_ENV_OFFSET_REDUND=0x2C0000
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CONFIG_DDR_CACHEABLE_SIZE=0x10000000
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CONFIG_CMD_STM32KEY=y
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CONFIG_CMD_STM32PROG=y
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# CONFIG_ARMV7_NONSEC is not set
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CONFIG_SYS_LOAD_ADDR=0xc2000000
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