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arm: socfpga: Add support for DENX MCV SoM and MCVEVK board

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Add support for DENX MCV SoM, which is CycloneV based and the
associated DENX MCVEVK baseboard. The board can boot from eMMC.
Ethernet and USB is supported.

Signed-off-by: Marek Vasut <marex@denx.de>
This commit is contained in:
Marek Vasut
2015-08-03 01:37:28 +02:00
parent 952caa289e
commit d88995a82b
12 changed files with 1578 additions and 0 deletions
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1
arch/arm/dts/Makefile
View File

@@ -60,6 +60,7 @@ dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb am335x-evm.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_arria5_socdk.dtb \
socfpga_cyclone5_mcvevk.dtb \
socfpga_cyclone5_socdk.dtb \
socfpga_cyclone5_sockit.dtb \
socfpga_cyclone5_socrates.dtb

53
arch/arm/dts/socfpga_cyclone5_mcvevk.dts Normal file
View File

@@ -0,0 +1,53 @@
/*
* Copyright (C) 2015 Marek Vasut <marex@denx.de>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include "socfpga_cyclone5.dtsi"
/ {
model = "DENX MCVEVK";
compatible = "altr,socfpga-cyclone5", "altr,socfpga";
chosen {
bootargs = "console=ttyS0,115200";
};
aliases {
ethernet0 = &gmac0;
};
memory {
name = "memory";
device_type = "memory";
reg = <0x0 0x40000000>; /* 1GB */
};
soc {
u-boot,dm-pre-reloc;
};
};
&gmac0 {
status = "okay";
phy-mode = "rgmii";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&gpio2 {
status = "okay";
};
&mmc0 {
status = "okay";
bus-width = <8>;
u-boot,dm-pre-reloc;
};

7
arch/arm/mach-socfpga/Kconfig
View File

@@ -18,6 +18,10 @@ config TARGET_SOCFPGA_CYCLONE5_SOCDK
bool "Altera SOCFPGA SoCDK (Cyclone V)"
select TARGET_SOCFPGA_CYCLONE5
config TARGET_SOCFPGA_DENX_MCVEVK
bool "DENX MCVEVK (Cyclone V)"
select TARGET_SOCFPGA_CYCLONE5
config TARGET_SOCFPGA_TERASIC_SOCKIT
bool "Terasic SoCkit (Cyclone V)"
select TARGET_SOCFPGA_CYCLONE5
@@ -27,11 +31,13 @@ endchoice
config SYS_BOARD
default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
config SYS_VENDOR
default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
default "denx" if TARGET_SOCFPGA_DENX_MCVEVK
default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT
config SYS_SOC
@@ -40,6 +46,7 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "socfpga_arria5" if TARGET_SOCFPGA_ARRIA5_SOCDK
default "socfpga_cyclone5" if TARGET_SOCFPGA_CYCLONE5_SOCDK
default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
endif