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ARM: atmel: at91sam9x5ek: enable spl support

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Enable SPL support for at91sam9x5ek board. Now, it supports
boot up from NAND flash and SPI flash.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
This commit is contained in:
Bo Shen
2015-03-27 14:23:35 +08:00
committed by Andreas Bießmann
parent 41d41a93fb
commit d85e8914b3
11 changed files with 157 additions and 4 deletions
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1
arch/arm/mach-at91/Kconfig
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@@ -83,6 +83,7 @@ config TARGET_AT91SAM9RLEK
config TARGET_AT91SAM9X5EK
bool "Atmel AT91SAM9X5-EK board"
select CPU_ARM926EJS
select SUPPORT_SPL
config TARGET_SAMA5D3_XPLAINED
bool "SAMA5D3 Xplained board"

1
arch/arm/mach-at91/Makefile
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@@ -2,6 +2,7 @@ obj-$(CONFIG_AT91_WANTS_COMMON_PHY) += phy.o
ifneq ($(CONFIG_SPL_BUILD),)
obj-$(CONFIG_AT91SAM9G20) += sdram.o spl_at91.o
obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o spl_at91.o
obj-$(CONFIG_AT91SAM9X5) += mpddrc.o spl_at91.o
obj-$(CONFIG_SAMA5D3) += mpddrc.o spl_atmel.o
obj-$(CONFIG_SAMA5D4) += mpddrc.o spl_atmel.o
obj-y += spl.o

6
arch/arm/mach-at91/include/mach/at91_pmc.h
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@@ -97,7 +97,8 @@ typedef struct at91_pmc {
#define AT91_PMC_MCKR_CSS_PLLB 0x00000003
#define AT91_PMC_MCKR_CSS_MASK 0x00000003
#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4)
#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4) || \
defined(CONFIG_AT91SAM9X5)
#define AT91_PMC_MCKR_PRES_1 0x00000000
#define AT91_PMC_MCKR_PRES_2 0x00000010
#define AT91_PMC_MCKR_PRES_4 0x00000020
@@ -126,7 +127,8 @@ typedef struct at91_pmc {
#else
#define AT91_PMC_MCKR_MDIV_1 0x00000000
#define AT91_PMC_MCKR_MDIV_2 0x00000100
#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4)
#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4) || \
defined(CONFIG_AT91SAM9X5)
#define AT91_PMC_MCKR_MDIV_3 0x00000300
#endif
#define AT91_PMC_MCKR_MDIV_4 0x00000200

10
arch/arm/mach-at91/include/mach/at91sam9x5.h
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@@ -124,6 +124,16 @@
#define ATMEL_BASE_EHCI 0x00700000 /* USB Host controller (EHCI) */
#endif
/*
* External memory
*/
#define ATMEL_BASE_CS0 0x10000000
#define ATMEL_BASE_CS1 0x20000000
#define ATMEL_BASE_CS2 0x30000000
#define ATMEL_BASE_CS3 0x40000000
#define ATMEL_BASE_CS4 0x50000000
#define ATMEL_BASE_CS5 0x60000000
/* 9x5 series chip id definitions */
#define ARCH_ID_AT91SAM9X5 0x819a05a0
#define ARCH_ID_VERSION_MASK 0x1f

3
arch/arm/mach-at91/mpddrc.c
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@@ -19,7 +19,8 @@ static inline void atmel_mpddr_op(int mode, u32 ram_address)
static int ddr2_decodtype_is_seq(u32 cr)
{
#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4)
#if defined(CONFIG_SAMA5D3) || defined(CONFIG_SAMA5D4) || \
defined(CONFIG_AT91SAM9X5)
if (cr & ATMEL_MPDDRC_CR_DECOD_INTERLEAVED)
return 0;
#endif

2
arch/arm/mach-at91/spl.c
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@@ -29,7 +29,7 @@ u32 spl_boot_device(void)
return BOOT_DEVICE_MMC1;
#elif CONFIG_SYS_USE_NANDFLASH
return BOOT_DEVICE_NAND;
#elif CONFIG_SYS_USE_SERIALFLASH
#elif CONFIG_SYS_USE_SERIALFLASH || CONFIG_SYS_USE_SPIFLASH
return BOOT_DEVICE_SPI;
#endif
return BOOT_DEVICE_NONE;

5
arch/arm/mach-at91/spl_at91.c
View File

@@ -115,9 +115,14 @@ void board_init_f(ulong dummy)
timer_init();
/* enable clocks for all PIOs */
#ifdef CONFIG_AT91SAM9X5
at91_periph_clk_enable(ATMEL_ID_PIOAB);
at91_periph_clk_enable(ATMEL_ID_PIOCD);
#else
at91_periph_clk_enable(ATMEL_ID_PIOA);
at91_periph_clk_enable(ATMEL_ID_PIOB);
at91_periph_clk_enable(ATMEL_ID_PIOC);
#endif
/* init console */
at91_seriald_hw_init();
preloader_console_init();