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arm: imx8ulp: Allocate LPAV resources to AP domain

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When single boot, assign AP domain as the master domain of the LPAV.
Allocates LPAV master and slave resources like GPU, DCNano, MIPI-DSI
eDMA channel and eDMA request to APD

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
Ye Li 2021-10-29 09:46:16 +08:00 committed by Stefano Babic
parent 961ac78735
commit d563d29203
1 changed files with 16 additions and 6 deletions
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22
arch/arm/mach-imx/imx8ulp/soc.c
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@ -466,6 +466,20 @@ static int trdc_set_access(void)
return 0;
}
void lpav_configure(void)
{
/* LPAV to APD */
setbits_le32(SIM_SEC_BASE_ADDR + 0x44, BIT(7));
/* GPU 2D/3D/DCNANO/MIPI_DSI to APD */
setbits_le32(SIM_SEC_BASE_ADDR + 0x4c, BIT(1) | BIT(2) | BIT(3) | BIT(4));
/* LPAV slave/dma2 ch allocation and request allocation to APD */
writel(0x1f, SIM_SEC_BASE_ADDR + 0x50);
writel(0xffffffff, SIM_SEC_BASE_ADDR + 0x54);
writel(0x003fffff, SIM_SEC_BASE_ADDR + 0x58);
}
int arch_cpu_init(void)
{
if (IS_ENABLED(CONFIG_SPL_BUILD)) {
@ -486,12 +500,8 @@ int arch_cpu_init(void)
release_rdc(RDC_TRDC);
trdc_set_access();
/* LPAV to APD */
setbits_le32(0x2802B044, BIT(7));
/* GPU 2D/3D to APD */
setbits_le32(0x2802B04C, BIT(1) | BIT(2));
/* DCNANO and MIPI_DSI to APD */
setbits_le32(0x2802B04C, BIT(1) | BIT(2) | BIT(3) | BIT(4));
lpav_configure();
}
/* Release xrdc, then allow A35 to write SRAM2 */