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mx6: Allow configuring the NoC registers on i.MX6QP

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The NoC registers on i.MX6QP needs to be configured, otherwise some
usecases in the kernel behave incorrectly, such as rotation and resize.

Currently the NoC registers are not configured in the kernel, so
configure them in U-Boot like it is done in the NXP U-Boot tree.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Fabio Estevam 2019-11-04 09:44:34 -03:00 committed by Stefano Babic
parent 87970cda6f
commit d396f1384c
1 changed files with 35 additions and 0 deletions
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35
arch/arm/mach-imx/mx6/soc.c
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@ -375,6 +375,37 @@ static void init_bandgap(void)
}
}
#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6QDL)
static void noc_setup(void)
{
enable_ipu_clock();
writel(0x80000201, 0xbb0608);
/* Bypass IPU1 QoS generator */
writel(0x00000002, 0x00bb048c);
/* Bypass IPU2 QoS generator */
writel(0x00000002, 0x00bb050c);
/* Bandwidth THR for of PRE0 */
writel(0x00000200, 0x00bb0690);
/* Bandwidth THR for of PRE1 */
writel(0x00000200, 0x00bb0710);
/* Bandwidth THR for of PRE2 */
writel(0x00000200, 0x00bb0790);
/* Bandwidth THR for of PRE3 */
writel(0x00000200, 0x00bb0810);
/* Saturation THR for of PRE0 */
writel(0x00000010, 0x00bb0694);
/* Saturation THR for of PRE1 */
writel(0x00000010, 0x00bb0714);
/* Saturation THR for of PRE2 */
writel(0x00000010, 0x00bb0794);
/* Saturation THR for of PRE */
writel(0x00000010, 0x00bb0814);
disable_ipu_clock();
}
#endif
int arch_cpu_init(void)
{
struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
@ -452,6 +483,10 @@ int arch_cpu_init(void)
init_src();
#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6QDL)
if (is_mx6dqp())
noc_setup();
#endif
return 0;
}