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Merge tag 'xilinx-for-v2019.04-rc2' of git://git.denx.de/u-boot-microblaze

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Xilinx changes for v2019.04-rc2

xilinx:
- Start to use distro boot commands first
- Setup fdtfile on ZynqMP
- Move mac addr eeprom read to common location
- Convert to OF_SEPARATE
- Switch all board to DM_I2C
- Some DT syncs

i2c:
- Remove !DM_I2C zynq driver

versal:
- Enable some more features
- Add mini configurations
This commit is contained in:
Tom Rini
2019-02-15 21:21:28 -05:00
parent e35171e94e 91d7e0c47f
commit d391c13c99
101 changed files with 918 additions and 900 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
board/opalkelly/zynq/board.c
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@@ -1 +1,3 @@
#include "../../xilinx/common/board.c"
#include "../../xilinx/zynq/board.c"

38
board/xilinx/common/board.c Normal file
View File

@@ -0,0 +1,38 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2014 - 2019 Xilinx, Inc.
* Michal Simek <michal.simek@xilinx.com>
*/
#include <common.h>
#include <dm/uclass.h>
#include <i2c.h>
int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
{
int ret = -EINVAL;
#if defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET)
struct udevice *dev;
ofnode eeprom;
eeprom = ofnode_get_chosen_node("xlnx,eeprom");
if (!ofnode_valid(eeprom))
return -ENODEV;
debug("%s: Path to EEPROM %s\n", __func__,
ofnode_get_chosen_prop("xlnx,eeprom"));
ret = uclass_get_device_by_ofnode(UCLASS_I2C_EEPROM, eeprom, &dev);
if (ret)
return ret;
ret = dm_i2c_read(dev, CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET, ethaddr, 6);
if (ret)
debug("%s: I2C EEPROM MAC address read failed\n", __func__);
else
debug("%s: I2C EEPROM MAC %pM\n", __func__, ethaddr);
#endif
return ret;
}

60
board/xilinx/versal/board.c
View File

@@ -21,42 +21,46 @@ int board_init(void)
int board_early_init_r(void)
{
if (current_el() == 3) {
u32 val;
u32 val;
writel(IOU_SWITCH_CTRL_CLKACT_BIT |
(0x20 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT),
&crlapb_base->iou_switch_ctrl);
if (current_el() != 3)
return 0;
/* Global timer init - Program time stamp reference clk */
val = readl(&crlapb_base->timestamp_ref_ctrl);
val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT;
writel(val, &crlapb_base->timestamp_ref_ctrl);
debug("iou_switch ctrl div0 %x\n",
readl(&crlapb_base->iou_switch_ctrl));
debug("ref ctrl 0x%x\n",
readl(&crlapb_base->timestamp_ref_ctrl));
writel(IOU_SWITCH_CTRL_CLKACT_BIT |
(CONFIG_IOU_SWITCH_DIVISOR0 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT),
&crlapb_base->iou_switch_ctrl);
/* Clear reset of timestamp reg */
writel(0, &crlapb_base->rst_timestamp);
/* Global timer init - Program time stamp reference clk */
val = readl(&crlapb_base->timestamp_ref_ctrl);
val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT;
writel(val, &crlapb_base->timestamp_ref_ctrl);
/*
* Program freq register in System counter and
* enable system counter.
*/
writel(COUNTER_FREQUENCY,
&iou_scntr_secure->base_frequency_id_register);
debug("ref ctrl 0x%x\n",
readl(&crlapb_base->timestamp_ref_ctrl));
debug("counter val 0x%x\n",
readl(&iou_scntr_secure->base_frequency_id_register));
/* Clear reset of timestamp reg */
writel(0, &crlapb_base->rst_timestamp);
writel(IOU_SCNTRS_CONTROL_EN,
&iou_scntr_secure->counter_control_register);
/*
* Program freq register in System counter and
* enable system counter.
*/
writel(COUNTER_FREQUENCY,
&iou_scntr_secure->base_frequency_id_register);
debug("scntrs control 0x%x\n",
readl(&iou_scntr_secure->counter_control_register));
debug("timer 0x%llx\n", get_ticks());
debug("timer 0x%llx\n", get_ticks());
}
debug("counter val 0x%x\n",
readl(&iou_scntr_secure->base_frequency_id_register));
writel(IOU_SCNTRS_CONTROL_EN,
&iou_scntr_secure->counter_control_register);
debug("scntrs control 0x%x\n",
readl(&iou_scntr_secure->counter_control_register));
debug("timer 0x%llx\n", get_ticks());
debug("timer 0x%llx\n", get_ticks());
return 0;
}

1
board/xilinx/zynq/Makefile
View File

@@ -4,6 +4,7 @@
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
obj-y := board.o
obj-y += ../common/board.o
ifneq ($(CONFIG_XILINX_PS_INIT_FILE),"")
PS_INIT_FILE := $(shell cd $(srctree); readlink -f $(CONFIG_XILINX_PS_INIT_FILE))

38
board/xilinx/zynq/board.c
View File

@@ -8,6 +8,7 @@
#include <dm/uclass.h>
#include <fdtdec.h>
#include <fpga.h>
#include <malloc.h>
#include <mmc.h>
#include <watchdog.h>
#include <wdt.h>
@@ -53,39 +54,54 @@ int board_init(void)
int board_late_init(void)
{
int env_targets_len = 0;
const char *mode;
char *new_targets;
char *env_targets;
switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
case ZYNQ_BM_QSPI:
mode = "qspi";
env_set("modeboot", "qspiboot");
break;
case ZYNQ_BM_NAND:
mode = "nand";
env_set("modeboot", "nandboot");
break;
case ZYNQ_BM_NOR:
mode = "nor";
env_set("modeboot", "norboot");
break;
case ZYNQ_BM_SD:
mode = "mmc";
env_set("modeboot", "sdboot");
break;
case ZYNQ_BM_JTAG:
mode = "pxe dhcp";
env_set("modeboot", "jtagboot");
break;
default:
mode = "";
env_set("modeboot", "");
break;
}
return 0;
}
/*
* One terminating char + one byte for space between mode
* and default boot_targets
*/
env_targets = env_get("boot_targets");
if (env_targets)
env_targets_len = strlen(env_targets);
int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
{
#if defined(CONFIG_ZYNQ_GEM_EEPROM_ADDR) && \
defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET)
if (eeprom_read(CONFIG_ZYNQ_GEM_EEPROM_ADDR,
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET,
ethaddr, 6))
printf("I2C EEPROM MAC address read failed\n");
#endif
new_targets = calloc(1, strlen(mode) + env_targets_len + 2);
if (!new_targets)
return -ENOMEM;
sprintf(new_targets, "%s %s", mode,
env_targets ? env_targets : "");
env_set("boot_targets", new_targets);
return 0;
}

1
board/xilinx/zynqmp/Makefile
View File

@@ -4,6 +4,7 @@
# Michal Simek <michal.simek@xilinx.com>
obj-y := zynqmp.o
obj-y += ../common/board.o
ifneq ($(CONFIG_XILINX_PS_INIT_FILE),"")
PS_INIT_FILE := $(shell cd $(srctree); readlink -f $(CONFIG_XILINX_PS_INIT_FILE))

51
board/xilinx/zynqmp/zynqmp.c
View File

@@ -20,7 +20,6 @@
#include <usb.h>
#include <dwc3-uboot.h>
#include <zynqmppl.h>
#include <i2c.h>
#include <g_dnl.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -409,22 +408,6 @@ int board_early_init_r(void)
return 0;
}
int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
{
#if defined(CONFIG_ZYNQ_GEM_EEPROM_ADDR) && \
defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET) && \
defined(CONFIG_ZYNQ_EEPROM_BUS)
i2c_set_bus_num(CONFIG_ZYNQ_EEPROM_BUS);
if (eeprom_read(CONFIG_ZYNQ_GEM_EEPROM_ADDR,
CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET,
ethaddr, 6))
printf("I2C EEPROM MAC address read failed\n");
#endif
return 0;
}
unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,
char * const argv[])
{
@@ -531,6 +514,36 @@ static u32 reset_reason(void)
return ret;
}
static int set_fdtfile(void)
{
char *compatible, *fdtfile;
const char *suffix = ".dtb";
const char *vendor = "xilinx/";
if (env_get("fdtfile"))
return 0;
compatible = (char *)fdt_getprop(gd->fdt_blob, 0, "compatible", NULL);
if (compatible) {
debug("Compatible: %s\n", compatible);
/* Discard vendor prefix */
strsep(&compatible, ",");
fdtfile = calloc(1, strlen(vendor) + strlen(compatible) +
strlen(suffix) + 1);
if (!fdtfile)
return -ENOMEM;
sprintf(fdtfile, "%s%s%s", vendor, compatible, suffix);
env_set("fdtfile", fdtfile);
free(fdtfile);
}
return 0;
}
int board_late_init(void)
{
u32 reg = 0;
@@ -553,6 +566,10 @@ int board_late_init(void)
return 0;
}
ret = set_fdtfile();
if (ret)
return ret;
ret = zynqmp_mmio_read((ulong)&crlapb_base->boot_mode, &reg);
if (ret)
return -EINVAL;