tegra: fdt: Add EMC data for Tegra2 Seaboard
This adds timings for T20 and T25 Seaboards, using the bindings found here: http://patchwork.ozlabs.org/patch/132928/ We supply both full speed options for normal running, and half speed options for testing / development. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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@ -89,4 +89,41 @@
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i2c@7000c500 {
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clock-frequency = <100000>;
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};
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emc@7000f400 {
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emc-table@190000 {
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reg = < 190000 >;
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compatible = "nvidia,tegra20-emc-table";
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clock-frequency = < 190000 >;
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nvidia,emc-registers = < 0x0000000c 0x00000026
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0x00000009 0x00000003 0x00000004 0x00000004
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0x00000002 0x0000000c 0x00000003 0x00000003
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0x00000002 0x00000001 0x00000004 0x00000005
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0x00000004 0x00000009 0x0000000d 0x0000059f
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0x00000000 0x00000003 0x00000003 0x00000003
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0x00000003 0x00000001 0x0000000b 0x000000c8
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0x00000003 0x00000007 0x00000004 0x0000000f
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0x00000002 0x00000000 0x00000000 0x00000002
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0x00000000 0x00000000 0x00000083 0xa06204ae
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0x007dc010 0x00000000 0x00000000 0x00000000
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0x00000000 0x00000000 0x00000000 0x00000000 >;
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};
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emc-table@380000 {
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reg = < 380000 >;
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compatible = "nvidia,tegra20-emc-table";
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clock-frequency = < 380000 >;
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nvidia,emc-registers = < 0x00000017 0x0000004b
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0x00000012 0x00000006 0x00000004 0x00000005
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0x00000003 0x0000000c 0x00000006 0x00000006
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0x00000003 0x00000001 0x00000004 0x00000005
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0x00000004 0x00000009 0x0000000d 0x00000b5f
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0x00000000 0x00000003 0x00000003 0x00000006
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0x00000006 0x00000001 0x00000011 0x000000c8
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0x00000003 0x0000000e 0x00000007 0x0000000f
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0x00000002 0x00000000 0x00000000 0x00000002
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0x00000000 0x00000000 0x00000083 0xe044048b
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0x007d8010 0x00000000 0x00000000 0x00000000
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0x00000000 0x00000000 0x00000000 0x00000000 >;
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};
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};
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};
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