Merge branch '2020-04-25-master-imports'

- Assorted minor fixes
- Actions S700 SoC and Cubieboard7 support

Kbuild

@@ -1,54 +1,20 @@
+# SPDX-License-Identifier: GPL-2.0
 #
 # Kbuild for top-level directory of U-Boot
-# This file takes care of the following:
-# 1) Generate generic-asm-offsets.h
-# 2) Generate asm-offsets.h
-
-# Default sed regexp - multiline due to syntax constraints
-define sed-y
-	"s:[[:space:]]*\.ascii[[:space:]]*\"\(.*\)\":\1:; \
-	/^->/{s:->#\(.*\):/* \1 */:; \
-	s:^->\([^ ]*\) [\$$#]*\([-0-9]*\) \(.*\):#define \1 \2 /* \3 */:; \
-	s:^->\([^ ]*\) [\$$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; \
-	s:->::; p;}"
-endef
-
-# Use filechk to avoid rebuilds when a header changes, but the resulting file
-# does not
-define filechk_offsets
-	(set -e; \
-	 echo "#ifndef $2"; \
-	 echo "#define $2"; \
-	 echo "/*"; \
-	 echo " * DO NOT MODIFY."; \
-	 echo " *"; \
-	 echo " * This file was generated by Kbuild"; \
-	 echo " */"; \
-	 echo ""; \
-	 sed -ne $(sed-y); \
-	 echo ""; \
-	 echo "#endif" )
-endef
 
 #####
-# 1) Generate generic-asm-offsets.h
+# Generate generic-asm-offsets.h
 
 generic-offsets-file := include/generated/generic-asm-offsets.h
 
 always  := $(generic-offsets-file)
 targets := lib/asm-offsets.s
 
-# We use internal kbuild rules to avoid the "is up to date" message from make
-lib/asm-offsets.s: lib/asm-offsets.c FORCE
-	$(Q)mkdir -p $(dir $@)
-	$(call if_changed_dep,cc_s_c)
-
 $(obj)/$(generic-offsets-file): lib/asm-offsets.s FORCE
 	$(call filechk,offsets,__GENERIC_ASM_OFFSETS_H__)
 
 #####
-# 2) Generate asm-offsets.h
+# Generate asm-offsets.h
-#
 
 ifneq ($(wildcard $(srctree)/arch/$(ARCH)/lib/asm-offsets.c),)
 offsets-file := include/generated/asm-offsets.h
@@ -59,10 +25,5 @@ targets += arch/$(ARCH)/lib/asm-offsets.s
 
 CFLAGS_asm-offsets.o := -DDO_DEPS_ONLY
 
-# We use internal kbuild rules to avoid the "is up to date" message from make
-arch/$(ARCH)/lib/asm-offsets.s: arch/$(ARCH)/lib/asm-offsets.c FORCE
-	$(Q)mkdir -p $(dir $@)
-	$(call if_changed_dep,cc_s_c)
-
 $(obj)/$(offsets-file): arch/$(ARCH)/lib/asm-offsets.s FORCE
 	$(call filechk,offsets,__ASM_OFFSETS_H__)

Kconfig

@@ -111,7 +111,7 @@ config ENV_VARS_UBOOT_CONFIG
 
 config NR_DRAM_BANKS
 	int "Number of DRAM banks"
-	default 1 if ARCH_SUNXI
+	default 1 if ARCH_SUNXI || ARCH_OWL
 	default 4
 	help
 	  This defines the number of DRAM banks.

MAINTAINERS

@@ -272,9 +272,11 @@ M:	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
 S:	Maintained
 F:	arch/arm/include/asm/arch-owl/
 F:	arch/arm/mach-owl/
-F:	board/ucRobotics/
 F:	drivers/clk/owl/
 F:	drivers/serial/serial_owl.c
+F:	include/configs/owl-common.h
+F:	configs/bubblegum_96_defconfig
+F:	configs/cubieboard7_defconfig
 
 ARM RENESAS RMOBILE/R-CAR
 M:	Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

Makefile

@@ -2241,8 +2241,7 @@ quiet_cmd_rmfiles = $(if $(wildcard $(rm-files)),CLEAN   $(wildcard $(rm-files))
 
 # read all saved command lines
 
-targets := $(wildcard $(sort $(targets)))
+cmd_files := $(wildcard .*.cmd $(foreach f,$(sort $(targets)),$(dir $(f)).$(notdir $(f)).cmd))
-cmd_files := $(wildcard .*.cmd $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
 
 ifneq ($(cmd_files),)
   $(cmd_files): ;	# Do not try to update included dependency files

README

@@ -1632,16 +1632,6 @@ The following options need to be configured:
 		  - activate this driver with CONFIG_SYS_I2C_RCAR
 		  - This driver adds 4 i2c buses
 
-		  - CONFIG_SYS_RCAR_I2C0_BASE for setting the register channel 0
-		  - CONFIG_SYS_RCAR_I2C0_SPEED for for the speed channel 0
-		  - CONFIG_SYS_RCAR_I2C1_BASE for setting the register channel 1
-		  - CONFIG_SYS_RCAR_I2C1_SPEED for for the speed channel 1
-		  - CONFIG_SYS_RCAR_I2C2_BASE for setting the register channel 2
-		  - CONFIG_SYS_RCAR_I2C2_SPEED for for the speed channel 2
-		  - CONFIG_SYS_RCAR_I2C3_BASE for setting the register channel 3
-		  - CONFIG_SYS_RCAR_I2C3_SPEED for for the speed channel 3
-		  - CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS for number of i2c buses
-
 		- drivers/i2c/sh_i2c.c:
 		  - activate this driver with CONFIG_SYS_I2C_SH
 		  - This driver adds from 2 to 5 i2c buses

arch/arm/Kconfig

@@ -874,10 +874,13 @@ config ARCH_MX5
 
 config ARCH_OWL
 	bool "Actions Semi OWL SoCs"
-	select ARM64
 	select DM
 	select DM_SERIAL
+	select OWL_SERIAL
+	select CLK
+	select CLK_OWL
 	select OF_CONTROL
+	select CONFIG_SYS_RELOC_GD_ENV_ADDR
 	imply CMD_DM
 
 config ARCH_QEMU
@@ -1870,7 +1873,6 @@ source "board/spear/spear600/Kconfig"
 source "board/spear/x600/Kconfig"
 source "board/st/stv0991/Kconfig"
 source "board/tcl/sl50/Kconfig"
-source "board/ucRobotics/bubblegum_96/Kconfig"
 source "board/birdland/bav335x/Kconfig"
 source "board/toradex/colibri_pxa270/Kconfig"
 source "board/variscite/dart_6ul/Kconfig"

arch/arm/dts/Makefile

@@ -64,8 +64,10 @@ dtb-$(CONFIG_KIRKWOOD) += \
 	kirkwood-pogo_e02.dtb \
 	kirkwood-sheevaplug.dtb
 
-dtb-$(CONFIG_ARCH_OWL) += \
+dtb-$(CONFIG_MACH_S900) += \
 	bubblegum_96.dtb
+dtb-$(CONFIG_MACH_S700) += \
+	s700-cubieboard7.dtb
 
 dtb-$(CONFIG_ROCKCHIP_PX30) += \
 	px30-evb.dtb \

arch/arm/dts/s700-cubieboard7.dts

@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2017 Andreas Färber
+ */
+
+/dts-v1/;
+
+#include "s700.dtsi"
+
+/ {
+	compatible = "cubietech,cubieboard7", "actions,s700";
+	model = "CubieBoard7";
+
+	aliases {
+		serial3 = &uart3;
+	};
+
+	chosen {
+		stdout-path = "serial3:115200n8";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x0 0x80000000>;
+	};
+
+	memory@1,e0000000 {
+		device_type = "memory";
+		reg = <0x1 0xe0000000 0x0 0x0>;
+	};
+};
+
+&i2c0 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c0_default>;
+};
+
+&i2c1 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c1_default>;
+};
+
+&i2c2 {
+	status = "disabled";
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c2_default>;
+};
+
+&pinctrl {
+	i2c0_default: i2c0_default {
+		pinmux {
+			groups = "i2c0_mfp";
+			function = "i2c0";
+		};
+		pinconf {
+			pins = "i2c0_sclk", "i2c0_sdata";
+			bias-pull-up;
+		};
+	};
+
+	i2c1_default: i2c1_default {
+		pinmux {
+			groups = "i2c1_dummy";
+			function = "i2c1";
+		};
+		pinconf {
+			pins = "i2c1_sclk", "i2c1_sdata";
+			bias-pull-up;
+		};
+	};
+
+	i2c2_default: i2c2_default {
+		pinmux {
+			groups = "i2c2_dummy";
+			function = "i2c2";
+		};
+		pinconf {
+			pins = "i2c2_sclk", "i2c2_sdata";
+			bias-pull-up;
+		};
+	};
+};
+
+&timer {
+	clocks = <&hosc>;
+};
+
+&uart3 {
+	status = "okay";
+};

arch/arm/dts/s700-u-boot.dtsi

@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Amit Singh Tomar <amittomer25@gmail.com>
+ */
+
+/{
+	soc {
+		u-boot,dm-pre-reloc;
+	};
+};
+
+&uart3 {
+	u-boot,dm-pre-reloc;
+};
+
+&cmu {
+	u-boot,dm-pre-reloc;
+};

arch/arm/dts/s700.dtsi

@@ -0,0 +1,248 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2017 Andreas Färber
+ */
+
+#include <dt-bindings/clock/actions,s700-cmu.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/actions,s700-reset.h>
+
+/ {
+	compatible = "actions,s700";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x0>;
+			enable-method = "psci";
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x1>;
+			enable-method = "psci";
+		};
+
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x2>;
+			enable-method = "psci";
+		};
+
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x3>;
+			enable-method = "psci";
+		};
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		secmon@1f000000 {
+			reg = <0x0 0x1f000000 0x0 0x1000000>;
+			no-map;
+		};
+	};
+
+	psci {
+		compatible = "arm,psci-0.2";
+		method = "smc";
+	};
+
+	arm-pmu {
+		compatible = "arm,cortex-a53-pmu";
+		interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+		             <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+		             <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+		             <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+	};
+
+	hosc: hosc {
+		compatible = "fixed-clock";
+		clock-frequency = <24000000>;
+		#clock-cells = <0>;
+	};
+
+	losc: losc {
+		compatible = "fixed-clock";
+		clock-frequency = <32768>;
+		#clock-cells = <0>;
+	};
+
+	soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		gic: interrupt-controller@e00f1000 {
+			compatible = "arm,gic-400";
+			reg = <0x0 0xe00f1000 0x0 0x1000>,
+			      <0x0 0xe00f2000 0x0 0x2000>,
+			      <0x0 0xe00f4000 0x0 0x2000>,
+			      <0x0 0xe00f6000 0x0 0x2000>;
+			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+			interrupt-controller;
+			#interrupt-cells = <3>;
+		};
+
+		uart0: serial@e0120000 {
+			compatible = "actions,s900-uart", "actions,owl-uart";
+			reg = <0x0 0xe0120000 0x0 0x2000>;
+			clocks = <&cmu CLK_UART0>;
+			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		uart1: serial@e0122000 {
+			compatible = "actions,s900-uart", "actions,owl-uart";
+			reg = <0x0 0xe0122000 0x0 0x2000>;
+			clocks = <&cmu CLK_UART1>;
+			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		uart2: serial@e0124000 {
+			compatible = "actions,s900-uart", "actions,owl-uart";
+			reg = <0x0 0xe0124000 0x0 0x2000>;
+			clocks = <&cmu CLK_UART2>;
+			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		uart3: serial@e0126000 {
+			compatible = "actions,s900-uart", "actions,owl-uart";
+			reg = <0x0 0xe0126000 0x0 0x2000>;
+			clocks = <&cmu CLK_UART3>;
+			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		uart4: serial@e0128000 {
+			compatible = "actions,s900-uart", "actions,owl-uart";
+			reg = <0x0 0xe0128000 0x0 0x2000>;
+			clocks = <&cmu CLK_UART4>;
+			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		uart5: serial@e012a000 {
+			compatible = "actions,s900-uart", "actions,owl-uart";
+			reg = <0x0 0xe012a000 0x0 0x2000>;
+			clocks = <&cmu CLK_UART5>;
+			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		uart6: serial@e012c000 {
+			compatible = "actions,s900-uart", "actions,owl-uart";
+			reg = <0x0 0xe012c000 0x0 0x2000>;
+			clocks = <&cmu CLK_UART6>;
+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		cmu: clock-controller@e0168000 {
+			compatible = "actions,s700-cmu";
+			reg = <0x0 0xe0168000 0x0 0x1000>;
+			clocks = <&hosc>, <&losc>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+		};
+
+		i2c0: i2c@e0170000 {
+			compatible = "actions,s700-i2c";
+			reg = <0 0xe0170000 0 0x1000>;
+			clocks = <&cmu CLK_I2C0>;
+			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c1: i2c@e0174000 {
+			compatible = "actions,s700-i2c";
+			reg = <0 0xe0174000 0 0x1000>;
+			clocks = <&cmu CLK_I2C1>;
+			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c2: i2c@e0178000 {
+			compatible = "actions,s700-i2c";
+			reg = <0 0xe0178000 0 0x1000>;
+			clocks = <&cmu CLK_I2C2>;
+			interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c3: i2c@e017c000 {
+			compatible = "actions,s700-i2c";
+			reg = <0 0xe017c000 0 0x1000>;
+			clocks = <&cmu CLK_I2C3>;
+			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		sps: power-controller@e01b0100 {
+			compatible = "actions,s700-sps";
+			reg = <0x0 0xe01b0100 0x0 0x100>;
+			#power-domain-cells = <1>;
+		};
+
+		timer: timer@e024c000 {
+			compatible = "actions,s700-timer";
+			reg = <0x0 0xe024c000 0x0 0x4000>;
+			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "timer1";
+		};
+
+		pinctrl: pinctrl@e01b0000 {
+			compatible = "actions,s700-pinctrl";
+			reg = <0x0 0xe01b0000 0x0 0x1000>;
+			clocks = <&cmu CLK_GPIO>;
+			gpio-controller;
+			gpio-ranges = <&pinctrl 0 0 136>;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+		};
+	};
+};

arch/arm/dts/s900-u-boot.dtsi

@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ */
+
+/{
+	soc {
+		u-boot,dm-pre-reloc;
+	};
+};
+
+&uart5 {
+	u-boot,dm-pre-reloc;
+};
+
+&cmu {
+	u-boot,dm-pre-reloc;
+};

arch/arm/dts/s900.dtsi

@@ -1,17 +1,94 @@
-// SPDX-License-Identifier: GPL-2.0+
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-//
+/*
-// Device Tree Source for Actions Semi S900 SoC
+ * Copyright (c) 2017 Andreas Färber
-//
+ */
-// Copyright (C) 2015 Actions Semi Co., Ltd.
-// Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
 
-/dts-v1/;
+#include <dt-bindings/clock/actions,s900-cmu.h>
-#include <dt-bindings/clock/s900_cmu.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/actions,s900-reset.h>
 
 / {
 	compatible = "actions,s900";
-	#address-cells = <0x2>;
+	interrupt-parent = <&gic>;
-	#size-cells = <0x2>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x0>;
+			enable-method = "psci";
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x1>;
+			enable-method = "psci";
+		};
+
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x2>;
+			enable-method = "psci";
+		};
+
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x0 0x3>;
+			enable-method = "psci";
+		};
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		secmon@1f000000 {
+			reg = <0x0 0x1f000000 0x0 0x1000000>;
+			no-map;
+		};
+	};
+
+	psci {
+		compatible = "arm,psci-0.2";
+		method = "smc";
+	};
+
+	arm-pmu {
+		compatible = "arm,cortex-a53-pmu";
+		interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+		             <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+		             <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+		             <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 14
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 11
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			     <GIC_PPI 10
+			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+	};
+
+	hosc: hosc {
+		compatible = "fixed-clock";
+		clock-frequency = <24000000>;
+		#clock-cells = <0>;
+	};
 
 	losc: losc {
 		compatible = "fixed-clock";
@@ -26,28 +103,231 @@
 	};
 
 	soc {
-		u-boot,dm-pre-reloc;
 		compatible = "simple-bus";
-		#address-cells = <0x2>;
+		#address-cells = <2>;
-		#size-cells = <0x2>;
+		#size-cells = <2>;
 		ranges;
 
-		uart5: serial@e012a000 {
+		gic: interrupt-controller@e00f1000 {
-			u-boot,dm-pre-reloc;
+			compatible = "arm,gic-400";
-			compatible = "actions,s900-serial";
+			reg = <0x0 0xe00f1000 0x0 0x1000>,
-			reg = <0x0 0xe012a000 0x0 0x1000>;
+			      <0x0 0xe00f2000 0x0 0x2000>,
-			clocks = <&cmu CLOCK_UART5>;
+			      <0x0 0xe00f4000 0x0 0x2000>,
+			      <0x0 0xe00f6000 0x0 0x2000>;
+			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+			interrupt-controller;
+			#interrupt-cells = <3>;
+		};
+
+		uart0: serial@e0120000 {
+			compatible = "actions,s900-uart", "actions,owl-uart";
+			reg = <0x0 0xe0120000 0x0 0x2000>;
+			clocks = <&cmu CLK_UART0>;
+			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 			status = "disabled";
 		};
 
+		uart1: serial@e0122000 {
+			compatible = "actions,s900-uart", "actions,owl-uart";
+			reg = <0x0 0xe0122000 0x0 0x2000>;
+			clocks = <&cmu CLK_UART1>;
+			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		uart2: serial@e0124000 {
+			compatible = "actions,s900-uart", "actions,owl-uart";
+			reg = <0x0 0xe0124000 0x0 0x2000>;
+			clocks = <&cmu CLK_UART2>;
+			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		uart3: serial@e0126000 {
+			compatible = "actions,s900-uart", "actions,owl-uart";
+			reg = <0x0 0xe0126000 0x0 0x2000>;
+			clocks = <&cmu CLK_UART3>;
+			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		uart4: serial@e0128000 {
+			compatible = "actions,s900-uart", "actions,owl-uart";
+			reg = <0x0 0xe0128000 0x0 0x2000>;
+			clocks = <&cmu CLK_UART4>;
+			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		uart5: serial@e012a000 {
+			compatible = "actions,s900-uart", "actions,owl-uart";
+			reg = <0x0 0xe012a000 0x0 0x2000>;
+			clocks = <&cmu CLK_UART5>;
+			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		uart6: serial@e012c000 {
+			compatible = "actions,s900-uart", "actions,owl-uart";
+			reg = <0x0 0xe012c000 0x0 0x2000>;
+			clocks = <&cmu CLK_UART6>;
+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
+		sps: power-controller@e012e000 {
+			compatible = "actions,s900-sps";
+			reg = <0x0 0xe012e000 0x0 0x2000>;
+			#power-domain-cells = <1>;
+		};
+
 		cmu: clock-controller@e0160000 {
-			u-boot,dm-pre-reloc;
 			compatible = "actions,s900-cmu";
 			reg = <0x0 0xe0160000 0x0 0x1000>;
-			clocks = <&losc>, <&diff24M>;
+			clocks = <&hosc>, <&losc>;
-			clock-names = "losc", "diff24M";
 			#clock-cells = <1>;
+			#reset-cells = <1>;
+		};
+
+		i2c0: i2c@e0170000 {
+			compatible = "actions,s900-i2c";
+			reg = <0 0xe0170000 0 0x1000>;
+			clocks = <&cmu CLK_I2C0>;
+			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c1: i2c@e0172000 {
+			compatible = "actions,s900-i2c";
+			reg = <0 0xe0172000 0 0x1000>;
+			clocks = <&cmu CLK_I2C1>;
+			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c2: i2c@e0174000 {
+			compatible = "actions,s900-i2c";
+			reg = <0 0xe0174000 0 0x1000>;
+			clocks = <&cmu CLK_I2C2>;
+			interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c3: i2c@e0176000 {
+			compatible = "actions,s900-i2c";
+			reg = <0 0xe0176000 0 0x1000>;
+			clocks = <&cmu CLK_I2C3>;
+			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c4: i2c@e0178000 {
+			compatible = "actions,s900-i2c";
+			reg = <0 0xe0178000 0 0x1000>;
+			clocks = <&cmu CLK_I2C4>;
+			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c5: i2c@e017a000 {
+			compatible = "actions,s900-i2c";
+			reg = <0 0xe017a000 0 0x1000>;
+			clocks = <&cmu CLK_I2C5>;
+			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		pinctrl: pinctrl@e01b0000 {
+			compatible = "actions,s900-pinctrl";
+			reg = <0x0 0xe01b0000 0x0 0x1000>;
+			clocks = <&cmu CLK_GPIO>;
+			gpio-controller;
+			gpio-ranges = <&pinctrl 0 0 146>;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
+		timer: timer@e0228000 {
+			compatible = "actions,s900-timer";
+			reg = <0x0 0xe0228000 0x0 0x8000>;
+			interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "timer1";
+		};
+
+		dma: dma-controller@e0260000 {
+			compatible = "actions,s900-dma";
+			reg = <0x0 0xe0260000 0x0 0x1000>;
+			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+			#dma-cells = <1>;
+			dma-channels = <12>;
+			dma-requests = <46>;
+			clocks = <&cmu CLK_DMAC>;
+		};
+
+		mmc0: mmc@e0330000 {
+			compatible = "actions,owl-mmc";
+			reg = <0x0 0xe0330000 0x0 0x4000>;
+			interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_SD0>;
+			resets = <&cmu RESET_SD0>;
+			dmas = <&dma 2>;
+			dma-names = "mmc";
+			status = "disabled";
+		};
+
+		mmc1: mmc@e0334000 {
+			compatible = "actions,owl-mmc";
+			reg = <0x0 0xe0334000 0x0 0x4000>;
+			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_SD1>;
+			resets = <&cmu RESET_SD1>;
+			dmas = <&dma 3>;
+			dma-names = "mmc";
+			status = "disabled";
+		};
+
+		mmc2: mmc@e0338000 {
+			compatible = "actions,owl-mmc";
+			reg = <0x0 0xe0338000 0x0 0x4000>;
+			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_SD2>;
+			resets = <&cmu RESET_SD2>;
+			dmas = <&dma 4>;
+			dma-names = "mmc";
+			status = "disabled";
+		};
+
+		mmc3: mmc@e033c000 {
+			compatible = "actions,owl-mmc";
+			reg = <0x0 0xe033c000 0x0 0x4000>;
+			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_SD3>;
+			resets = <&cmu RESET_SD3>;
+			dmas = <&dma 46>;
+			dma-names = "mmc";
+			status = "disabled";
 		};
 	};
 };
-

arch/arm/include/asm/arch-owl/regs_s700.h

@@ -0,0 +1,56 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Actions Semi S700 Register Definitions
+ *
+ */
+
+#ifndef _OWL_REGS_S700_H_
+#define _OWL_REGS_S700_H_
+
+#define CMU_COREPLL		0x0000
+#define CMU_DEVPLL		0x0004
+#define CMU_DDRPLL		0x0008
+#define CMU_NANDPLL		0x000C
+#define CMU_DISPLAYPLL		0x0010
+#define CMU_AUDIOPLL		0x0014
+#define CMU_TVOUTPLL		0x0018
+#define CMU_BUSCLK		0x001C
+#define CMU_SENSORCLK		0x0020
+#define CMU_LCDCLK		0x0024
+#define CMU_DSIPLLCLK		0x0028
+#define CMU_CSICLK		0x002C
+#define CMU_DECLK		0x0030
+#define CMU_SICLK		0x0034
+#define CMU_BUSCLK1		0x0038
+#define CMU_HDECLK		0x003C
+#define CMU_VDECLK		0x0040
+#define CMU_VCECLK		0x0044
+#define CMU_NANDCCLK		0x004C
+#define CMU_SD0CLK		0x0050
+#define CMU_SD1CLK		0x0054
+#define CMU_SD2CLK		0x0058
+#define CMU_UART0CLK		0x005C
+#define CMU_UART1CLK		0x0060
+#define CMU_UART2CLK		0x0064
+#define CMU_UART3CLK		0x0068
+#define CMU_UART4CLK		0x006C
+#define CMU_UART5CLK		0x0070
+#define CMU_UART6CLK		0x0074
+#define CMU_PWM0CLK		0x0078
+#define CMU_PWM1CLK		0x007C
+#define CMU_PWM2CLK		0x0080
+#define CMU_PWM3CLK		0x0084
+#define CMU_PWM4CLK		0x0088
+#define CMU_PWM5CLK		0x008C
+#define CMU_GPU3DCLK		0x0090
+#define CMU_CORECTL		0x009C
+#define CMU_DEVCLKEN0		0x00A0
+#define CMU_DEVCLKEN1		0x00A4
+#define CMU_DEVRST0		0x00A8
+#define CMU_DEVRST1		0x00AC
+#define CMU_USBPLL		0x00B0
+#define CMU_ETHERNETPLL		0x00B4
+#define CMU_CVBSPLL		0x00B8
+#define CMU_SSTSCLK		0x00C0
+
+#endif

arch/arm/include/asm/cache.h

@@ -49,4 +49,15 @@ void dram_bank_mmu_setup(int bank);
  */
 #define ARCH_DMA_MINALIGN	CONFIG_SYS_CACHELINE_SIZE
 
+/*
+ * arm_reserve_mmu() - Reserve memory for MMU TLB table
+ *
+ * Default implementation for reserving memory for MMU TLB table. It is used
+ * during generic board init sequence in common/board_f.c. Weakly defined, so
+ * that machines can override it if needed.
+ *
+ * Return: 0 if OK
+ */
+int arm_reserve_mmu(void);
+
 #endif /* _ASM_CACHE_H */

arch/arm/lib/cache.c

@@ -10,6 +10,8 @@
 #include <cpu_func.h>
 #include <malloc.h>
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /*
  * Flush range from all levels of d-cache/unified-cache.
  * Affects the range [start, start + size - 1].
@@ -118,3 +120,34 @@ void invalidate_l2_cache(void)
 	isb();
 }
 #endif
+
+int arch_reserve_mmu(void)
+{
+	return arm_reserve_mmu();
+}
+
+__weak int arm_reserve_mmu(void)
+{
+#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
+	/* reserve TLB table */
+	gd->arch.tlb_size = PGTABLE_SIZE;
+	gd->relocaddr -= gd->arch.tlb_size;
+
+	/* round down to next 64 kB limit */
+	gd->relocaddr &= ~(0x10000 - 1);
+
+	gd->arch.tlb_addr = gd->relocaddr;
+	debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
+	      gd->arch.tlb_addr + gd->arch.tlb_size);
+
+#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
+	/*
+	 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
+	 * with location within secure ram.
+	 */
+	gd->arch.tlb_allocated = gd->arch.tlb_addr;
+#endif
+#endif
+
+	return 0;
+}

arch/arm/mach-owl/Kconfig

@@ -1,27 +1,27 @@
 if ARCH_OWL
 
-config SYS_SOC
-	default "owl"
-
 choice
-        prompt "Actions Semi OWL SoCs board select"
+        prompt "Actions Semi Owl SoC Variant"
         optional
 
-config TARGET_BUBBLEGUM_96
+config MACH_S900
-	bool "96Boards Bubblegum-96"
+        bool "Actions Semi S900 SoC"
-	help
+        select ARM64
-	  Support for 96Boards Bubblegum-96. This board complies with
+
-	  96Board Consumer Edition Specification. Features:
+config MACH_S700
-	  - Actions Semi S900 SoC (4xCortex A53, Power VR G6230 GPU)
+        bool "Actions Semi S700 SoC"
-	  - 2GiB RAM
+        select ARM64
-	  - 8GiB eMMC, uSD slot
-	  - WiFi, Bluetooth and GPS module
-	  - 2x Host, 1x Device USB port
-	  - HDMI
-	  - 20-pin low speed and 40-pin high speed expanders, 6 LED, 3 buttons
 
 endchoice
 
-source "board/ucRobotics/bubblegum_96/Kconfig"
+config SYS_TEXT_BASE
+        default 0x11000000
+
+config SYS_CONFIG_NAME
+        default "owl-common"
+
+config SYS_SOC
+        default "s900" if MACH_S900
+        default "s700" if MACH_S700
 
 endif

arch/arm/mach-owl/Makefile

@@ -1,3 +1,4 @@
 # SPDX-License-Identifier:	GPL-2.0+
 
-obj-y += sysmap-s900.o
+obj-y += soc.o
+obj-$(CONFIG_ARM64) += sysmap-owl.o

arch/arm/mach-owl/soc.c

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Bubblegum-96 Boards Support
+ * Actions Semi Owl SoCs platform support.
  *
  * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
  */
@@ -40,7 +40,7 @@ static void show_psci_version(void)
 	arm_smccc_smc(ARM_PSCI_0_2_FN_PSCI_VERSION, 0, 0, 0, 0, 0, 0, 0, &res);
 
 	printf("PSCI:  v%ld.%ld\n",
-	       PSCI_VERSION_MAJOR(res.a0),
+		PSCI_VERSION_MAJOR(res.a0),
 		PSCI_VERSION_MINOR(res.a0));
 }
 

arch/arm/mach-owl/sysmap-owl.c

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Actions Semi S900 Memory map
+ * Memory map for Actions Semi Owl series SoCs.
  *
  * Copyright (C) 2015 Actions Semi Co., Ltd.
  * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
@@ -9,7 +9,7 @@
 #include <common.h>
 #include <asm/armv8/mmu.h>
 
-static struct mm_region s900_mem_map[] = {
+static struct mm_region owl_mem_map[] = {
 	{
 		.virt = 0x0UL, /* DDR */
 		.phys = 0x0UL, /* DDR */
@@ -29,4 +29,4 @@ static struct mm_region s900_mem_map[] = {
 	}
 };
 
-struct mm_region *mem_map = s900_mem_map;
+struct mm_region *mem_map = owl_mem_map;

arch/arm/mach-versal/cpu.c

@@ -9,6 +9,7 @@
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
+#include <asm/cache.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -107,7 +108,7 @@ u64 get_page_table_size(void)
 }
 
 #if defined(CONFIG_SYS_MEM_RSVD_FOR_MMU)
-int reserve_mmu(void)
+int arm_reserve_mmu(void)
 {
 	tcm_init(TCM_LOCK);
 	gd->arch.tlb_size = PGTABLE_SIZE;

arch/arm/mach-zynqmp/cpu.c

@@ -11,6 +11,7 @@
 #include <asm/armv8/mmu.h>
 #include <asm/io.h>
 #include <zynqmp_firmware.h>
+#include <asm/cache.h>
 
 #define ZYNQ_SILICON_VER_MASK	0xF000
 #define ZYNQ_SILICON_VER_SHIFT	12
@@ -116,7 +117,7 @@ void tcm_init(u8 mode)
 #endif
 
 #ifdef CONFIG_SYS_MEM_RSVD_FOR_MMU
-int reserve_mmu(void)
+int arm_reserve_mmu(void)
 {
 	tcm_init(TCM_LOCK);
 	gd->arch.tlb_size = PGTABLE_SIZE;

board/ucRobotics/bubblegum_96/Kconfig

@@ -1,15 +0,0 @@
-if TARGET_BUBBLEGUM_96
-
-config SYS_BOARD
-	default "bubblegum_96"
-
-config SYS_VENDOR
-	default "ucRobotics"
-
-config SYS_SOC
-	default "s900"
-
-config SYS_CONFIG_NAME
-	default "bubblegum_96"
-
-endif

board/ucRobotics/bubblegum_96/MAINTAINERS

@@ -1,6 +0,0 @@
-BUBBLEGUM_96 BOARD
-M:	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-S:	Maintained
-F:	board/ucRobotics/bubblegum_96/
-F:	include/configs/bubblegum_96.h
-F:	configs/bubblegum_96_defconfig

board/ucRobotics/bubblegum_96/Makefile

@@ -1,3 +0,0 @@
-# SPDX-License-Identifier:	GPL-2.0+
-
-obj-y   := bubblegum_96.o

common/board_f.c

@@ -385,33 +385,10 @@ static int reserve_round_4k(void)
 	return 0;
 }
 
-#ifdef CONFIG_ARM
+__weak int arch_reserve_mmu(void)
-__weak int reserve_mmu(void)
 {
-#if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
-	/* reserve TLB table */
-	gd->arch.tlb_size = PGTABLE_SIZE;
-	gd->relocaddr -= gd->arch.tlb_size;
-
-	/* round down to next 64 kB limit */
-	gd->relocaddr &= ~(0x10000 - 1);
-
-	gd->arch.tlb_addr = gd->relocaddr;
-	debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
-	      gd->arch.tlb_addr + gd->arch.tlb_size);
-
-#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
-	/*
-	 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
-	 * with location within secure ram.
-	 */
-	gd->arch.tlb_allocated = gd->arch.tlb_addr;
-#endif
-#endif
-
 	return 0;
 }
-#endif
 
 static int reserve_video(void)
 {
@@ -979,9 +956,7 @@ static const init_fnc_t init_sequence_f[] = {
 	reserve_pram,
 #endif
 	reserve_round_4k,
-#ifdef CONFIG_ARM
+	arch_reserve_mmu,
-	reserve_mmu,
-#endif
 	reserve_video,
 	reserve_trace,
 	reserve_uboot,

common/spl/spl_fit.c

@@ -425,8 +425,7 @@ static int spl_fit_append_fdt(struct spl_image_info *spl_image,
 			debug("%s: DT overlay %s applied\n", __func__,
 			      fit_get_name(fit, node, NULL));
 		}
-		if (tmpbuffer)
+		free(tmpbuffer);
-			free(tmpbuffer);
 		if (ret)
 			return ret;
 	}

configs/bubblegum_96_defconfig

@@ -1,9 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_OWL=y
-CONFIG_SYS_TEXT_BASE=0x11000000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_TARGET_BUBBLEGUM_96=y
+CONFIG_MACH_S900=y
-CONFIG_NR_DRAM_BANKS=1
 CONFIG_IDENT_STRING="\nBubblegum-96"
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_BOOTDELAY=5
@@ -17,8 +15,3 @@ CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIMER=y
 CONFIG_DEFAULT_DEVICE_TREE="bubblegum_96"
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_CLK=y
-CONFIG_CLK_OWL=y
-CONFIG_CLK_S900=y
-CONFIG_OWL_SERIAL=y

configs/cubieboard7_defconfig

@@ -0,0 +1,12 @@
+CONFIG_ARM=y
+CONFIG_ARCH_OWL=y
+CONFIG_MACH_S700=y
+CONFIG_IDENT_STRING="\ncubieboard7"
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_BOOTDELAY=5
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyOWL3,115200n8"
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SYS_PROMPT="U-Boot => "
+CONFIG_DEFAULT_DEVICE_TREE="s700-cubieboard7"

doc/board/actions/cubieboard7.rst

@@ -0,0 +1,114 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2020 Amit Singh Tomar <amittomer25@gmail.com>
+
+CUBIEBOARD7
+===========
+
+About this
+----------
+
+This document describes build and flash steps for Actions S700 SoC based Cubieboard7
+board.
+
+Cubieboard7 initial configuration
+---------------------------------
+
+Default Cubieboard7 comes with pre-installed Android where U-Boot is configured with
+a bootdelay of 0, entering a prompt by pressing keys does not seem to work.
+
+Though, one can enter ADFU mode and flash debian image(from host machine) where
+getting into u-boot prompt is easy.
+
+Enter ADFU Mode
+----------------
+
+Before write the firmware, let the development board entering the ADFU mode: insert
+one end of the USB cable to the PC, press and hold the ADFU button, and then connect
+the other end of the USB cable to the Mini USB port of the development board, release
+the ADFU button, after connecting it will enter the ADFU mode.
+
+Check whether entered ADFU Mode
+--------------------------------
+
+The user needs to run the following command on the PC side to check if the ADFU
+device is detected. ID realted to "Actions Semiconductor Co., Ltd"  means that
+the PC side has been correctly detected ADFU device, the development board
+also enter into the ADFU mode.
+
+.. code-block:: none
+
+   $ lsusb
+   Bus 001 Device 005: ID 04f2:b2eb Chicony Electronics Co., Ltd
+   Bus 001 Device 004: ID 0a5c:21e6 Broadcom Corp. BCM20702 Bluetooth 4.0 [ThinkPad]
+   Bus 001 Device 003: ID 046d:c534 Logitech, Inc. Unifying Receiver
+   Bus 001 Device 002: ID 8087:0024 Intel Corp. Integrated Rate Matching Hub
+   Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
+   Bus 004 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub
+   Bus 003 Device 013: ID 10d6:10d6 Actions Semiconductor Co., Ltd
+   Bus 003 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
+
+Flashing debian image
+---------------------
+
+.. code-block:: none
+
+   $ sudo ./ActionsFWU.py --fw=debian-stretch-desktop-cb7-emmc-v2.0.fw
+   ActionsFWU.py	: 1.0.150828.0830
+   libScript.so    : 2.3.150825.0951
+   libFileSystem.so: 2.3.150825.0952
+   libProduction.so: 2.3.150915.1527
+   =====burn all partition====
+   FW_VER: 3.10.37.180608
+   3% DOWNLOAD ADFUDEC ...
+   5% DOWNLOAD BOOT PARA ...
+   7% SWITCH ADFUDEC ...
+   12% DOWNLOAD BL31 ...
+   13% DOWNLOAD BL32 ...
+   15% DOWNLOAD VMLINUX ...
+   20% DOWNLOAD INITRD ...
+   24% DOWNLOAD FDT ...
+   27% DOWNLOAD ADFUS ...
+   30% SWITCH ADFUS ...
+   32% DOWNLOAD MBR ...
+   35% DOWNLOAD PARTITIONS ...
+   WRITE_MBRC_PARTITION
+   35% write p0 size = 2048 : ok
+   WRITE_BOOT_PARTITION
+   35% write p1 size = 2048 : ok
+   WRITE_MISC_PARTITION
+   36% write p2 size = 98304 : ok
+   WRITE_SYSTEM_PARTITION
+   94% write p3 size = 4608000 : ok
+   FORMAT_SWAP_PARTITION
+   94% write p4 size = 20480 : ok
+   95% TRANSFER OVER ...
+   Firmware upgrade successfully!
+
+Debian image can be downloaded from here[1].
+
+Once debian image is flashed, one can get into u-boot prompt by pressing any key and from
+there run ums command(make sure, usb cable is connected between host and target):
+
+.. code-block:: none
+
+   owl> ums 0 mmc 1
+
+Above command would mount debian image partition on host machine.
+
+Building U-BOOT proper image
+----------------------------
+
+.. code-block:: none
+
+   $ make clean
+   $ export CROSS_COMPILE=aarch64-linux-gnu-
+   $ make ARCH=arm cubieboard7_defconfig
+   $ make u-boot-dtb.img -j16
+
+u-boot-dtb.img can now be flashed to debian image partition mounted on host machine.
+
+.. code-block:: none
+
+   $ sudo dd if=u-boot-dtb.img of=/dev/sdb bs=1024 seek=3072
+
+[1]: https://pan.baidu.com/s/1uawPr0Jao2HgWFLZCLzHAg#list/path=%2FCubieBoard_Download%2FBoard%2FCubieBoard7%2F%E6%96%B9%E7%B3%96%E6%96%B9%E6%A1%88%E5%BC%80%E5%8F%91%E8%B5%84%E6%96%99%2FImage%2FDebian%2FV2.1-test&parentPath=%2F

doc/board/actions/index.rst

@@ -0,0 +1,10 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2020 Amit Singh Tomar <amittomer25@gmail.com>
+
+Actions
+========
+
+.. toctree::
+   :maxdepth: 2
+
+   cubieboard7

doc/board/index.rst

@@ -6,6 +6,7 @@ Board-specific doc
 .. toctree::
    :maxdepth: 2
 
+   actions/index
    AndesTech/index
    atmel/index
    coreboot/index

drivers/cache/cache-l2x0.c

@@ -33,8 +33,8 @@ static void l2c310_of_parse_and_init(struct udevice *dev)
 			saved_reg &= ~L310_AUX_CTRL_INST_PREFETCH_MASK;
 	}
 
-	saved_reg |= dev_read_bool(dev, "arm,shared-override");
+	if (dev_read_bool(dev, "arm,shared-override"))
-	writel(saved_reg, &regs->pl310_aux_ctrl);
+		saved_reg |= L310_SHARED_ATT_OVERRIDE_ENABLE;
 
 	saved_reg = readl(&regs->pl310_tag_latency_ctrl);
 	if (!dev_read_u32_array(dev, "arm,tag-latency", tag, 3))

drivers/clk/owl/Kconfig

@@ -3,10 +3,6 @@ config CLK_OWL
         depends on CLK && ARCH_OWL
         help
           Enable support for clock managemet unit present in Actions Semi
-	  OWL SoCs.
+	  Owl series S900/S700 SoCs.
+
 
-config CLK_S900
-        bool "Actions Semi S900 clock driver"
-        depends on CLK_OWL && ARM64
-        help
-          Enable support for the clocks in Actions Semi S900 SoC.

drivers/clk/owl/Makefile

@@ -1,3 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0+
 
-obj-$(CONFIG_CLK_S900) += clk_s900.o
+obj-$(CONFIG_CLK_OWL) += clk_owl.o

drivers/clk/owl/clk_owl.c

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Actions Semi S900 clock driver
+ * Common clock driver for Actions Semi SoCs.
  *
  * Copyright (C) 2015 Actions Semi Co., Ltd.
  * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
@@ -8,20 +8,25 @@
 
 #include <common.h>
 #include <dm.h>
-#include <asm/arch-owl/clk_s900.h>
+#include "clk_owl.h"
-#include <asm/arch-owl/regs_s900.h>
 #include <asm/io.h>
-
+#if defined(CONFIG_MACH_S900)
-#include <dt-bindings/clock/s900_cmu.h>
+#include <asm/arch-owl/regs_s900.h>
+#include <dt-bindings/clock/actions,s900-cmu.h>
+#elif defined(CONFIG_MACH_S700)
+#include <asm/arch-owl/regs_s700.h>
+#include <dt-bindings/clock/actions,s700-cmu.h>
+#endif
 
 void owl_clk_init(struct owl_clk_priv *priv)
 {
 	u32 bus_clk = 0, core_pll, dev_pll;
 
+#if defined(CONFIG_MACH_S900)
 	/* Enable ASSIST_PLL */
 	setbits_le32(priv->base + CMU_ASSISTPLL, BIT(0));
-
 	udelay(PLL_STABILITY_WAIT_US);
+#endif
 
 	/* Source HOSC to DEV_CLK */
 	clrbits_le32(priv->base + CMU_DEVPLL, CMU_DEVPLL_CLK);
@@ -58,31 +63,30 @@ void owl_clk_init(struct owl_clk_priv *priv)
 	udelay(PLL_STABILITY_WAIT_US);
 }
 
-void owl_uart_clk_enable(struct owl_clk_priv *priv)
-{
-	/* Source HOSC for UART5 interface */
-	clrbits_le32(priv->base + CMU_UART5CLK, CMU_UARTCLK_SRC_DEVPLL);
-
-	/* Enable UART5 interface clock */
-	setbits_le32(priv->base + CMU_DEVCLKEN1, CMU_DEVCLKEN1_UART5);
-}
-
-void owl_uart_clk_disable(struct owl_clk_priv *priv)
-{
-	/* Disable UART5 interface clock */
-	clrbits_le32(priv->base + CMU_DEVCLKEN1, CMU_DEVCLKEN1_UART5);
-}
-
 int owl_clk_enable(struct clk *clk)
 {
 	struct owl_clk_priv *priv = dev_get_priv(clk->dev);
+	enum owl_soc model = dev_get_driver_data(clk->dev);
 
 	switch (clk->id) {
-	case CLOCK_UART5:
+	case CLK_UART5:
-		owl_uart_clk_enable(priv);
+		if (model != S900)
+			return -EINVAL;
+		/* Source HOSC for UART5 interface */
+		clrbits_le32(priv->base + CMU_UART5CLK, CMU_UARTCLK_SRC_DEVPLL);
+		/* Enable UART5 interface clock */
+		setbits_le32(priv->base + CMU_DEVCLKEN1, CMU_DEVCLKEN1_UART5);
+		break;
+	case CLK_UART3:
+		if (model != S700)
+			return -EINVAL;
+		/* Source HOSC for UART3 interface */
+		clrbits_le32(priv->base + CMU_UART3CLK, CMU_UARTCLK_SRC_DEVPLL);
+		/* Enable UART3 interface clock */
+		setbits_le32(priv->base + CMU_DEVCLKEN1, CMU_DEVCLKEN1_UART3);
 		break;
 	default:
-		return 0;
+		return -EINVAL;
 	}
 
 	return 0;
@@ -91,13 +95,23 @@ int owl_clk_enable(struct clk *clk)
 int owl_clk_disable(struct clk *clk)
 {
 	struct owl_clk_priv *priv = dev_get_priv(clk->dev);
+	enum owl_soc model = dev_get_driver_data(clk->dev);
 
 	switch (clk->id) {
-	case CLOCK_UART5:
+	case CLK_UART5:
-		owl_uart_clk_disable(priv);
+		if (model != S900)
+			return -EINVAL;
+		/* Disable UART5 interface clock */
+		clrbits_le32(priv->base + CMU_DEVCLKEN1, CMU_DEVCLKEN1_UART5);
+		break;
+	case CLK_UART3:
+		if (model != S700)
+			return -EINVAL;
+		/* Disable UART3 interface clock */
+		clrbits_le32(priv->base + CMU_DEVCLKEN1, CMU_DEVCLKEN1_UART3);
 		break;
 	default:
-		return 0;
+		return -EINVAL;
 	}
 
 	return 0;
@@ -117,18 +131,22 @@ static int owl_clk_probe(struct udevice *dev)
 	return 0;
 }
 
-static struct clk_ops owl_clk_ops = {
+static const struct clk_ops owl_clk_ops = {
 	.enable = owl_clk_enable,
 	.disable = owl_clk_disable,
 };
 
 static const struct udevice_id owl_clk_ids[] = {
-	{ .compatible = "actions,s900-cmu" },
+#if defined(CONFIG_MACH_S900)
+	{ .compatible = "actions,s900-cmu", .data = S900 },
+#elif defined(CONFIG_MACH_S700)
+	{ .compatible = "actions,s700-cmu", .data = S700 },
+#endif
 	{ }
 };
 
 U_BOOT_DRIVER(clk_owl) = {
-	.name		= "clk_s900",
+	.name		= "clk_owl",
 	.id		= UCLASS_CLK,
 	.of_match	= owl_clk_ids,
 	.ops		= &owl_clk_ops,

drivers/clk/owl/clk_owl.h

@@ -1,17 +1,22 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Actions Semi S900 Clock Definitions
+ * Actions Semi SoCs Clock Definitions
  *
  * Copyright (C) 2015 Actions Semi Co., Ltd.
  * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
  *
  */
 
-#ifndef _OWL_CLK_S900_H_
+#ifndef _OWL_CLK_H_
-#define _OWL_CLK_S900_H_
+#define _OWL_CLK_H_
 
 #include <clk-uclass.h>
 
+enum owl_soc {
+	S700,
+	S900,
+};
+
 struct owl_clk_priv {
 	phys_addr_t base;
 };
@@ -49,9 +54,11 @@ struct owl_clk_priv {
 /* UARTCLK register definitions */
 #define CMU_UARTCLK_SRC_DEVPLL	BIT(16)
 
-/* DEVCLKEN1 register definitions */
-#define CMU_DEVCLKEN1_UART5	BIT(21)
-
 #define PLL_STABILITY_WAIT_US	50
 
+#define CMU_DEVCLKEN1_UART5	BIT(21)
+#define CMU_DEVCLKEN1_UART3	BIT(11)
+
+#define CMU_DEVCLKEN1_ETH_S700	BIT(23)
+
 #endif

drivers/mmc/mmc-uclass.c

@@ -239,7 +239,7 @@ int mmc_of_parse(struct udevice *dev, struct mmc_config *cfg)
 	return 0;
 }
 
-struct mmc *mmc_get_mmc_dev(struct udevice *dev)
+struct mmc *mmc_get_mmc_dev(const struct udevice *dev)
 {
 	struct mmc_uclass_priv *upriv;
 

drivers/mtd/nand/raw/pxa3xx_nand.c

@@ -639,7 +639,7 @@ static void handle_data_pio(struct pxa3xx_nand_info *info)
 				DIV_ROUND_UP(info->step_spare_size, 4));
 		break;
 	case STATE_PIO_READING:
-		if (info->step_chunk_size)
+		if (data_len)
 			drain_fifo(info,
 				   info->data_buff + info->data_buff_pos,
 				   DIV_ROUND_UP(data_len, 4));

drivers/rtc/ds1374.c

@@ -58,7 +58,7 @@
 #define RTC_CTL_BIT_RS2			(1<<2) /* Bit 2/2 - Rate Select square wave output */
 #define RTC_CTL_BIT_WDSTR		(1<<3) /* Bit 3 - Watchdog Reset Steering */
 #define RTC_CTL_BIT_BBSQW		(1<<4) /* Bit 4 - Battery-Backed Square-Wave */
-#define RTC_CTL_BIT_WD_ALM		(1<<5) /* Bit 5 - Watchdoc/Alarm Counter Select */
+#define RTC_CTL_BIT_WD_ALM		(1<<5) /* Bit 5 - Watchdog/Alarm Counter Select */
 #define RTC_CTL_BIT_WACE		(1<<6) /* Bit 6 - Watchdog/Alarm Counter Enable WACE*/
 #define RTC_CTL_BIT_EN_OSC		(1<<7) /* Bit 7 - Enable Oscilator */
 

drivers/serial/serial_owl.c

@@ -120,7 +120,7 @@ static const struct dm_serial_ops owl_serial_ops = {
 };
 
 static const struct udevice_id owl_serial_ids[] = {
-	{ .compatible =	"actions,s900-serial" },
+	{ .compatible = "actions,owl-uart" },
 	{ }
 };
 

drivers/spi/mpc8xxx_spi.c

@@ -12,6 +12,7 @@
 #include <spi.h>
 #include <asm/mpc8xxx_spi.h>
 #include <asm-generic/gpio.h>
+#include <dm/device_compat.h>
 
 enum {
 	SPI_EV_NE = BIT(31 - 22),	/* Receiver Not Empty */

include/configs/owl-common.h

@@ -1,14 +1,14 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Board configuration file for Bubblegum-96
+ * Board configuration file for Actions Semi Owl SoCs.
  *
  * Copyright (C) 2015 Actions Semi Co., Ltd.
  * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
  *
  */
 
-#ifndef _BUBBLEGUM_96_H_
+#ifndef _OWL_COMMON_CONFIG_H_
-#define _BUGGLEGUM_96_H_
+#define _OWL_COMMON_CONFIG_H_
 
 /* SDRAM Definitions */
 #define CONFIG_SYS_SDRAM_BASE		0x0

include/dt-bindings/clock/actions,s700-cmu.h

@@ -0,0 +1,118 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Device Tree binding constants for Actions Semi S700 Clock Management Unit
+ *
+ * Copyright (c) 2014 Actions Semi Inc.
+ * Author: David Liu <liuwei@actions-semi.com>
+ *
+ * Author: Pathiban Nallathambi <pn@denx.de>
+ * Author: Saravanan Sekar <sravanhome@gmail.com>
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_S700_H
+#define __DT_BINDINGS_CLOCK_S700_H
+
+#define CLK_NONE			0
+
+/* pll clocks */
+#define CLK_CORE_PLL			1
+#define CLK_DEV_PLL			2
+#define CLK_DDR_PLL			3
+#define CLK_NAND_PLL			4
+#define CLK_DISPLAY_PLL			5
+#define CLK_TVOUT_PLL			6
+#define CLK_CVBS_PLL			7
+#define CLK_AUDIO_PLL			8
+#define CLK_ETHERNET_PLL		9
+
+/* system clock */
+#define CLK_CPU				10
+#define CLK_DEV				11
+#define CLK_AHB				12
+#define CLK_APB				13
+#define CLK_DMAC			14
+#define CLK_NOC0_CLK_MUX		15
+#define CLK_NOC1_CLK_MUX		16
+#define CLK_HP_CLK_MUX			17
+#define CLK_HP_CLK_DIV			18
+#define CLK_NOC1_CLK_DIV		19
+#define CLK_NOC0			20
+#define CLK_NOC1			21
+#define CLK_SENOR_SRC			22
+
+/* peripheral device clock */
+#define CLK_GPIO			23
+#define CLK_TIMER			24
+#define CLK_DSI				25
+#define CLK_CSI				26
+#define CLK_SI				27
+#define CLK_DE				28
+#define CLK_HDE				29
+#define CLK_VDE				30
+#define CLK_VCE				31
+#define CLK_NAND			32
+#define CLK_SD0				33
+#define CLK_SD1				34
+#define CLK_SD2				35
+
+#define CLK_UART0			36
+#define CLK_UART1			37
+#define CLK_UART2			38
+#define CLK_UART3			39
+#define CLK_UART4			40
+#define CLK_UART5			41
+#define CLK_UART6			42
+
+#define CLK_PWM0			43
+#define CLK_PWM1			44
+#define CLK_PWM2			45
+#define CLK_PWM3			46
+#define CLK_PWM4			47
+#define CLK_PWM5			48
+#define CLK_GPU3D			49
+
+#define CLK_I2C0			50
+#define CLK_I2C1			51
+#define CLK_I2C2			52
+#define CLK_I2C3			53
+
+#define CLK_SPI0			54
+#define CLK_SPI1			55
+#define CLK_SPI2			56
+#define CLK_SPI3			57
+
+#define CLK_USB3_480MPLL0		58
+#define CLK_USB3_480MPHY0		59
+#define CLK_USB3_5GPHY			60
+#define CLK_USB3_CCE			61
+#define CLK_USB3_MAC			62
+
+#define CLK_LCD				63
+#define CLK_HDMI_AUDIO			64
+#define CLK_I2SRX			65
+#define CLK_I2STX			66
+
+#define CLK_SENSOR0			67
+#define CLK_SENSOR1			68
+
+#define CLK_HDMI_DEV			69
+
+#define CLK_ETHERNET			70
+#define CLK_RMII_REF			71
+
+#define CLK_USB2H0_PLLEN		72
+#define CLK_USB2H0_PHY			73
+#define CLK_USB2H0_CCE			74
+#define CLK_USB2H1_PLLEN		75
+#define CLK_USB2H1_PHY			76
+#define CLK_USB2H1_CCE			77
+
+#define CLK_TVOUT			78
+
+#define CLK_THERMAL_SENSOR		79
+
+#define CLK_IRC_SWITCH			80
+#define CLK_PCM1			81
+#define CLK_NR_CLKS			(CLK_PCM1 + 1)
+
+#endif /* __DT_BINDINGS_CLOCK_S700_H */

include/dt-bindings/clock/actions,s900-cmu.h

@@ -0,0 +1,129 @@
+// SPDX-License-Identifier: GPL-2.0+
+//
+// Device Tree binding constants for Actions Semi S900 Clock Management Unit
+//
+// Copyright (c) 2014 Actions Semi Inc.
+// Copyright (c) 2018 Linaro Ltd.
+
+#ifndef __DT_BINDINGS_CLOCK_S900_CMU_H
+#define __DT_BINDINGS_CLOCK_S900_CMU_H
+
+#define CLK_NONE			0
+
+/* fixed rate clocks */
+#define CLK_LOSC			1
+#define CLK_HOSC			2
+
+/* pll clocks */
+#define CLK_CORE_PLL			3
+#define CLK_DEV_PLL			4
+#define CLK_DDR_PLL			5
+#define CLK_NAND_PLL			6
+#define CLK_DISPLAY_PLL			7
+#define CLK_DSI_PLL			8
+#define CLK_ASSIST_PLL			9
+#define CLK_AUDIO_PLL			10
+
+/* system clock */
+#define CLK_CPU				15
+#define CLK_DEV				16
+#define CLK_NOC				17
+#define CLK_NOC_MUX			18
+#define CLK_NOC_DIV			19
+#define CLK_AHB				20
+#define CLK_APB				21
+#define CLK_DMAC			22
+
+/* peripheral device clock */
+#define CLK_GPIO			23
+
+#define CLK_BISP			24
+#define CLK_CSI0			25
+#define CLK_CSI1			26
+
+#define CLK_DE0				27
+#define CLK_DE1				28
+#define CLK_DE2				29
+#define CLK_DE3				30
+#define CLK_DSI				32
+
+#define CLK_GPU				33
+#define CLK_GPU_CORE			34
+#define CLK_GPU_MEM			35
+#define CLK_GPU_SYS			36
+
+#define CLK_HDE				37
+#define CLK_I2C0			38
+#define CLK_I2C1			39
+#define CLK_I2C2			40
+#define CLK_I2C3			41
+#define CLK_I2C4			42
+#define CLK_I2C5			43
+#define CLK_I2SRX			44
+#define CLK_I2STX			45
+#define CLK_IMX				46
+#define CLK_LCD				47
+#define CLK_NAND0			48
+#define CLK_NAND1			49
+#define CLK_PWM0			50
+#define CLK_PWM1			51
+#define CLK_PWM2			52
+#define CLK_PWM3			53
+#define CLK_PWM4			54
+#define CLK_PWM5			55
+#define CLK_SD0				56
+#define CLK_SD1				57
+#define CLK_SD2				58
+#define CLK_SD3				59
+#define CLK_SENSOR			60
+#define CLK_SPEED_SENSOR		61
+#define CLK_SPI0			62
+#define CLK_SPI1			63
+#define CLK_SPI2			64
+#define CLK_SPI3			65
+#define CLK_THERMAL_SENSOR		66
+#define CLK_UART0			67
+#define CLK_UART1			68
+#define CLK_UART2			69
+#define CLK_UART3			70
+#define CLK_UART4			71
+#define CLK_UART5			72
+#define CLK_UART6			73
+#define CLK_VCE				74
+#define CLK_VDE				75
+
+#define CLK_USB3_480MPLL0		76
+#define CLK_USB3_480MPHY0		77
+#define CLK_USB3_5GPHY			78
+#define CLK_USB3_CCE			79
+#define CLK_USB3_MAC			80
+
+#define CLK_TIMER			83
+
+#define CLK_HDMI_AUDIO			84
+
+#define CLK_24M				85
+
+#define CLK_EDP				86
+
+#define CLK_24M_EDP			87
+#define CLK_EDP_PLL			88
+#define CLK_EDP_LINK			89
+
+#define CLK_USB2H0_PLLEN		90
+#define CLK_USB2H0_PHY			91
+#define CLK_USB2H0_CCE			92
+#define CLK_USB2H1_PLLEN		93
+#define CLK_USB2H1_PHY			94
+#define CLK_USB2H1_CCE			95
+
+#define CLK_DDR0			96
+#define CLK_DDR1			97
+#define CLK_DMM				98
+
+#define CLK_ETH_MAC			99
+#define CLK_RMII_REF			100
+
+#define CLK_NR_CLKS			(CLK_RMII_REF + 1)
+
+#endif /* __DT_BINDINGS_CLOCK_S900_CMU_H */

include/dt-bindings/clock/s900_cmu.h

@@ -1,77 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2015 Actions Semi Co., Ltd.
- * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
- *
- */
-
-#ifndef _DT_BINDINGS_CLOCK_S900_CMU_H_
-#define _DT_BINDINGS_CLOCK_S900_CMU_H_
-
-/* Module Clock ID */
-#define CLOCK_DDRCH1				0
-#define CLOCK_DMAC				1
-#define CLOCK_DDRCH0				2
-#define CLOCK_BROM				3
-#define CLOCK_NANDC0				4
-#define CLOCK_SD0				5
-#define CLOCK_SD1				6
-#define CLOCK_SD2				7
-#define CLOCK_DE				8
-#define CLOCK_LVDS				9
-#define CLOCK_EDP				10
-#define CLOCK_NANDC1				11
-#define CLOCK_DSI				12
-#define CLOCK_CSI0				13
-#define CLOCK_BISP				14
-#define CLOCK_CSI1				15
-#define CLOCK_SD3				16
-#define CLOCK_I2C4				17
-#define CLOCK_GPIO				18
-#define CLOCK_DMM				19
-#define CLOCK_I2STX				20
-#define CLOCK_I2SRX				21
-#define CLOCK_HDMIA				22
-#define CLOCK_SPDIF				23
-#define CLOCK_PCM0				24
-#define CLOCK_VDE				25
-#define CLOCK_VCE				26
-#define CLOCK_HDE				27
-#define CLOCK_SHARESRAM				28
-#define CLOCK_CMU_DDR1				29
-#define CLOCK_GPU3D				30
-#define CLOCK_CMUDDR0				31
-#define CLOCK_SPEED				32
-#define CLOCK_I2C5				33
-#define CLOCK_THERMAL				34
-#define CLOCK_HDMI				35
-#define CLOCK_PWM4				36
-#define CLOCK_PWM5				37
-#define CLOCK_UART0				38
-#define CLOCK_UART1				39
-#define CLOCK_UART2				40
-#define CLOCK_IRC				41
-#define CLOCK_SPI0				42
-#define CLOCK_SPI1				43
-#define CLOCK_SPI2				44
-#define CLOCK_SPI3				45
-#define CLOCK_I2C0				46
-#define CLOCK_I2C1				47
-#define CLOCK_PCM1				48
-#define CLOCK_IMX				49
-#define CLOCK_UART6				50
-#define CLOCK_UART3				51
-#define CLOCK_UART4				52
-#define CLOCK_UART5				53
-#define CLOCK_ETHERNET				54
-#define CLOCK_PWM0				55
-#define CLOCK_PWM1				56
-#define CLOCK_PWM2				57
-#define CLOCK_PWM3				58
-#define CLOCK_TIMER				59
-#define CLOCK_SE				60
-#define CLOCK_HDCP2TX				61
-#define CLOCK_I2C2				62
-#define CLOCK_I2C3				63
-
-#endif

include/dt-bindings/reset/actions,s700-reset.h

@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+//
+// Device Tree binding constants for Actions Semi S700 Reset Management Unit
+//
+// Copyright (c) 2018 Linaro Ltd.
+
+#ifndef __DT_BINDINGS_ACTIONS_S700_RESET_H
+#define __DT_BINDINGS_ACTIONS_S700_RESET_H
+
+#define RESET_AUDIO				0
+#define RESET_CSI				1
+#define RESET_DE				2
+#define RESET_DSI				3
+#define RESET_GPIO				4
+#define RESET_I2C0				5
+#define RESET_I2C1				6
+#define RESET_I2C2				7
+#define RESET_I2C3				8
+#define RESET_KEY				9
+#define RESET_LCD0				10
+#define RESET_SI				11
+#define RESET_SPI0				12
+#define RESET_SPI1				13
+#define RESET_SPI2				14
+#define RESET_SPI3				15
+#define RESET_UART0				16
+#define RESET_UART1				17
+#define RESET_UART2				18
+#define RESET_UART3				19
+#define RESET_UART4				20
+#define RESET_UART5				21
+#define RESET_UART6				22
+
+#endif /* __DT_BINDINGS_ACTIONS_S700_RESET_H */

include/dt-bindings/reset/actions,s900-reset.h

@@ -0,0 +1,65 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+//
+// Device Tree binding constants for Actions Semi S900 Reset Management Unit
+//
+// Copyright (c) 2018 Linaro Ltd.
+
+#ifndef __DT_BINDINGS_ACTIONS_S900_RESET_H
+#define __DT_BINDINGS_ACTIONS_S900_RESET_H
+
+#define RESET_CHIPID				0
+#define RESET_CPU_SCNT				1
+#define RESET_SRAMI				2
+#define RESET_DDR_CTL_PHY			3
+#define RESET_DMAC				4
+#define RESET_GPIO				5
+#define RESET_BISP_AXI				6
+#define RESET_CSI0				7
+#define RESET_CSI1				8
+#define RESET_DE				9
+#define RESET_DSI				10
+#define RESET_GPU3D_PA				11
+#define RESET_GPU3D_PB				12
+#define RESET_HDE				13
+#define RESET_I2C0				14
+#define RESET_I2C1				15
+#define RESET_I2C2				16
+#define RESET_I2C3				17
+#define RESET_I2C4				18
+#define RESET_I2C5				19
+#define RESET_IMX				20
+#define RESET_NANDC0				21
+#define RESET_NANDC1				22
+#define RESET_SD0				23
+#define RESET_SD1				24
+#define RESET_SD2				25
+#define RESET_SD3				26
+#define RESET_SPI0				27
+#define RESET_SPI1				28
+#define RESET_SPI2				29
+#define RESET_SPI3				30
+#define RESET_UART0				31
+#define RESET_UART1				32
+#define RESET_UART2				33
+#define RESET_UART3				34
+#define RESET_UART4				35
+#define RESET_UART5				36
+#define RESET_UART6				37
+#define RESET_HDMI				38
+#define RESET_LVDS				39
+#define RESET_EDP				40
+#define RESET_USB2HUB				41
+#define RESET_USB2HSIC				42
+#define RESET_USB3				43
+#define RESET_PCM1				44
+#define RESET_AUDIO				45
+#define RESET_PCM0				46
+#define RESET_SE				47
+#define RESET_GIC				48
+#define RESET_DDR_CTL_PHY_AXI			49
+#define RESET_CMU_DDR				50
+#define RESET_DMM				51
+#define RESET_HDCP2TX				52
+#define RESET_ETHERNET				53
+
+#endif /* __DT_BINDINGS_ACTIONS_S900_RESET_H */

include/init.h

@@ -129,6 +129,18 @@ int testdram(void);
  */
 int arch_reserve_stacks(void);
 
+/**
+ * arch_reserve_mmu() - Reserve memory for MMU TLB table
+ *
+ * Architecture-specific routine for reserving memory for the MMU TLB table.
+ * This is used in generic board init sequence in common/board_f.c.
+ *
+ * If an implementation is not provided, it will just be a nop stub.
+ *
+ * Return: 0 if OK
+ */
+int arch_reserve_mmu(void);
+
 /**
  * init_cache_f_r() - Turn on the cache in preparation for relocation
  *
@@ -145,7 +157,6 @@ int init_cache_f_r(void);
 int print_cpuinfo(void);
 #endif
 int timer_init(void);
-int reserve_mmu(void);
 int misc_init_f(void);
 
 #if defined(CONFIG_DTB_RESELECT)

include/mmc.h

@@ -377,7 +377,7 @@ struct mmc_uclass_priv {
  * @dev:	Device
  * @return associated mmc struct pointer if available, else NULL
  */
-struct mmc *mmc_get_mmc_dev(struct udevice *dev);
+struct mmc *mmc_get_mmc_dev(const struct udevice *dev);
 
 /* End of driver model support */
 

include/pci.h

@@ -543,6 +543,9 @@ typedef int pci_dev_t;
 #define PCI_VENDEV(v, d)	(((v) << 16) | (d))
 #define PCI_ANY_ID		(~0)
 
+/* Convert from Linux format to U-Boot format */
+#define PCI_TO_BDF(val)		((val) << 8)
+
 struct pci_device_id {
 	unsigned int vendor, device;	/* Vendor and device ID or PCI_ANY_ID */
 	unsigned int subvendor, subdevice; /* Subsystem ID's or PCI_ANY_ID */

include/test/suites.h

@@ -33,6 +33,7 @@ int do_ut_lib(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
 int do_ut_log(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
 int do_ut_optee(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
 int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+int do_ut_str(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]);
 int do_ut_time(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
 int do_ut_unicode(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
 

include/uuid.h

@@ -35,11 +35,13 @@ struct uuid {
 #define UUID_VARIANT		0x1
 
 int uuid_str_valid(const char *uuid);
-int uuid_str_to_bin(char *uuid_str, unsigned char *uuid_bin, int str_format);
+int uuid_str_to_bin(const char *uuid_str, unsigned char *uuid_bin,
-void uuid_bin_to_str(unsigned char *uuid_bin, char *uuid_str, int str_format);
+		    int str_format);
+void uuid_bin_to_str(const unsigned char *uuid_bin, char *uuid_str,
+		     int str_format);
 #ifdef CONFIG_PARTITION_TYPE_GUID
 int uuid_guid_get_bin(const char *guid_str, unsigned char *guid_bin);
-int uuid_guid_get_str(unsigned char *guid_bin, char *guid_str);
+int uuid_guid_get_str(const unsigned char *guid_bin, char *guid_str);
 #endif
 void gen_rand_uuid(unsigned char *uuid_bin);
 void gen_rand_uuid_str(char *uuid_str, int str_format);

include/vsprintf.h

@@ -222,4 +222,16 @@ bool str2long(const char *p, ulong *num);
  * @hz: Value to convert
  */
 char *strmhz(char *buf, unsigned long hz);
+
+/**
+ * str_to_upper() - Convert a string to upper case
+ *
+ * This simply uses toupper() on each character of the string.
+ *
+ * @in: String to convert (must be large enough to hold the output string)
+ * @out: Buffer to put converted string
+ * @len: Number of bytes available in @out (SIZE_MAX for all)
+ */
+void str_to_upper(const char *in, char *out, size_t len);
+
 #endif

lib/strto.c

@@ -34,6 +34,9 @@ static const char *_parse_integer_fixup_radix(const char *s, unsigned int *base)
 					*base = 16;
 					break;
 				}
+
+				if (!(var >= '0' && var <= '9'))
+					break;
 			} while (var);
 		}
 	}
@@ -176,3 +179,11 @@ long trailing_strtol(const char *str)
 {
 	return trailing_strtoln(str, NULL);
 }
+
+void str_to_upper(const char *in, char *out, size_t len)
+{
+	for (; len > 0 && *in; len--)
+		*out++ = toupper(*in++);
+	if (len)
+		*out = '\0';
+}

lib/uuid.c

@@ -121,7 +121,7 @@ int uuid_guid_get_bin(const char *guid_str, unsigned char *guid_bin)
  * @param guid_bin - pointer to string with partition type guid [16B]
  * @param guid_str - pointer to allocated partition type string [7B]
  */
-int uuid_guid_get_str(unsigned char *guid_bin, char *guid_str)
+int uuid_guid_get_str(const unsigned char *guid_bin, char *guid_str)
 {
 	int i;
 
@@ -143,7 +143,8 @@ int uuid_guid_get_str(unsigned char *guid_bin, char *guid_str)
  * @param uuid_bin - pointer to allocated array for big endian output [16B]
  * @str_format     - UUID string format: 0 - UUID; 1 - GUID
  */
-int uuid_str_to_bin(char *uuid_str, unsigned char *uuid_bin, int str_format)
+int uuid_str_to_bin(const char *uuid_str, unsigned char *uuid_bin,
+		    int str_format)
 {
 	uint16_t tmp16;
 	uint32_t tmp32;
@@ -194,7 +195,8 @@ int uuid_str_to_bin(char *uuid_str, unsigned char *uuid_bin, int str_format)
  * @str_format:		bit 0: 0 - UUID; 1 - GUID
  *			bit 1: 0 - lower case; 2 - upper case
  */
-void uuid_bin_to_str(unsigned char *uuid_bin, char *uuid_str, int str_format)
+void uuid_bin_to_str(const unsigned char *uuid_bin, char *uuid_str,
+		     int str_format)
 {
 	const u8 uuid_char_order[UUID_BIN_LEN] = {0, 1, 2, 3, 4, 5, 6, 7, 8,
 						  9, 10, 11, 12, 13, 14, 15};

scripts/Kbuild.include

@@ -7,6 +7,7 @@ quote   := "
 squote  := '
 empty   :=
 space   := $(empty) $(empty)
+space_escape := _-_SPACE_-_
 pound := \#
 
 ###
@@ -234,10 +235,10 @@ objectify = $(foreach o,$(1),$(if $(filter /%,$(o)),$(o),$(obj)/$(o)))
 # See Documentation/kbuild/makefiles.txt for more info
 
 ifneq ($(KBUILD_NOCMDDEP),1)
-# Check if both arguments has same arguments. Result is empty string if equal.
+# Check if both arguments are the same including their order. Result is empty
-# User may override this check using make KBUILD_NOCMDDEP=1
+# string if equal. User may override this check using make KBUILD_NOCMDDEP=1
-arg-check = $(strip $(filter-out $(cmd_$(1)), $(cmd_$@)) \
+arg-check = $(filter-out $(subst $(space),$(space_escape),$(strip $(cmd_$@))), \
-                    $(filter-out $(cmd_$@),   $(cmd_$(1))) )
+                         $(subst $(space),$(space_escape),$(strip $(cmd_$1))))
 else
 arg-check = $(if $(strip $(cmd_$@)),,1)
 endif
@@ -259,7 +260,7 @@ any-prereq = $(filter-out $(PHONY),$?) $(filter-out $(PHONY) $(wildcard $^),$^)
 if_changed = $(if $(strip $(any-prereq) $(arg-check)),                       \
 	@set -e;                                                             \
 	$(echo-cmd) $(cmd_$(1));                                             \
-	printf '%s\n' 'cmd_$@ := $(make-cmd)' > $(dot-target).cmd)
+	printf '%s\n' 'cmd_$@ := $(make-cmd)' > $(dot-target).cmd, @:)
 
 # Execute the command and also postprocess generated .d dependencies file.
 if_changed_dep = $(if $(strip $(any-prereq) $(arg-check) ),                  \
@@ -267,14 +268,14 @@ if_changed_dep = $(if $(strip $(any-prereq) $(arg-check) ),                  \
 	$(echo-cmd) $(cmd_$(1));                                             \
 	scripts/basic/fixdep $(depfile) $@ '$(make-cmd)' > $(dot-target).tmp;\
 	rm -f $(depfile);                                                    \
-	mv -f $(dot-target).tmp $(dot-target).cmd)
+	mv -f $(dot-target).tmp $(dot-target).cmd, @:)
 
 # Usage: $(call if_changed_rule,foo)
 # Will check if $(cmd_foo) or any of the prerequisites changed,
 # and if so will execute $(rule_foo).
 if_changed_rule = $(if $(strip $(any-prereq) $(arg-check) ),                 \
 	@set -e;                                                             \
-	$(rule_$(1)))
+	$(rule_$(1)), @:)
 
 ###
 # why - tell why a a target got build

scripts/Makefile.build

@@ -75,17 +75,6 @@ ifneq ($(hostprogs-y)$(hostprogs-m)$(hostlibs-y)$(hostlibs-m)$(hostcxxlibs-y)$(h
 include scripts/Makefile.host
 endif
 
-# Uncommented for U-Boot
-#  We need to create output dicrectory for SPL and TPL even for in-tree build
-#ifneq ($(KBUILD_SRC),)
-# Create output directory if not already present
-_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
-
-# Create directories for object files if directory does not exist
-# Needed when obj-y := dir/file.o syntax is used
-_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
-#endif
-
 ifndef obj
 $(warning kbuild: Makefile.build is included improperly)
 endif
@@ -441,11 +430,14 @@ FORCE:
 # optimization, we don't need to read them if the target does not
 # exist, we will rebuild anyway in that case.
 
-targets := $(wildcard $(sort $(targets)))
+cmd_files := $(wildcard $(foreach f,$(sort $(targets)),$(dir $(f)).$(notdir $(f)).cmd))
-cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
 
 ifneq ($(cmd_files),)
   include $(cmd_files)
 endif
 
+# Create directories for object files if they do not exist
+obj-dirs := $(sort $(obj) $(patsubst %/,%, $(dir $(targets))))
+$(shell mkdir -p $(obj-dirs))
+
 .PHONY: $(PHONY)

scripts/Makefile.host

@@ -53,15 +53,6 @@ host-cxxobjs	:= $(sort $(foreach m,$(host-cxxmulti),$($(m)-cxxobjs)))
 host-cshobjs	:= $(sort $(foreach m,$(host-cshlib),$($(m:.so=-objs))))
 host-cxxshobjs	:= $(sort $(foreach m,$(host-cxxshlib),$($(m:.so=-objs))))
 
-# output directory for programs/.o files
-# hostprogs-y := tools/build may have been specified.
-# Retrieve also directory of .o files from prog-objs or prog-cxxobjs notation
-host-objdirs := $(dir $(__hostprogs) $(host-cobjs) $(host-cxxobjs))
-
-host-objdirs := $(strip $(sort $(filter-out ./,$(host-objdirs))))
-
-
-__hostprogs     := $(addprefix $(obj)/,$(__hostprogs))
 host-csingle	:= $(addprefix $(obj)/,$(host-csingle))
 host-cmulti	:= $(addprefix $(obj)/,$(host-cmulti))
 host-cobjs	:= $(addprefix $(obj)/,$(host-cobjs))
@@ -72,9 +63,6 @@ host-cxxshlib	:= $(addprefix $(obj)/,$(host-cxxshlib))
 host-cshobjs	:= $(addprefix $(obj)/,$(host-cshobjs))
 host-cxxshobjs	:= $(addprefix $(obj)/,$(host-cxxshobjs))
 host-shared	:= $(addprefix $(obj)/,$(host-shared))
-host-objdirs    := $(addprefix $(obj)/,$(host-objdirs))
-
-obj-dirs += $(host-objdirs)
 
 #####
 # Handle options to gcc. Support building with separate output directory

scripts/Makefile.lib

@@ -57,15 +57,11 @@ single-used-m := $(sort $(filter-out $(multi-used-m),$(obj-m)))
 # objects depend on those (obviously)
 multi-objs-y := $(foreach m, $(multi-used-y), $($(m:.o=-objs)) $($(m:.o=-y)))
 multi-objs-m := $(foreach m, $(multi-used-m), $($(m:.o=-objs)) $($(m:.o=-y)))
-multi-objs   := $(multi-objs-y) $(multi-objs-m)
 
 # $(subdir-obj-y) is the list of objects in $(obj-y) which uses dir/ to
 # tell kbuild to descend
 subdir-obj-y := $(filter %/built-in.o, $(obj-y))
 
-# $(obj-dirs) is a list of directories that contain object files
-obj-dirs := $(dir $(multi-objs) $(obj-y))
-
 # Replace multi-part objects by their individual parts, look at local dir only
 real-objs-y := $(foreach m, $(filter-out $(subdir-obj-y), $(obj-y)), $(if $(strip $($(m:.o=-objs)) $($(m:.o=-y))),$($(m:.o=-objs)) $($(m:.o=-y)),$(m))) $(extra-y)
 real-objs-m := $(foreach m, $(obj-m), $(if $(strip $($(m:.o=-objs)) $($(m:.o=-y))),$($(m:.o=-objs)) $($(m:.o=-y)),$(m)))
@@ -88,7 +84,6 @@ multi-used-m	:= $(addprefix $(obj)/,$(multi-used-m))
 multi-objs-y	:= $(addprefix $(obj)/,$(multi-objs-y))
 multi-objs-m	:= $(addprefix $(obj)/,$(multi-objs-m))
 subdir-ym	:= $(addprefix $(obj)/,$(subdir-ym))
-obj-dirs	:= $(addprefix $(obj)/,$(obj-dirs))
 
 # These flags are needed for modversions and compiling, so we define them here
 # already
@@ -97,10 +92,10 @@ obj-dirs	:= $(addprefix $(obj)/,$(obj-dirs))
 # Note: Files that end up in two or more modules are compiled without the
 #       KBUILD_MODNAME definition. The reason is that any made-up name would
 #       differ in different configs.
-name-fix = $(subst $(comma),_,$(subst -,_,$1))
+name-fix = $(squote)$(quote)$(subst $(comma),_,$(subst -,_,$1))$(quote)$(squote)
-basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))"
+basename_flags = -DKBUILD_BASENAME=$(call name-fix,$(basetarget))
 modname_flags  = $(if $(filter 1,$(words $(modname))),\
-                 -D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))")
+                 -DKBUILD_MODNAME=$(call name-fix,$(modname)))
 
 orig_c_flags   = $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(KBUILD_SUBDIR_CCFLAGS) \
                  $(ccflags-y) $(CFLAGS_$(basetarget).o)
@@ -153,7 +148,7 @@ endif
 # Modified for U-Boot: LINUXINCLUDE -> UBOOTINCLUDE
 c_flags        = -Wp,-MD,$(depfile) $(NOSTDINC_FLAGS) $(UBOOTINCLUDE)     \
 		 $(__c_flags) $(modkern_cflags)                           \
-		 -D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags)
+		 $(basename_flags) $(modname_flags)
 
 a_flags        = -Wp,-MD,$(depfile) $(NOSTDINC_FLAGS) $(UBOOTINCLUDE)     \
 		 $(__a_flags) $(modkern_aflags)
@@ -576,3 +571,32 @@ quiet_cmd_fdtgrep = FDTGREP $@
 quiet_cmd_fdt_rm_props = FDTGREP $@
 	cmd_fdt_rm_props = cat $< | $(objtree)/tools/fdtgrep -r -O dtb - -o $@ \
 			$(addprefix -P ,$(subst $\",,$(CONFIG_OF_REMOVE_PROPS)))
+
+# ASM offsets
+# ---------------------------------------------------------------------------
+
+# Default sed regexp - multiline due to syntax constraints
+define sed-offsets
+	"s:[[:space:]]*\.ascii[[:space:]]*\"\(.*\)\":\1:; \
+	/^->/{s:->#\(.*\):/* \1 */:; \
+	s:^->\([^ ]*\) [\$$#]*\([-0-9]*\) \(.*\):#define \1 \2 /* \3 */:; \
+	s:^->\([^ ]*\) [\$$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; \
+	s:->::; p;}"
+endef
+
+# Use filechk to avoid rebuilds when a header changes, but the resulting file
+# does not
+define filechk_offsets
+	(set -e; \
+	 echo "#ifndef $2"; \
+	 echo "#define $2"; \
+	 echo "/*"; \
+	 echo " * DO NOT MODIFY."; \
+	 echo " *"; \
+	 echo " * This file was generated by Kbuild"; \
+	 echo " */"; \
+	 echo ""; \
+	 sed -ne $(sed-offsets); \
+	 echo ""; \
+	 echo "#endif" )
+endef

scripts/Makefile.spl

@@ -307,10 +307,11 @@ quiet_cmd_dtoch = DTOC H  $@
 cmd_dtoch = $(pythonpath) $(srctree)/tools/dtoc/dtoc -d $(obj)/$(SPL_BIN).dtb -o $@ struct
 
 quiet_cmd_plat = PLAT    $@
-cmd_plat = $(CC) $(c_flags) -c $< -o $@
+cmd_plat = $(CC) $(c_flags) -c $< -o $(filter-out $(PHONY),$@)
 
+targets += $(obj)/dts/dt-platdata.o
 $(obj)/dts/dt-platdata.o: $(obj)/dts/dt-platdata.c \
-		include/generated/dt-structs-gen.h
+		include/generated/dt-structs-gen.h FORCE
 	$(call if_changed,plat)
 
 PHONY += dts_dir

scripts/coccinelle/api/alloc/alloc_cast.cocci

@@ -0,0 +1,102 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/// Remove casting the values returned by memory allocation functions
+/// like kmalloc, kzalloc, kmem_cache_alloc, kmem_cache_zalloc etc.
+///
+//# This makes an effort to find cases of casting of values returned by
+//# malloc, calloc, kmalloc, kmalloc_array, kmalloc_node and removes
+//# the casting as it is not required. The result in the patch case may
+//# need some reformatting.
+//
+// Confidence: High
+// Copyright: (C) 2014 Himangi Saraogi
+// Copyright: (C) 2017 Himanshu Jha
+// Comments:
+// Options: --no-includes --include-headers
+//
+
+virtual context
+virtual patch
+virtual org
+virtual report
+
+@initialize:python@
+@@
+import re
+pattern = '__'
+m = re.compile(pattern)
+
+@r1 depends on context || patch@
+type T;
+@@
+
+  (T *)
+  \(malloc\|calloc\|kmalloc\|kmalloc_array\|kmalloc_node\)(...)
+
+//----------------------------------------------------------
+//  For context mode
+//----------------------------------------------------------
+
+@script:python depends on context@
+t << r1.T;
+@@
+
+if m.search(t) != None:
+        cocci.include_match(False)
+
+@depends on context && r1@
+type r1.T;
+@@
+
+* (T *)
+  \(malloc\|calloc\|kmalloc\|kmalloc_array\|kmalloc_node\)(...)
+
+//----------------------------------------------------------
+//  For patch mode
+//----------------------------------------------------------
+
+@script:python depends on patch@
+t << r1.T;
+@@
+
+if m.search(t) != None:
+        cocci.include_match(False)
+
+@depends on patch && r1@
+type r1.T;
+@@
+
+- (T *)
+  \(malloc\|calloc\|kmalloc\|kmalloc_array\|kmalloc_node\)(...)
+
+//----------------------------------------------------------
+//  For org and report mode
+//----------------------------------------------------------
+
+@r2 depends on org || report@
+type T;
+position p;
+@@
+
+ (T@p *)
+  \(malloc\|calloc\|kmalloc\|kmalloc_array\|kmalloc_node\)(...)
+
+@script:python depends on org@
+p << r2.p;
+t << r2.T;
+@@
+
+if m.search(t) != None:
+	cocci.include_match(False)
+else:
+	coccilib.org.print_safe_todo(p[0], t)
+
+@script:python depends on report@
+p << r2.p;
+t << r2.T;
+@@
+
+if m.search(t) != None:
+	cocci.include_match(False)
+else:
+	msg="WARNING: casting value returned by memory allocation function to (%s *) is useless." % (t)
+	coccilib.report.print_report(p[0], msg)

scripts/coccinelle/free/ifnullfree.cocci

@@ -1,10 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-only
 /// NULL check before some freeing functions is not needed.
 ///
 /// Based on checkpatch warning
 /// "kfree(NULL) is safe this check is probably not required"
 /// and kfreeaddr.cocci by Julia Lawall.
 ///
-// Copyright: (C) 2014 Fabian Frederick.  GPLv2.
+// Copyright: (C) 2014 Fabian Frederick.
 // Comments: -
 // Options: --no-includes --include-headers
 
@@ -18,21 +19,19 @@ expression E;
 @@
 - if (E != NULL)
 (
+  free(E);
+|
   kfree(E);
 |
-  kzfree(E);
+  vfree(E);
 |
-  debugfs_remove(E);
+  vfree_recursive(E);
 |
-  debugfs_remove_recursive(E);
+  kmem_cache_free(E);
-|
-  usb_free_urb(E);
 |
   kmem_cache_destroy(E);
 |
-  mempool_destroy(E);
+  gzfree(E);
-|
-  dma_pool_destroy(E);
 )
 
 @r depends on context || report || org @
@@ -41,9 +40,8 @@ position p;
 @@
 
 * if (E != NULL)
-*	\(kfree@p\|kzfree@p\|debugfs_remove@p\|debugfs_remove_recursive@p\|
+*	\(free@p\|kfree@p\|vfree@p\|debugfs_remove_recursive@p\|
-*         usb_free_urb@p\|kmem_cache_destroy@p\|mempool_destroy@p\|
+*         kmem_cache_free@p\|kmem_cache_destroy@p\|gzfree@p\)(E);
-*         dma_pool_destroy@p\)(E);
 
 @script:python depends on org@
 p << r.p;
@@ -55,5 +53,5 @@ cocci.print_main("NULL check before that freeing function is not needed", p)
 p << r.p;
 @@
 
-msg = "WARNING: NULL check before freeing functions like kfree, debugfs_remove, debugfs_remove_recursive or usb_free_urb is not needed. Maybe consider reorganizing relevant code to avoid passing NULL values."
+msg = "WARNING: NULL check before some freeing functions is not needed."
 coccilib.report.print_report(p[0], msg)

test/Makefile

@@ -8,6 +8,7 @@ obj-$(CONFIG_UNIT_TEST) += ut.o
 obj-$(CONFIG_SANDBOX) += command_ut.o
 obj-$(CONFIG_SANDBOX) += compression.o
 obj-$(CONFIG_SANDBOX) += print_ut.o
+obj-$(CONFIG_SANDBOX) += str_ut.o
 obj-$(CONFIG_UT_TIME) += time_ut.o
 obj-$(CONFIG_UT_UNICODE) += unicode_ut.o
 obj-y += log/

test/cmd_ut.c

@@ -74,6 +74,8 @@ static cmd_tbl_t cmd_ut_sub[] = {
 			 "", ""),
 	U_BOOT_CMD_MKENT(bloblist, CONFIG_SYS_MAXARGS, 1, do_ut_bloblist,
 			 "", ""),
+	U_BOOT_CMD_MKENT(str, CONFIG_SYS_MAXARGS, 1, do_ut_str,
+			 "", ""),
 #endif
 };
 
@@ -137,6 +139,9 @@ static char ut_help_text[] =
 #ifdef CONFIG_UT_OVERLAY
 	"ut overlay [test-name]\n"
 #endif
+#ifdef CONFIG_SANDBOX
+	"ut str - Basic test of string functions\n"
+#endif
 #ifdef CONFIG_UT_TIME
 	"ut time - Very basic test of time functions\n"
 #endif

test/str_ut.c

@@ -0,0 +1,115 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Google LLC
+ */
+
+#include <common.h>
+#include <vsprintf.h>
+#include <test/suites.h>
+#include <test/test.h>
+#include <test/ut.h>
+
+/* This is large enough for any of the test strings */
+#define TEST_STR_SIZE	200
+
+static const char str1[] = "I'm sorry I'm late.";
+static const char str2[] = "1099abNo, don't bother apologising.";
+static const char str3[] = "0xbI'm sorry you're alive.";
+
+/* Declare a new str test */
+#define STR_TEST(_name, _flags)		UNIT_TEST(_name, _flags, str_test)
+
+static int str_test_upper(struct unit_test_state *uts)
+{
+	char out[TEST_STR_SIZE];
+
+	/* Make sure it adds a terminator */
+	out[strlen(str1)] = 'a';
+	str_to_upper(str1, out, SIZE_MAX);
+	ut_asserteq_str("I'M SORRY I'M LATE.", out);
+
+	/* In-place operation */
+	strcpy(out, str2);
+	str_to_upper(out, out, SIZE_MAX);
+	ut_asserteq_str("1099ABNO, DON'T BOTHER APOLOGISING.", out);
+
+	/* Limited length */
+	str_to_upper(str1, out, 7);
+	ut_asserteq_str("I'M SORO, DON'T BOTHER APOLOGISING.", out);
+
+	/* In-place with limited length */
+	strcpy(out, str2);
+	str_to_upper(out, out, 7);
+	ut_asserteq_str("1099ABNo, don't bother apologising.", out);
+
+	/* Copy an empty string to a buffer with space*/
+	out[1] = 0x7f;
+	str_to_upper("", out, SIZE_MAX);
+	ut_asserteq('\0', *out);
+	ut_asserteq(0x7f, out[1]);
+
+	/* Copy an empty string to a buffer with no space*/
+	out[0] = 0x7f;
+	str_to_upper("", out, 0);
+	ut_asserteq(0x7f, out[0]);
+
+	return 0;
+}
+STR_TEST(str_test_upper, 0);
+
+static int run_strtoul(struct unit_test_state *uts, const char *str, int base,
+		       ulong expect_val, int expect_endp_offset, bool upper)
+{
+	char out[TEST_STR_SIZE];
+	char *endp;
+	ulong val;
+
+	strcpy(out, str);
+	if (upper)
+		str_to_upper(out, out, -1);
+
+	val = simple_strtoul(out, &endp, base);
+	ut_asserteq(expect_val, val);
+	ut_asserteq(expect_endp_offset, endp - out);
+
+	return 0;
+}
+
+static int str_simple_strtoul(struct unit_test_state *uts)
+{
+	int upper;
+
+	/* Check that it is case-insentive */
+	for (upper = 0; upper < 2; upper++) {
+		/* Base 10 and base 16 */
+		ut_assertok(run_strtoul(uts, str2, 10, 1099, 4, upper));
+		ut_assertok(run_strtoul(uts, str2, 16, 0x1099ab, 6, upper));
+
+		/* Invalid string */
+		ut_assertok(run_strtoul(uts, str1, 10, 0, 0, upper));
+
+		/* Base 0 */
+		ut_assertok(run_strtoul(uts, str1, 0, 0, 0, upper));
+		ut_assertok(run_strtoul(uts, str2, 0, 1099, 4, upper));
+		ut_assertok(run_strtoul(uts, str3, 0, 0xb, 3, upper));
+
+		/* Base 2 */
+		ut_assertok(run_strtoul(uts, str1, 2, 0, 0, upper));
+		ut_assertok(run_strtoul(uts, str2, 2, 2, 2, upper));
+	}
+
+	/* Check endp being NULL */
+	ut_asserteq(1099, simple_strtoul(str2, NULL, 0));
+
+	return 0;
+}
+STR_TEST(str_simple_strtoul, 0);
+
+int do_ut_str(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+{
+	struct unit_test *tests = ll_entry_start(struct unit_test,
+						 str_test);
+	const int n_ents = ll_entry_count(struct unit_test, str_test);
+
+	return cmd_ut_category("str", "str_", tests, n_ents, argc, argv);
+}