arm: omap: add support for am57xx devices
just add a few ifdefs around because this device is very similar to dra7xxx. Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
This commit is contained in:
parent
56fe405516
commit
d11ac4b56d
@ -57,7 +57,7 @@ void save_omap_boot_params(void)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_DRA7XX
|
#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
|
||||||
/*
|
/*
|
||||||
* We get different values for QSPI_1 and QSPI_4 being used, but
|
* We get different values for QSPI_1 and QSPI_4 being used, but
|
||||||
* don't actually care about this difference. Rather than
|
* don't actually care about this difference. Rather than
|
||||||
|
@ -314,7 +314,7 @@
|
|||||||
*/
|
*/
|
||||||
#define CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC 31219
|
#define CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC 31219
|
||||||
|
|
||||||
#ifdef CONFIG_DRA7XX
|
#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
|
||||||
#define V_OSCK 20000000 /* Clock output from T2 */
|
#define V_OSCK 20000000 /* Clock output from T2 */
|
||||||
#else
|
#else
|
||||||
#define V_OSCK 19200000 /* Clock output from T2 */
|
#define V_OSCK 19200000 /* Clock output from T2 */
|
||||||
|
@ -27,7 +27,7 @@
|
|||||||
#define CONTROL_CORE_ID_CODE 0x4A002204
|
#define CONTROL_CORE_ID_CODE 0x4A002204
|
||||||
#define CONTROL_WKUP_ID_CODE 0x4AE0C204
|
#define CONTROL_WKUP_ID_CODE 0x4AE0C204
|
||||||
|
|
||||||
#ifdef CONFIG_DRA7XX
|
#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
|
||||||
#define CONTROL_ID_CODE CONTROL_WKUP_ID_CODE
|
#define CONTROL_ID_CODE CONTROL_WKUP_ID_CODE
|
||||||
#else
|
#else
|
||||||
#define CONTROL_ID_CODE CONTROL_CORE_ID_CODE
|
#define CONTROL_ID_CODE CONTROL_CORE_ID_CODE
|
||||||
@ -163,7 +163,7 @@ struct s32ktimer {
|
|||||||
* much larger) and do not, at this time, make use of the additional
|
* much larger) and do not, at this time, make use of the additional
|
||||||
* space.
|
* space.
|
||||||
*/
|
*/
|
||||||
#ifdef CONFIG_DRA7XX
|
#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
|
||||||
#define NON_SECURE_SRAM_START 0x40300000
|
#define NON_SECURE_SRAM_START 0x40300000
|
||||||
#define NON_SECURE_SRAM_END 0x40380000 /* Not inclusive */
|
#define NON_SECURE_SRAM_END 0x40380000 /* Not inclusive */
|
||||||
#else
|
#else
|
||||||
|
@ -663,7 +663,8 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio,
|
|||||||
case 1:
|
case 1:
|
||||||
priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC2_BASE;
|
priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC2_BASE;
|
||||||
#if (defined(CONFIG_OMAP44XX) || defined(CONFIG_OMAP54XX) || \
|
#if (defined(CONFIG_OMAP44XX) || defined(CONFIG_OMAP54XX) || \
|
||||||
defined(CONFIG_DRA7XX)) && defined(CONFIG_HSMMC2_8BIT)
|
defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)) && \
|
||||||
|
defined(CONFIG_HSMMC2_8BIT)
|
||||||
/* Enable 8-bit interface for eMMC on OMAP4/5 or DRA7XX */
|
/* Enable 8-bit interface for eMMC on OMAP4/5 or DRA7XX */
|
||||||
host_caps_val |= MMC_MODE_8BIT;
|
host_caps_val |= MMC_MODE_8BIT;
|
||||||
#endif
|
#endif
|
||||||
@ -672,7 +673,7 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio,
|
|||||||
#ifdef OMAP_HSMMC3_BASE
|
#ifdef OMAP_HSMMC3_BASE
|
||||||
case 2:
|
case 2:
|
||||||
priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC3_BASE;
|
priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC3_BASE;
|
||||||
#if defined(CONFIG_DRA7XX) && defined(CONFIG_HSMMC3_8BIT)
|
#if (defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)) && defined(CONFIG_HSMMC3_8BIT)
|
||||||
/* Enable 8-bit interface for eMMC on DRA7XX */
|
/* Enable 8-bit interface for eMMC on DRA7XX */
|
||||||
host_caps_val |= MMC_MODE_8BIT;
|
host_caps_val |= MMC_MODE_8BIT;
|
||||||
#endif
|
#endif
|
||||||
|
@ -27,7 +27,7 @@ int palmas_mmc1_poweron_ldo(void)
|
|||||||
{
|
{
|
||||||
u8 val = 0;
|
u8 val = 0;
|
||||||
|
|
||||||
#if defined(CONFIG_DRA7XX)
|
#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
|
||||||
/*
|
/*
|
||||||
* Currently valid for the dra7xx_evm board:
|
* Currently valid for the dra7xx_evm board:
|
||||||
* Set TPS659038 LDO1 to 3.0 V
|
* Set TPS659038 LDO1 to 3.0 V
|
||||||
|
@ -102,7 +102,7 @@ static void ti_spi_setup_spi_register(struct ti_qspi_slave *qslave)
|
|||||||
struct spi_slave *slave = &qslave->slave;
|
struct spi_slave *slave = &qslave->slave;
|
||||||
u32 memval = 0;
|
u32 memval = 0;
|
||||||
|
|
||||||
#ifdef CONFIG_DRA7XX
|
#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
|
||||||
slave->memory_map = (void *)MMAP_START_ADDR_DRA;
|
slave->memory_map = (void *)MMAP_START_ADDR_DRA;
|
||||||
#else
|
#else
|
||||||
slave->memory_map = (void *)MMAP_START_ADDR_AM43x;
|
slave->memory_map = (void *)MMAP_START_ADDR_AM43x;
|
||||||
@ -244,7 +244,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
|
|||||||
uint status;
|
uint status;
|
||||||
int timeout;
|
int timeout;
|
||||||
|
|
||||||
#ifdef CONFIG_DRA7XX
|
#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
|
||||||
int val;
|
int val;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
@ -254,7 +254,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
|
|||||||
/* Setup mmap flags */
|
/* Setup mmap flags */
|
||||||
if (flags & SPI_XFER_MMAP) {
|
if (flags & SPI_XFER_MMAP) {
|
||||||
writel(MM_SWITCH, &qslave->base->memswitch);
|
writel(MM_SWITCH, &qslave->base->memswitch);
|
||||||
#ifdef CONFIG_DRA7XX
|
#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
|
||||||
val = readl(CORE_CTRL_IO);
|
val = readl(CORE_CTRL_IO);
|
||||||
val |= MEM_CS;
|
val |= MEM_CS;
|
||||||
writel(val, CORE_CTRL_IO);
|
writel(val, CORE_CTRL_IO);
|
||||||
@ -262,7 +262,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
|
|||||||
return 0;
|
return 0;
|
||||||
} else if (flags & SPI_XFER_MMAP_END) {
|
} else if (flags & SPI_XFER_MMAP_END) {
|
||||||
writel(~MM_SWITCH, &qslave->base->memswitch);
|
writel(~MM_SWITCH, &qslave->base->memswitch);
|
||||||
#ifdef CONFIG_DRA7XX
|
#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
|
||||||
val = readl(CORE_CTRL_IO);
|
val = readl(CORE_CTRL_IO);
|
||||||
val &= MEM_CS_UNSELECT;
|
val &= MEM_CS_UNSELECT;
|
||||||
writel(val, CORE_CTRL_IO);
|
writel(val, CORE_CTRL_IO);
|
||||||
|
@ -14,6 +14,10 @@
|
|||||||
#define OMAP_XHCI_BASE 0x488d0000
|
#define OMAP_XHCI_BASE 0x488d0000
|
||||||
#define OMAP_OCP1_SCP_BASE 0x4A081000
|
#define OMAP_OCP1_SCP_BASE 0x4A081000
|
||||||
#define OMAP_OTG_WRAPPER_BASE 0x488c0000
|
#define OMAP_OTG_WRAPPER_BASE 0x488c0000
|
||||||
|
#elif defined CONFIG_AM57XX
|
||||||
|
#define OMAP_XHCI_BASE 0x48890000
|
||||||
|
#define OMAP_OCP1_SCP_BASE 0x4A084c00
|
||||||
|
#define OMAP_OTG_WRAPPER_BASE 0x48880000
|
||||||
#elif defined CONFIG_AM43XX
|
#elif defined CONFIG_AM43XX
|
||||||
#define OMAP_XHCI_BASE 0x483d0000
|
#define OMAP_XHCI_BASE 0x483d0000
|
||||||
#define OMAP_OCP1_SCP_BASE 0x483E8000
|
#define OMAP_OCP1_SCP_BASE 0x483E8000
|
||||||
|
Loading…
Reference in New Issue
Block a user