arm: omap: add support for am57xx devices
just add a few ifdefs around because this device is very similar to dra7xxx. Signed-off-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
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@ -57,7 +57,7 @@ void save_omap_boot_params(void)
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}
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}
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#ifdef CONFIG_DRA7XX
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#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
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/*
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* We get different values for QSPI_1 and QSPI_4 being used, but
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* don't actually care about this difference. Rather than
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@ -314,7 +314,7 @@
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*/
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#define CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC 31219
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#ifdef CONFIG_DRA7XX
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#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
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#define V_OSCK 20000000 /* Clock output from T2 */
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#else
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#define V_OSCK 19200000 /* Clock output from T2 */
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@ -27,7 +27,7 @@
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#define CONTROL_CORE_ID_CODE 0x4A002204
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#define CONTROL_WKUP_ID_CODE 0x4AE0C204
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#ifdef CONFIG_DRA7XX
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#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
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#define CONTROL_ID_CODE CONTROL_WKUP_ID_CODE
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#else
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#define CONTROL_ID_CODE CONTROL_CORE_ID_CODE
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@ -163,7 +163,7 @@ struct s32ktimer {
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* much larger) and do not, at this time, make use of the additional
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* space.
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*/
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#ifdef CONFIG_DRA7XX
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#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
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#define NON_SECURE_SRAM_START 0x40300000
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#define NON_SECURE_SRAM_END 0x40380000 /* Not inclusive */
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#else
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@ -663,7 +663,8 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio,
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case 1:
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priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC2_BASE;
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#if (defined(CONFIG_OMAP44XX) || defined(CONFIG_OMAP54XX) || \
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defined(CONFIG_DRA7XX)) && defined(CONFIG_HSMMC2_8BIT)
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defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)) && \
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defined(CONFIG_HSMMC2_8BIT)
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/* Enable 8-bit interface for eMMC on OMAP4/5 or DRA7XX */
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host_caps_val |= MMC_MODE_8BIT;
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#endif
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@ -672,7 +673,7 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio,
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#ifdef OMAP_HSMMC3_BASE
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case 2:
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priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC3_BASE;
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#if defined(CONFIG_DRA7XX) && defined(CONFIG_HSMMC3_8BIT)
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#if (defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)) && defined(CONFIG_HSMMC3_8BIT)
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/* Enable 8-bit interface for eMMC on DRA7XX */
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host_caps_val |= MMC_MODE_8BIT;
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#endif
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@ -27,7 +27,7 @@ int palmas_mmc1_poweron_ldo(void)
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{
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u8 val = 0;
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#if defined(CONFIG_DRA7XX)
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#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
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/*
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* Currently valid for the dra7xx_evm board:
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* Set TPS659038 LDO1 to 3.0 V
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@ -102,7 +102,7 @@ static void ti_spi_setup_spi_register(struct ti_qspi_slave *qslave)
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struct spi_slave *slave = &qslave->slave;
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u32 memval = 0;
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#ifdef CONFIG_DRA7XX
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#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
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slave->memory_map = (void *)MMAP_START_ADDR_DRA;
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#else
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slave->memory_map = (void *)MMAP_START_ADDR_AM43x;
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@ -244,7 +244,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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uint status;
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int timeout;
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#ifdef CONFIG_DRA7XX
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#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
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int val;
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#endif
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@ -254,7 +254,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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/* Setup mmap flags */
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if (flags & SPI_XFER_MMAP) {
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writel(MM_SWITCH, &qslave->base->memswitch);
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#ifdef CONFIG_DRA7XX
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#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
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val = readl(CORE_CTRL_IO);
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val |= MEM_CS;
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writel(val, CORE_CTRL_IO);
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@ -262,7 +262,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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return 0;
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} else if (flags & SPI_XFER_MMAP_END) {
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writel(~MM_SWITCH, &qslave->base->memswitch);
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#ifdef CONFIG_DRA7XX
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#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
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val = readl(CORE_CTRL_IO);
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val &= MEM_CS_UNSELECT;
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writel(val, CORE_CTRL_IO);
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@ -14,6 +14,10 @@
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#define OMAP_XHCI_BASE 0x488d0000
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#define OMAP_OCP1_SCP_BASE 0x4A081000
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#define OMAP_OTG_WRAPPER_BASE 0x488c0000
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#elif defined CONFIG_AM57XX
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#define OMAP_XHCI_BASE 0x48890000
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#define OMAP_OCP1_SCP_BASE 0x4A084c00
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#define OMAP_OTG_WRAPPER_BASE 0x48880000
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#elif defined CONFIG_AM43XX
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#define OMAP_XHCI_BASE 0x483d0000
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#define OMAP_OCP1_SCP_BASE 0x483E8000
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