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x86: Re-enable PCAT timer 2 for beeping

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While we don't want PCAT timers for timing, we want timer 2 so that we can
still make a beep. Re-purpose the PCAT driver for this, and enable it in
coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass 2013-04-17 16:13:39 +00:00
parent f9083bbe78
commit d0b6f247a1
5 changed files with 11 additions and 68 deletions
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1
arch/x86/include/asm/u-boot-x86.h
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@ -41,6 +41,7 @@ typedef void (timer_fnc_t) (void);
int register_timer_isr (timer_fnc_t *isr_func);
unsigned long get_tbclk_mhz(void);
void timer_set_base(uint64_t base);
int pcat_timer_init(void);
/* Architecture specific - can be in arch/x86/cpu/, arch/x86/lib/, or $(BOARD)/ */
int dram_init_f(void);

2
arch/x86/lib/Makefile
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@ -31,7 +31,7 @@ COBJS-y += gcc.o
COBJS-y += init_helpers.o
COBJS-y += interrupts.o
COBJS-$(CONFIG_SYS_PCAT_INTERRUPTS) += pcat_interrupts.o
COBJS-$(CONFIG_SYS_GENERIC_TIMER) += pcat_timer.o
COBJS-$(CONFIG_SYS_PCAT_TIMER) += pcat_timer.o
COBJS-$(CONFIG_PCI) += pci_type1.o
COBJS-y += relocate.o
COBJS-y += physmem.o

69
arch/x86/lib/pcat_timer.c
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@ -24,83 +24,20 @@
#include <common.h>
#include <asm/io.h>
#include <asm/i8254.h>
#include <asm/ibmpc.h>
#include <asm/interrupt.h>
#define TIMER0_VALUE 0x04aa /* 1kHz 1.9318MHz / 1000 */
#define TIMER2_VALUE 0x0a8e /* 440Hz */
static int timer_init_done;
int timer_init(void)
int pcat_timer_init(void)
{
/* initialize timer 0 and 2
*
* Timer 0 is used to increment system_tick 1000 times/sec
* Timer 1 was used for DRAM refresh in early PC's
* Timer 2 is used to drive the speaker
/*
* initialize 2, used to drive the speaker
* (to start a beep: write 3 to port 0x61,
* to stop it again: write 0)
*/
outb(PIT_CMD_CTR0 | PIT_CMD_BOTH | PIT_CMD_MODE2,
PIT_BASE + PIT_COMMAND);
outb(TIMER0_VALUE & 0xff, PIT_BASE + PIT_T0);
outb(TIMER0_VALUE >> 8, PIT_BASE + PIT_T0);
outb(PIT_CMD_CTR2 | PIT_CMD_BOTH | PIT_CMD_MODE3,
PIT_BASE + PIT_COMMAND);
outb(TIMER2_VALUE & 0xff, PIT_BASE + PIT_T2);
outb(TIMER2_VALUE >> 8, PIT_BASE + PIT_T2);
irq_install_handler(0, timer_isr, NULL);
unmask_irq(0);
timer_init_done = 1;
return 0;
}
static u16 read_pit(void)
{
u8 low;
outb(PIT_CMD_LATCH, PIT_BASE + PIT_COMMAND);
low = inb(PIT_BASE + PIT_T0);
return (inb(PIT_BASE + PIT_T0) << 8) | low;
}
/* this is not very exact */
void __udelay(unsigned long usec)
{
int counter;
int wraps;
if (timer_init_done) {
counter = read_pit();
wraps = usec / 1000;
usec = usec % 1000;
usec *= 1194;
usec /= 1000;
usec += counter;
while (usec > 1194) {
usec -= 1194;
wraps++;
}
while (1) {
int new_count = read_pit();
if (((new_count < usec) && !wraps) || wraps < 0)
break;
if (new_count > counter)
wraps--;
counter = new_count;
}
}
}

6
arch/x86/lib/tsc_timer.c
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@ -98,6 +98,10 @@ void __udelay(unsigned long usec)
int timer_init(void)
{
/* Nothing to do here - the timer needs no init */
#ifdef CONFIG_SYS_PCAT_TIMER
/* Set up the PCAT timer if required */
pcat_timer_init();
#endif
return 0;
}

1
include/configs/coreboot.h
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@ -235,6 +235,7 @@
#define CONFIG_SYS_X86_TSC_TIMER
#define CONFIG_SYS_PCAT_INTERRUPTS
#define CONFIG_SYS_PCAT_TIMER
#define CONFIG_SYS_NUM_IRQS 16
/*-----------------------------------------------------------------------