SMDK2410: various cleanup/code style fixes
Signed-off-by: David Müller <d.mueller@elsoft.ch> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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Minkyu Kang
parent
a5ec7f6494
commit
d0b375f647
@@ -3,7 +3,7 @@
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* (C) Copyright 2002, 2010
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* David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
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*
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* See file CREDITS for list of people who contributed to this
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@@ -27,6 +27,7 @@
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#include <common.h>
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#include <netdev.h>
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#include <asm/io.h>
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#include <asm/arch/s3c24x0_cpu.h>
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DECLARE_GLOBAL_DATA_PTR;
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@@ -55,7 +56,7 @@ DECLARE_GLOBAL_DATA_PTR;
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#define U_M_SDIV 0x2
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#endif
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static inline void delay (unsigned long loops)
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static inline void pll_delay(unsigned long loops)
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{
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__asm__ volatile ("1:\n"
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"subs %0, %1, #1\n"
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@@ -66,44 +67,51 @@ static inline void delay (unsigned long loops)
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* Miscellaneous platform dependent initialisations
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*/
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int board_init (void)
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int board_early_init_f(void)
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{
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struct s3c24x0_clock_power * const clk_power =
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s3c24x0_get_base_clock_power();
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struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
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/* to reduce PLL lock time, adjust the LOCKTIME register */
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clk_power->locktime = 0xFFFFFF;
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writel(0xFFFFFF, &clk_power->locktime);
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/* configure MPLL */
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clk_power->mpllcon = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
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writel((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV,
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&clk_power->mpllcon);
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/* some delay between MPLL and UPLL */
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delay (4000);
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pll_delay(4000);
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/* configure UPLL */
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clk_power->upllcon = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
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writel((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV,
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&clk_power->upllcon);
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/* some delay between MPLL and UPLL */
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delay (8000);
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pll_delay(8000);
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/* set up the I/O ports */
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gpio->gpacon = 0x007FFFFF;
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gpio->gpbcon = 0x00044555;
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gpio->gpbup = 0x000007FF;
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gpio->gpccon = 0xAAAAAAAA;
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gpio->gpcup = 0x0000FFFF;
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gpio->gpdcon = 0xAAAAAAAA;
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gpio->gpdup = 0x0000FFFF;
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gpio->gpecon = 0xAAAAAAAA;
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gpio->gpeup = 0x0000FFFF;
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gpio->gpfcon = 0x000055AA;
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gpio->gpfup = 0x000000FF;
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gpio->gpgcon = 0xFF95FFBA;
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gpio->gpgup = 0x0000FFFF;
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gpio->gphcon = 0x002AFAAA;
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gpio->gphup = 0x000007FF;
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writel(0x007FFFFF, &gpio->gpacon);
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writel(0x00044555, &gpio->gpbcon);
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writel(0x000007FF, &gpio->gpbup);
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writel(0xAAAAAAAA, &gpio->gpccon);
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writel(0x0000FFFF, &gpio->gpcup);
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writel(0xAAAAAAAA, &gpio->gpdcon);
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writel(0x0000FFFF, &gpio->gpdup);
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writel(0xAAAAAAAA, &gpio->gpecon);
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writel(0x0000FFFF, &gpio->gpeup);
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writel(0x000055AA, &gpio->gpfcon);
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writel(0x000000FF, &gpio->gpfup);
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writel(0xFF95FFBA, &gpio->gpgcon);
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writel(0x0000FFFF, &gpio->gpgup);
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writel(0x002AFAAA, &gpio->gphcon);
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writel(0x000007FF, &gpio->gphup);
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return 0;
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}
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int board_init(void)
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{
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/* arch number of SMDK2410-Board */
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gd->bd->bi_arch_number = MACH_TYPE_SMDK2410;
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@@ -116,11 +124,10 @@ int board_init (void)
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return 0;
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}
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int dram_init (void)
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int dram_init(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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/* dram_init must store complete ramsize in gd->ram_size */
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gd->ram_size = PHYS_SDRAM_1_SIZE;
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return 0;
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}
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