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board/BuR/kwb: switch to board HW-Rev3

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The board has been redesigned, therefore we need from now other I/O Pins to
mux and handle.

Older boards aren't supported from now anymore.

Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
This commit is contained in:
Hannes Petermaier 2015-02-03 13:22:39 +01:00 committed by Tom Rini
parent 2a292a8df4
commit cf630f289f
3 changed files with 91 additions and 65 deletions
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96
board/BuR/kwb/board.c
View File

@ -26,14 +26,13 @@
#include <i2c.h> #include <i2c.h>
#include <power/tps65217.h> #include <power/tps65217.h>
#include "../common/bur_common.h" #include "../common/bur_common.h"
#include <lcd.h>
/* -------------------------------------------------------------------------*/ /* -------------------------------------------------------------------------*/
/* -- defines for used GPIO Hardware -- */ /* -- defines for used GPIO Hardware -- */
#define KEY (0+4) #define ESC_KEY (0+19)
#define LCD_PWR (0+5) #define LCD_PWR (0+5)
#define PUSH_KEY (0+31) #define PUSH_KEY (0+31)
#define USB2SD_NRST (32+29)
#define USB2SD_PWR (96+13)
/* -------------------------------------------------------------------------*/ /* -------------------------------------------------------------------------*/
/* -- PSOC Resetcontroller Register defines -- */ /* -- PSOC Resetcontroller Register defines -- */
@ -46,6 +45,7 @@
/* -- defines for RSTCTRL_CTRLREG -- */ /* -- defines for RSTCTRL_CTRLREG -- */
#define RSTCTRL_FORCE_PWR_NEN 0x0404 #define RSTCTRL_FORCE_PWR_NEN 0x0404
#define RSTCTRL_CAN_STB 0x4040
#if defined(CONFIG_SPL_BUILD) #if defined(CONFIG_SPL_BUILD)
/* TODO: check ram-timing ! */ /* TODO: check ram-timing ! */
@ -107,10 +107,13 @@ void am33xx_spl_board_init(void)
&cmper->epwmss0clkctrl, &cmper->epwmss0clkctrl,
&cmper->epwmss1clkctrl, &cmper->epwmss1clkctrl,
&cmper->epwmss2clkctrl, &cmper->epwmss2clkctrl,
&cmper->lcdclkctrl,
&cmper->lcdcclkstctrl,
0 0
}; };
do_enable_clocks(clk_domains, clk_modules_kwbspecific, 1); do_enable_clocks(clk_domains, clk_modules_kwbspecific, 1);
/* setup LCD-Pixel Clock */
writel(0x2, CM_DPLL + 0x34);
/* power-OFF LCD-Display */ /* power-OFF LCD-Display */
gpio_direction_output(LCD_PWR, 0); gpio_direction_output(LCD_PWR, 0);
@ -121,7 +124,7 @@ void am33xx_spl_board_init(void)
/* power-ON 3V3 via Resetcontroller */ /* power-ON 3V3 via Resetcontroller */
oldspeed = i2c_get_bus_speed(); oldspeed = i2c_get_bus_speed();
if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) { if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) {
buf = RSTCTRL_FORCE_PWR_NEN; buf = RSTCTRL_FORCE_PWR_NEN | RSTCTRL_CAN_STB;
i2c_write(RSTCTRL_ADDR, RSTCTRL_CTRLREG, 1, i2c_write(RSTCTRL_ADDR, RSTCTRL_CTRLREG, 1,
(uint8_t *)&buf, sizeof(buf)); (uint8_t *)&buf, sizeof(buf));
i2c_set_bus_speed(oldspeed); i2c_set_bus_speed(oldspeed);
@ -129,15 +132,6 @@ void am33xx_spl_board_init(void)
puts("ERROR: i2c_set_bus_speed failed! (turn on PWR_nEN)\n"); puts("ERROR: i2c_set_bus_speed failed! (turn on PWR_nEN)\n");
} }
#if defined(CONFIG_AM335X_USB0)
/* power on USB2SD Controller */
gpio_direction_output(USB2SD_PWR, 1);
mdelay(1);
/* give a reset Pulse to USB2SD Controller */
gpio_direction_output(USB2SD_NRST, 0);
mdelay(1);
gpio_set_value(USB2SD_NRST, 1);
#endif
pmicsetup(0); pmicsetup(0);
} }
@ -166,7 +160,6 @@ int board_init(void)
#ifdef CONFIG_BOARD_LATE_INIT #ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void) int board_late_init(void)
{ {
const unsigned int ton = 250;
const unsigned int toff = 1000; const unsigned int toff = 1000;
unsigned int cnt = 3; unsigned int cnt = 3;
unsigned short buf = 0xAAAA; unsigned short buf = 0xAAAA;
@ -175,50 +168,77 @@ int board_late_init(void)
tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
TPS65217_WLEDCTRL2, 0x32, 0xFF); /* 50% dimlevel */ TPS65217_WLEDCTRL2, 0x32, 0xFF); /* 50% dimlevel */
if (gpio_get_value(KEY)) { if (gpio_get_value(ESC_KEY)) {
do { do {
/* turn on light */ lcd_position_cursor(1, 8);
tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, switch (cnt) {
TPS65217_WLEDCTRL1, 0x09, 0xFF); case 3:
mdelay(ton); lcd_puts(
/* turn off light */ "release ESC-KEY to enter SERVICE-mode.");
tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, break;
TPS65217_WLEDCTRL1, 0x01, 0xFF); case 2:
lcd_puts(
"release ESC-KEY to enter DIAGNOSE-mode.");
break;
case 1:
lcd_puts(
"release ESC-KEY to enter BOOT-mode. ");
break;
}
mdelay(toff); mdelay(toff);
cnt--; cnt--;
if (!gpio_get_value(KEY) && if (!gpio_get_value(ESC_KEY) &&
gpio_get_value(PUSH_KEY) && 1 == cnt) { gpio_get_value(PUSH_KEY) && 2 == cnt) {
puts("updating from USB ...\n"); lcd_position_cursor(1, 8);
setenv("bootcmd", "run usbupdate"); lcd_puts(
"switching to network-console ... ");
setenv("bootcmd", "run netconsole");
cnt = 4;
break; break;
} else if (!gpio_get_value(KEY)) { } else if (!gpio_get_value(ESC_KEY) &&
gpio_get_value(PUSH_KEY) && 1 == cnt) {
lcd_position_cursor(1, 8);
lcd_puts(
"updating U-BOOT from USB ... ");
setenv("bootcmd", "run usbupdate");
cnt = 4;
break;
} else if ((!gpio_get_value(ESC_KEY) &&
gpio_get_value(PUSH_KEY) && cnt == 0) ||
(gpio_get_value(ESC_KEY) &&
gpio_get_value(PUSH_KEY) && cnt == 0)) {
lcd_position_cursor(1, 8);
lcd_puts(
"starting script from network ... ");
setenv("bootcmd", "run netscript");
cnt = 4;
break;
} else if (!gpio_get_value(ESC_KEY)) {
break; break;
} }
} while (cnt); } while (cnt);
} }
lcd_position_cursor(1, 8);
switch (cnt) { switch (cnt) {
case 0: case 0:
puts("3 blinks ... entering BOOT mode.\n"); lcd_puts("entering BOOT-mode. ");
setenv("bootcmd", "run defaultAR");
buf = 0x0000; buf = 0x0000;
break; break;
case 1: case 1:
puts("2 blinks ... entering DIAGNOSE mode.\n"); lcd_puts("entering DIAGNOSE-mode. ");
buf = 0x0F0F; buf = 0x0F0F;
break; break;
case 2: case 2:
puts("1 blinks ... entering SERVICE mode.\n"); lcd_puts("entering SERVICE mode. ");
buf = 0xB4B4; buf = 0xB4B4;
break; break;
case 3: case 3:
puts("0 blinks ... entering RUN mode.\n"); lcd_puts("loading OS... ");
buf = 0x0404; buf = 0x0404;
break; break;
} }
mdelay(ton);
/* turn on light */
tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
TPS65217_WLEDCTRL1, 0x09, 0xFF);
/* write bootinfo into scratchregister of resetcontroller */ /* write bootinfo into scratchregister of resetcontroller */
oldspeed = i2c_get_bus_speed(); oldspeed = i2c_get_bus_speed();
if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) { if (i2c_set_bus_speed(CONFIG_SYS_OMAP24_I2C_SPEED_PSOC) >= 0) {

51
board/BuR/kwb/mux.c
View File

@ -16,23 +16,17 @@
#include <asm/io.h> #include <asm/io.h>
#include <i2c.h> #include <i2c.h>
static struct module_pin_mux usb0_pin_mux[] = { static struct module_pin_mux spi0_pin_mux[] = {
{OFFSET(usb0_id), (MODE(0) | RXACTIVE)},
/* USB0 DrvBus Receiver disable (from romcode 0x20) */
{OFFSET(usb0_drvvbus), (MODE(0))},
/* USB1 DrvBus as GPIO due to HW-Workaround */
{OFFSET(usb1_drvvbus), (MODE(7))},
{-1},
};
static struct module_pin_mux spi1_pin_mux[] = {
/* SPI1_SCLK */ /* SPI1_SCLK */
{OFFSET(mcasp0_aclkx), MODE(3) | PULLUDEN | RXACTIVE}, {OFFSET(spi0_sclk), MODE(0) | PULLUDEN | RXACTIVE},
/* SPI1_D0 */ /* SPI1_D0 */
{OFFSET(mcasp0_fsx), MODE(3) | PULLUDEN | RXACTIVE}, {OFFSET(spi0_d0), MODE(0) | PULLUDEN | RXACTIVE},
/* SPI1_D1 */ /* SPI1_D1 */
{OFFSET(mcasp0_axr0), MODE(3) | PULLUDEN | RXACTIVE}, {OFFSET(spi0_d1), MODE(0) | PULLUDEN | RXACTIVE},
/* SPI1_CS0 */ /* SPI1_CS0 */
{OFFSET(mcasp0_ahclkr), MODE(3) | PULLUDEN | PULLUP_EN | RXACTIVE}, {OFFSET(spi0_cs0), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE},
/* SPI1_CS1 */
{OFFSET(spi0_cs1), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE},
{-1}, {-1},
}; };
@ -53,30 +47,34 @@ static struct module_pin_mux dcan1_pin_mux[] = {
}; };
static struct module_pin_mux gpios[] = { static struct module_pin_mux gpios[] = {
/* GPIO0_29 (RMII1_REFCLK) - eMMC nRST */
{OFFSET(rmii1_refclk), (MODE(7) | PULLUDDIS)},
/* GPIO0_4 (SPI D1) - TA602 */
{OFFSET(spi0_d1), (MODE(7) | PULLUDDIS | RXACTIVE)},
/* GPIO0_5 (SPI CS0) - DISPLAY_ON_OFF */
{OFFSET(spi0_cs0), (MODE(7) | PULLUDDIS)},
/* GPIO0_7 (PWW0 OUT) - CAN TERM */ /* GPIO0_7 (PWW0 OUT) - CAN TERM */
{OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDDIS | RXACTIVE)}, {OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDDIS | RXACTIVE)},
/* GPIO0_19 (DMA_INTR0) - CLKOUT SYS */ /* GPIO0_19 (DMA_INTR0) - TA602 */
{OFFSET(xdma_event_intr0), (MODE(7) | RXACTIVE)}, {OFFSET(xdma_event_intr0), (MODE(7) | PULLUDDIS | RXACTIVE)},
/* GPIO0_20 (DMA_INTR1) - SPI1 nCS1 */ /* GPIO0_20 (DMA_INTR1) - SPI0 nCS1 */
{OFFSET(xdma_event_intr1), (MODE(7) | PULLUDEN | PULLUP_EN)}, {OFFSET(xdma_event_intr1), (MODE(7) | PULLUDDIS | RXACTIVE)},
/* GPIO0_29 (RMII1_REFCLK) - eMMC nRST */
{OFFSET(rmii1_refclk), (MODE(7) | PULLUDDIS)},
/* GPIO0_30 (GPMC_WAIT0) - TA601 */ /* GPIO0_30 (GPMC_WAIT0) - TA601 */
{OFFSET(gpmc_wait0), (MODE(7) | PULLUDDIS | RXACTIVE)}, {OFFSET(gpmc_wait0), (MODE(7) | PULLUDDIS | RXACTIVE)},
/* GPIO0_31 (GPMC_nWP) - SW601 PushButton */ /* GPIO0_31 (GPMC_nWP) - SW601 PushButton */
{OFFSET(gpmc_wpn), (MODE(7) | PULLUDDIS | RXACTIVE)}, {OFFSET(gpmc_wpn), (MODE(7) | PULLUDDIS | RXACTIVE)},
/* GPIO1_28 (GPMC_nWE) - FRAM_nWP */ /* GPIO1_28 (GPMC_nWE) - FRAM_nWP */
{OFFSET(gpmc_be1n), (MODE(7) | PULLUDDIS)}, {OFFSET(gpmc_be1n), (MODE(7) | PULLUDDIS)},
/* GPIO1_29 (gpmc_csn0) - MMC nRST */
{OFFSET(gpmc_csn0), (MODE(7) | PULLUDDIS)},
/* GPIO2_0 (GPMC_nCS3) - VBAT_OK */ /* GPIO2_0 (GPMC_nCS3) - VBAT_OK */
{OFFSET(gpmc_csn3), (MODE(7) | PULLUDDIS | RXACTIVE) }, {OFFSET(gpmc_csn3), (MODE(7) | PULLUDDIS | RXACTIVE) },
/* GPIO2_2 (GPMC_nADV_ALE) - DCOK */ /* GPIO2_2 (GPMC_nADV_ALE) - DCOK */
{OFFSET(gpmc_advn_ale), (MODE(7) | PULLUDDIS | RXACTIVE)}, {OFFSET(gpmc_advn_ale), (MODE(7) | PULLUDDIS | RXACTIVE)},
/* GPIO2_4 (GPMC_nWE) - TST_BAST */ /* GPIO2_4 (GPMC_nWE) - TST_BAST */
{OFFSET(gpmc_wen), (MODE(7) | PULLUDDIS)}, {OFFSET(gpmc_wen), (MODE(7) | PULLUDDIS)},
/* GPIO2_5 (gpmc_be0n_cle) - DISPLAY_ON_OFF */
{OFFSET(gpmc_be0n_cle), (MODE(7) | PULLUDDIS)},
/* GPIO3_16 (mcasp0_axr0) - ETH-LED green */
{OFFSET(mcasp0_axr0), (MODE(7) | PULLUDDIS | RXACTIVE)},
/* GPIO3_17 (mcasp0_ahclkr) - CAN_STB */
{OFFSET(mcasp0_ahclkr), (MODE(7) | PULLUDDIS | RXACTIVE)},
/* GPIO3_18 (MCASP0_ACLKR) - SW601 CNTup, mapped to Counter eQEB0A_in */ /* GPIO3_18 (MCASP0_ACLKR) - SW601 CNTup, mapped to Counter eQEB0A_in */
{OFFSET(mcasp0_aclkr), (MODE(1) | PULLUDDIS | RXACTIVE)}, {OFFSET(mcasp0_aclkr), (MODE(1) | PULLUDDIS | RXACTIVE)},
/* GPIO3_19 (MCASP0_FSR) - SW601 CNTdown, mapped to Counter eQEB0B_in */ /* GPIO3_19 (MCASP0_FSR) - SW601 CNTdown, mapped to Counter eQEB0B_in */
@ -126,6 +124,10 @@ static struct module_pin_mux mii1_pin_mux[] = {
}; };
static struct module_pin_mux mmc1_pin_mux[] = { static struct module_pin_mux mmc1_pin_mux[] = {
{OFFSET(gpmc_ad7), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT7 */
{OFFSET(gpmc_ad6), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT6 */
{OFFSET(gpmc_ad5), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT5 */
{OFFSET(gpmc_ad4), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT4 */
{OFFSET(gpmc_ad3), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT3 */ {OFFSET(gpmc_ad3), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT3 */
{OFFSET(gpmc_ad2), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT2 */ {OFFSET(gpmc_ad2), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT2 */
{OFFSET(gpmc_ad1), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT1 */ {OFFSET(gpmc_ad1), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT1 */
@ -187,8 +189,7 @@ void enable_board_pin_mux(void)
{ {
configure_module_pin_mux(i2c0_pin_mux); configure_module_pin_mux(i2c0_pin_mux);
configure_module_pin_mux(mii1_pin_mux); configure_module_pin_mux(mii1_pin_mux);
configure_module_pin_mux(usb0_pin_mux); configure_module_pin_mux(spi0_pin_mux);
configure_module_pin_mux(spi1_pin_mux);
configure_module_pin_mux(dcan0_pin_mux); configure_module_pin_mux(dcan0_pin_mux);
configure_module_pin_mux(dcan1_pin_mux); configure_module_pin_mux(dcan1_pin_mux);
configure_module_pin_mux(mmc1_pin_mux); configure_module_pin_mux(mmc1_pin_mux);

9
include/configs/kwb.h
View File

@ -14,6 +14,11 @@
#include <configs/bur_am335x_common.h> #include <configs/bur_am335x_common.h>
/* ------------------------------------------------------------------------- */ /* ------------------------------------------------------------------------- */
#define CONFIG_AM335X_LCD
#define CONFIG_LCD
#define CONFIG_LCD_NOSTDOUT
#define CONFIG_SYS_WHITE_ON_BLACK
#define LCD_BPP LCD_COLOR32
/* Clock Defines */ /* Clock Defines */
#define V_OSCK 26000000 /* Clock output from T2 */ #define V_OSCK 26000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK) #define V_SCLK (V_OSCK)
@ -87,8 +92,6 @@
#undef CONFIG_BOOTM_NETBSD #undef CONFIG_BOOTM_NETBSD
#undef CONFIG_BOOTM_PLAN9 #undef CONFIG_BOOTM_PLAN9
#undef CONFIG_BOOTM_RTEMS #undef CONFIG_BOOTM_RTEMS
#undef CONFIG_GZIP
#undef CONFIG_ZLIB
/* USB configuration */ /* USB configuration */
#define CONFIG_USB_MUSB_DSPS #define CONFIG_USB_MUSB_DSPS
@ -100,6 +103,8 @@
#define CONFIG_MUSB_HOST #define CONFIG_MUSB_HOST
#define CONFIG_AM335X_USB0 #define CONFIG_AM335X_USB0
#define CONFIG_AM335X_USB0_MODE MUSB_HOST #define CONFIG_AM335X_USB0_MODE MUSB_HOST
#define CONFIG_AM335X_USB1
#define CONFIG_AM335X_USB1_MODE MUSB_HOST
#ifdef CONFIG_MUSB_HOST #ifdef CONFIG_MUSB_HOST
#define CONFIG_CMD_USB #define CONFIG_CMD_USB