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pl01x: Convert CONFIG_PL01X_SERIAL to Kconfig

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We want to use Kconfig logic to depend on whether pl01x devices
are built in, so let's convert their inclusion selection to Kconfig.

This round goes to pl01x.

Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
Alexander Graf 2018-01-25 12:05:52 +01:00 committed by Tom Rini
parent d10fc50f78
commit cf2c7784bd
11 changed files with 17 additions and 18 deletions
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11
arch/arm/Kconfig
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@ -493,6 +493,7 @@ config TARGET_STV0991
select DM_SPI
select DM_SPI_FLASH
select SPI_FLASH
select PL01X_SERIAL
config TARGET_X600
bool "Support x600"
@ -548,6 +549,7 @@ config ARCH_BCM283X
select DM_SERIAL
select DM_GPIO
select OF_CONTROL
select PL01X_SERIAL
imply FAT_WRITE
config TARGET_VEXPRESS_CA15_TC2
@ -630,6 +632,7 @@ config ARCH_INTEGRATOR
bool "ARM Ltd. Integrator family"
select DM
select DM_SERIAL
select PL01X_SERIAL
config ARCH_KEYSTONE
bool "TI Keystone"
@ -697,6 +700,7 @@ config ARCH_QEMU
select DM
select DM_SERIAL
select OF_CONTROL
select PL01X_SERIAL
config ARCH_RMOBILE
bool "Renesas ARM SoCs"
@ -836,15 +840,18 @@ config TEGRA
config TARGET_VEXPRESS64_AEMV8A
bool "Support vexpress_aemv8a"
select ARM64
select PL01X_SERIAL
config TARGET_VEXPRESS64_BASE_FVP
bool "Support Versatile Express ARMv8a FVP BASE model"
select ARM64
select SEMIHOSTING
select PL01X_SERIAL
config TARGET_VEXPRESS64_BASE_FVP_DRAM
bool "Support Versatile Express ARMv8a FVP BASE model booting from DRAM"
select ARM64
select PL01X_SERIAL
help
This target is derived from TARGET_VEXPRESS64_BASE_FVP and over-rides
the default config to allow the user to load the images directly into
@ -854,6 +861,7 @@ config TARGET_VEXPRESS64_BASE_FVP_DRAM
config TARGET_VEXPRESS64_JUNO
bool "Support Versatile Express Juno Development Platform"
select ARM64
select PL01X_SERIAL
config TARGET_LS2080A_EMU
bool "Support ls2080a_emu"
@ -946,6 +954,7 @@ config TARGET_HIKEY
select DM_GPIO
select DM_SERIAL
select OF_CONTROL
select PL01X_SERIAL
help
Support for HiKey 96boards platform. It features a HI6220
SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
@ -957,6 +966,7 @@ config TARGET_POPLAR
select OF_CONTROL
select DM_SERIAL
select DM_USB
select PL01X_SERIAL
help
Support for Poplar 96boards EE platform. It features a HI3798cv200
SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
@ -1212,6 +1222,7 @@ config TARGET_THUNDERX_88XX
select ARM64
select OF_CONTROL
select SYS_CACHE_SHIFT_7
select PL01X_SERIAL
config ARCH_ASPEED
bool "Support Aspeed SoCs"

6
drivers/serial/Kconfig
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@ -459,6 +459,12 @@ config PL011_SERIAL
help
Select this to enable a UART for platforms using PL011.
config PL01X_SERIAL
bool "ARM PL010 and PL011 driver"
depends on DM_SERIAL
help
Select this to enable a UART for platforms using PL010 or PL011.
config ROCKCHIP_SERIAL
bool "Rockchip on-chip UART support"
depends on DM_SERIAL && SPL_OF_PLATDATA

3
include/configs/hikey.h
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@ -50,9 +50,6 @@
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + SZ_8M)
/* Serial port PL010/PL011 through the device model */
#define CONFIG_PL01X_SERIAL
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_DWC2_REG_ADDR 0xF72C0000
/*#define CONFIG_DWC2_DFLT_SPEED_FULL*/

2
include/configs/integrator-common.h
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@ -15,8 +15,6 @@
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */
/* Serial port PL010/PL011 through the device model */
#define CONFIG_PL01X_SERIAL
#define CONFIG_CONS_INDEX 0
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */

3
include/configs/poplar.h
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@ -26,9 +26,6 @@
/* ATF bl33.bin load address (must match) */
#define CONFIG_SYS_TEXT_BASE 0x37000000
/* PL010/PL011 */
#define CONFIG_PL01X_SERIAL
/* USB configuration */
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2

3
include/configs/qemu-arm.h
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@ -20,9 +20,6 @@
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_2M)
#define CONFIG_SYS_MALLOC_LEN SZ_16M
/* QEMU's PL011 serial port is detected via FDT using the device model */
#define CONFIG_PL01X_SERIAL
/* QEMU implements a 62.5MHz architected timer */
/* FIXME: can we rely on CNTFREQ instead of hardcoding this fact here? */
#define CONFIG_SYS_ARCH_TIMER

1
include/configs/rpi.h
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@ -77,7 +77,6 @@
/* Console UART, can be configured dynamically in config.txt */
#define CONFIG_BCM283X_MU_SERIAL
#define CONFIG_PL01X_SERIAL
/* Console configuration */
#define CONFIG_SYS_CBSIZE 1024

3
include/configs/stv0991.h
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@ -25,9 +25,6 @@
(PHYS_SDRAM_1_SIZE - CONFIG_ENV_SIZE)
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024)
/* serial port (PL011) configuration */
#define CONFIG_PL01X_SERIAL
/* user interface */
#define CONFIG_SYS_CBSIZE 1024

1
include/configs/thunderx_88xx.h
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@ -35,7 +35,6 @@
/* PL011 Serial Configuration */
#define CONFIG_PL01X_SERIAL
#define CONFIG_PL011_CLOCK 24000000
#define CONFIG_CONS_INDEX 1

1
include/configs/vexpress_aemv8a.h
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@ -110,7 +110,6 @@
/* PL011 Serial Configuration */
#define CONFIG_CONS_INDEX 0
#define CONFIG_PL01X_SERIAL
#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
#define CONFIG_PL011_CLOCK 7273800
#else

1
scripts/config_whitelist.txt
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@ -1619,7 +1619,6 @@ CONFIG_PIXIS_BRDCFG1_TDM
CONFIG_PIXIS_SGMII_CMD
CONFIG_PL011_CLOCK
CONFIG_PL011_SERIAL_RLCR
CONFIG_PL01X_SERIAL
CONFIG_PL01x_PORTS
CONFIG_PLATFORM_ENV_SETTINGS
CONFIG_PLATINUM_BOARD