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ARM: uniphier: refactor outer cache operation slightly

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Improve readability without changing the behavior.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Masahiro Yamada 2016-01-17 10:13:16 +09:00
parent 25d4eb8091
commit cefca48ca7
1 changed files with 4 additions and 2 deletions
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6
arch/arm/mach-uniphier/cache_uniphier.c
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@ -67,7 +67,9 @@ static void uniphier_cache_maint_range(u32 start, u32 end, u32 operation)
*/
start = start & ~(SSC_LINE_SIZE - 1);
if (start == 0 && end >= (u32)(-SSC_LINE_SIZE)) {
size = end - start;
if (unlikely(size >= (u32)(-SSC_LINE_SIZE))) {
/* this means cache operation for all range */
uniphier_cache_maint_all(operation);
return;
@ -77,7 +79,7 @@ static void uniphier_cache_maint_range(u32 start, u32 end, u32 operation)
* If end address is not aligned to cache-line,
* do cache operation for the last cache-line
*/
size = (end - start + SSC_LINE_SIZE - 1) & ~(SSC_LINE_SIZE - 1);
size = ALIGN(size, SSC_LINE_SIZE);
while (size) {
u32 chunk_size = size > SSC_RANGE_OP_MAX_SIZE ?