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x86: coreboot: Add generic coreboot payload support

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Currently building U-Boot as the coreboot payload requires user
to change the build configuration for a specific board during
menuconfig process. This uses the board's native device tree
to configure the hardware. For example, the device tree provides
PCI address range for the PCI host controller and U-Boot will
re-program all PCI devices' BAR to be within this range. In order
to make sure we don't mess up the hardware, we should guarantee
the range matches what coreboot programs the chipset.

But we really should make the coreboot payload support easier.
Just like EFI payload, we can create a generic coreboot payload
for all x86 boards as well. The payload is configured to include
as many generic drivers as possible. All stuff that touches low
level initialization are not allowed as such is the coreboot's
responsibility. Platform specific drivers (like gpio, spi, etc)
are not included.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
This commit is contained in:
Bin Meng
2018-08-10 02:39:33 -07:00
parent 6ace36e19a
commit ceeee8f7b5
11 changed files with 116 additions and 67 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
arch/x86/cpu/coreboot/Kconfig
View File

@@ -3,26 +3,26 @@ if TARGET_COREBOOT
config SYS_COREBOOT
bool
default y
imply SYS_NS16550
imply SCSI
imply SCSI_AHCI
imply AHCI_PCI
imply E1000
imply ICH_SPI
imply MMC
imply MMC_PCI
imply MMC_SDHCI
imply MMC_SDHCI_SDMA
imply SCSI
imply SCSI_AHCI
imply SPI_FLASH
imply SYS_NS16550
imply USB
imply USB_EHCI_HCD
imply USB_XHCI_HCD
imply USB_STORAGE
imply USB_KEYBOARD
imply VIDEO_COREBOOT
imply E1000
imply ETH_DESIGNWARE
imply PCH_GBE
imply RTL8169
imply CMD_CBFS
imply FS_CBFS
config CBMEM_CONSOLE
bool
default y
imply CBMEM_CONSOLE
endif

9
arch/x86/cpu/coreboot/coreboot.c
View File

@@ -7,6 +7,7 @@
#include <common.h>
#include <fdtdec.h>
#include <usb.h>
#include <asm/io.h>
#include <asm/msr.h>
#include <asm/mtrr.h>
@@ -75,12 +76,10 @@ int last_stage_init(void)
if (gd->flags & GD_FLG_COLD_BOOT)
timestamp_add_to_bootstage();
/* start usb so that usb keyboard can be used as input device */
usb_init();
board_final_cleanup();
return 0;
}
int misc_init_r(void)
{
return 0;
}

1
arch/x86/dts/Makefile
View File

@@ -6,6 +6,7 @@ dtb-y += bayleybay.dtb \
chromebox_panther.dtb \
chromebook_samus.dtb \
conga-qeval20-qa3-e3845.dtb \
coreboot.dtb \
cougarcanyon2.dtb \
crownbay.dtb \
dfi-bt700-q7x-151.dtb \

41
arch/x86/dts/coreboot.dts Normal file
View File

@@ -0,0 +1,41 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
*
* Generic coreboot payload device tree for x86 targets
*/
/dts-v1/;
/include/ "skeleton.dtsi"
/include/ "serial.dtsi"
/include/ "keyboard.dtsi"
/include/ "reset.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
/ {
model = "coreboot x86 payload";
compatible = "coreboot,x86-payload";
aliases {
serial0 = &serial;
};
config {
silent_console = <0>;
};
chosen {
stdout-path = "/serial";
};
pci {
compatible = "pci-x86";
u-boot,dm-pre-reloc;
};
coreboot-fb {
compatible = "coreboot-fb";
};
};