Merge tag 'u-boot-amlogic-20190423' of git://git.denx.de/u-boot-amlogic
- Add support for Amlogic p200 & p201 Reference Designs - Add Amlogic SoC information display - Add support for the Libretech-AC AML-S805X-AC board - Add Amlogic AXG reset compatible - Add I2C support for Amlogic AXG - Fix AXG PIN and BANK pinctrl definitions - Fix regmap_read_poll_timeout warning about sandbox_timer_add_offset - Add initial support for Amlogic G12A SoC and U200 board - Enable PHY_REALTEK for selected boards - Fix Khadas VIM2 README
This commit is contained in:
Tom Rini
@@ -101,6 +101,7 @@ config CLK_STM32MP1
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source "drivers/clk/at91/Kconfig"
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source "drivers/clk/exynos/Kconfig"
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source "drivers/clk/imx/Kconfig"
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source "drivers/clk/meson/Kconfig"
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source "drivers/clk/mvebu/Kconfig"
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source "drivers/clk/owl/Kconfig"
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source "drivers/clk/renesas/Kconfig"
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@@ -12,7 +12,7 @@ obj-y += imx/
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obj-y += tegra/
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obj-$(CONFIG_ARCH_ASPEED) += aspeed/
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obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/
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obj-$(CONFIG_ARCH_MESON) += clk_meson.o clk_meson_axg.o
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obj-$(CONFIG_ARCH_MESON) += meson/
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obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
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obj-$(CONFIG_ARCH_SOCFPGA) += altera/
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obj-$(CONFIG_CLK_AT91) += at91/
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23
drivers/clk/meson/Kconfig
Normal file
23
drivers/clk/meson/Kconfig
Normal file
@@ -0,0 +1,23 @@
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config CLK_MESON_GX
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bool "Enable clock support for Amlogic GX"
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depends on CLK && ARCH_MESON
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default MESON_GX
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help
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Enable clock support for the Amlogic GX SoC family, such as
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the S905, S905X/D and S912.
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config CLK_MESON_AXG
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bool "Enable clock support for Amlogic AXG"
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depends on CLK && ARCH_MESON
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default MESON_AXG
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help
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Enable clock support for the Amlogic AXG SoC family, such as
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the A113X/D
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config CLK_MESON_G12A
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bool "Enable clock support for Amlogic G12A"
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depends on CLK && ARCH_MESON
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default MESON_G12A
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help
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Enable clock support for the Amlogic G12A SoC family, such as
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the S905X/D2
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9
drivers/clk/meson/Makefile
Normal file
9
drivers/clk/meson/Makefile
Normal file
@@ -0,0 +1,9 @@
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# SPDX-License-Identifier: GPL-2.0
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#
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# Copyright (c) 2019 Baylibre, SAS
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# Jerome Brunet <jbrunet@baylibre.com>
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obj-$(CONFIG_CLK_MESON_GX) += gxbb.o
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obj-$(CONFIG_CLK_MESON_AXG) += axg.o
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obj-$(CONFIG_CLK_MESON_G12A) += g12a.o
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315
drivers/clk/meson/g12a.c
Normal file
315
drivers/clk/meson/g12a.c
Normal file
@@ -0,0 +1,315 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2018 - Beniamino Galvani <b.galvani@gmail.com>
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* (C) Copyright 2018 - BayLibre, SAS
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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#include <common.h>
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#include <asm/arch/clock-g12a.h>
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#include <asm/io.h>
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#include <clk-uclass.h>
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#include <dm.h>
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#include <regmap.h>
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#include <syscon.h>
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#include <div64.h>
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#include <dt-bindings/clock/g12a-clkc.h>
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#include "clk_meson.h"
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#define XTAL_RATE 24000000
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struct meson_clk {
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struct regmap *map;
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};
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static ulong meson_clk_get_rate_by_id(struct clk *clk, unsigned long id);
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#define NUM_CLKS 178
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static struct meson_gate gates[NUM_CLKS] = {
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/* Everything Else (EE) domain gates */
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MESON_GATE(CLKID_SPICC0, HHI_GCLK_MPEG0, 8),
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MESON_GATE(CLKID_I2C, HHI_GCLK_MPEG0, 9),
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MESON_GATE(CLKID_UART0, HHI_GCLK_MPEG0, 13),
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MESON_GATE(CLKID_SPICC1, HHI_GCLK_MPEG0, 14),
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MESON_GATE(CLKID_SD_EMMC_B, HHI_GCLK_MPEG0, 25),
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MESON_GATE(CLKID_SD_EMMC_C, HHI_GCLK_MPEG0, 26),
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MESON_GATE(CLKID_ETH, HHI_GCLK_MPEG1, 3),
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MESON_GATE(CLKID_UART1, HHI_GCLK_MPEG1, 16),
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/* Peripheral Gates */
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MESON_GATE(CLKID_SD_EMMC_B_CLK0, HHI_SD_EMMC_CLK_CNTL, 23),
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MESON_GATE(CLKID_SD_EMMC_C_CLK0, HHI_NAND_CLK_CNTL, 7),
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};
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static int meson_set_gate(struct clk *clk, bool on)
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{
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struct meson_clk *priv = dev_get_priv(clk->dev);
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struct meson_gate *gate;
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if (clk->id >= ARRAY_SIZE(gates))
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return -ENOENT;
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gate = &gates[clk->id];
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if (gate->reg == 0)
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return 0;
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regmap_update_bits(priv->map, gate->reg,
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BIT(gate->bit), on ? BIT(gate->bit) : 0);
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return 0;
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}
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static int meson_clk_enable(struct clk *clk)
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{
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return meson_set_gate(clk, true);
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}
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static int meson_clk_disable(struct clk *clk)
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{
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return meson_set_gate(clk, false);
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}
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static unsigned long meson_clk81_get_rate(struct clk *clk)
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{
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struct meson_clk *priv = dev_get_priv(clk->dev);
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unsigned long parent_rate;
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uint reg;
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int parents[] = {
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-1,
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-1,
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CLKID_FCLK_DIV7,
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CLKID_MPLL1,
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CLKID_MPLL2,
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CLKID_FCLK_DIV4,
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CLKID_FCLK_DIV3,
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CLKID_FCLK_DIV5
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};
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/* mux */
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regmap_read(priv->map, HHI_MPEG_CLK_CNTL, ®);
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reg = (reg >> 12) & 7;
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switch (reg) {
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case 0:
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parent_rate = XTAL_RATE;
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break;
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case 1:
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return -ENOENT;
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default:
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parent_rate = meson_clk_get_rate_by_id(clk, parents[reg]);
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}
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/* divider */
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regmap_read(priv->map, HHI_MPEG_CLK_CNTL, ®);
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reg = reg & ((1 << 7) - 1);
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return parent_rate / reg;
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}
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static long mpll_rate_from_params(unsigned long parent_rate,
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unsigned long sdm,
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unsigned long n2)
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{
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unsigned long divisor = (SDM_DEN * n2) + sdm;
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if (n2 < N2_MIN)
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return -EINVAL;
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return DIV_ROUND_UP_ULL((u64)parent_rate * SDM_DEN, divisor);
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}
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static struct parm meson_mpll0_parm[2] = {
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{HHI_MPLL_CNTL1, 0, 14}, /* psdm */
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{HHI_MPLL_CNTL1, 20, 9}, /* pn2 */
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};
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static struct parm meson_mpll1_parm[2] = {
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{HHI_MPLL_CNTL3, 0, 14}, /* psdm */
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{HHI_MPLL_CNTL3, 20, 9}, /* pn2 */
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};
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static struct parm meson_mpll2_parm[2] = {
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{HHI_MPLL_CNTL5, 0, 14}, /* psdm */
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{HHI_MPLL_CNTL5, 20, 9}, /* pn2 */
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};
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/*
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* MultiPhase Locked Loops are outputs from a PLL with additional frequency
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* scaling capabilities. MPLL rates are calculated as:
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*
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* f(N2_integer, SDM_IN ) = 2.0G/(N2_integer + SDM_IN/16384)
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*/
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static ulong meson_mpll_get_rate(struct clk *clk, unsigned long id)
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{
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struct meson_clk *priv = dev_get_priv(clk->dev);
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struct parm *psdm, *pn2;
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unsigned long sdm, n2;
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unsigned long parent_rate;
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uint reg;
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switch (id) {
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case CLKID_MPLL0:
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psdm = &meson_mpll0_parm[0];
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pn2 = &meson_mpll0_parm[1];
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break;
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case CLKID_MPLL1:
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psdm = &meson_mpll1_parm[0];
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pn2 = &meson_mpll1_parm[1];
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break;
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case CLKID_MPLL2:
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psdm = &meson_mpll2_parm[0];
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pn2 = &meson_mpll2_parm[1];
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break;
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default:
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return -ENOENT;
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}
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parent_rate = meson_clk_get_rate_by_id(clk, CLKID_FIXED_PLL);
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if (IS_ERR_VALUE(parent_rate))
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return parent_rate;
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regmap_read(priv->map, psdm->reg_off, ®);
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sdm = PARM_GET(psdm->width, psdm->shift, reg);
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regmap_read(priv->map, pn2->reg_off, ®);
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n2 = PARM_GET(pn2->width, pn2->shift, reg);
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return mpll_rate_from_params(parent_rate, sdm, n2);
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}
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static struct parm meson_fixed_pll_parm[3] = {
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{HHI_FIX_PLL_CNTL0, 0, 8}, /* pm */
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{HHI_FIX_PLL_CNTL0, 10, 5}, /* pn */
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{HHI_FIX_PLL_CNTL0, 16, 2}, /* pod */
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};
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static struct parm meson_sys_pll_parm[3] = {
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{HHI_SYS_PLL_CNTL0, 0, 8}, /* pm */
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{HHI_SYS_PLL_CNTL0, 10, 5}, /* pn */
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{HHI_SYS_PLL_CNTL0, 16, 2}, /* pod */
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};
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static ulong meson_pll_get_rate(struct clk *clk, unsigned long id)
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{
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struct meson_clk *priv = dev_get_priv(clk->dev);
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struct parm *pm, *pn, *pod;
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unsigned long parent_rate_mhz = XTAL_RATE / 1000000;
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u16 n, m, od;
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uint reg;
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/*
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* FIXME: Between the unit conversion and the missing frac, we know
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* rate will be slightly off ...
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*/
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switch (id) {
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case CLKID_FIXED_PLL:
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pm = &meson_fixed_pll_parm[0];
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pn = &meson_fixed_pll_parm[1];
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pod = &meson_fixed_pll_parm[2];
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break;
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case CLKID_SYS_PLL:
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pm = &meson_sys_pll_parm[0];
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pn = &meson_sys_pll_parm[1];
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pod = &meson_sys_pll_parm[2];
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break;
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default:
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return -ENOENT;
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}
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regmap_read(priv->map, pn->reg_off, ®);
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n = PARM_GET(pn->width, pn->shift, reg);
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regmap_read(priv->map, pm->reg_off, ®);
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m = PARM_GET(pm->width, pm->shift, reg);
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regmap_read(priv->map, pod->reg_off, ®);
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od = PARM_GET(pod->width, pod->shift, reg);
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return ((parent_rate_mhz * m / n) >> od) * 1000000;
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}
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static ulong meson_clk_get_rate_by_id(struct clk *clk, unsigned long id)
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{
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ulong rate;
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switch (id) {
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case CLKID_FIXED_PLL:
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case CLKID_SYS_PLL:
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rate = meson_pll_get_rate(clk, id);
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break;
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case CLKID_FCLK_DIV2:
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rate = meson_pll_get_rate(clk, CLKID_FIXED_PLL) / 2;
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break;
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case CLKID_FCLK_DIV3:
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rate = meson_pll_get_rate(clk, CLKID_FIXED_PLL) / 3;
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break;
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case CLKID_FCLK_DIV4:
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rate = meson_pll_get_rate(clk, CLKID_FIXED_PLL) / 4;
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break;
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case CLKID_FCLK_DIV5:
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rate = meson_pll_get_rate(clk, CLKID_FIXED_PLL) / 5;
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break;
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case CLKID_FCLK_DIV7:
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rate = meson_pll_get_rate(clk, CLKID_FIXED_PLL) / 7;
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break;
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case CLKID_MPLL0:
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case CLKID_MPLL1:
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case CLKID_MPLL2:
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rate = meson_mpll_get_rate(clk, id);
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break;
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case CLKID_CLK81:
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rate = meson_clk81_get_rate(clk);
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break;
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default:
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if (gates[id].reg != 0) {
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/* a clock gate */
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rate = meson_clk81_get_rate(clk);
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break;
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}
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return -ENOENT;
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}
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debug("clock %lu has rate %lu\n", id, rate);
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return rate;
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}
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static ulong meson_clk_get_rate(struct clk *clk)
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{
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return meson_clk_get_rate_by_id(clk, clk->id);
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}
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|
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static int meson_clk_probe(struct udevice *dev)
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{
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struct meson_clk *priv = dev_get_priv(dev);
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priv->map = syscon_node_to_regmap(dev_get_parent(dev)->node);
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if (IS_ERR(priv->map))
|
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return PTR_ERR(priv->map);
|
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|
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debug("meson-clk-g12a: probed\n");
|
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|
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return 0;
|
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}
|
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|
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static struct clk_ops meson_clk_ops = {
|
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.disable = meson_clk_disable,
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.enable = meson_clk_enable,
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.get_rate = meson_clk_get_rate,
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};
|
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static const struct udevice_id meson_clk_ids[] = {
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{ .compatible = "amlogic,g12a-clkc" },
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{ }
|
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};
|
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U_BOOT_DRIVER(meson_clk_g12a) = {
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.name = "meson_clk_g12a",
|
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.id = UCLASS_CLK,
|
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.of_match = meson_clk_ids,
|
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.priv_auto_alloc_size = sizeof(struct meson_clk),
|
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.ops = &meson_clk_ops,
|
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.probe = meson_clk_probe,
|
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};
|
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@@ -41,7 +41,12 @@ struct i2c_regs {
|
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u32 tok_rdata1;
|
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};
|
||||
|
||||
struct meson_i2c_data {
|
||||
unsigned char div_factor;
|
||||
};
|
||||
|
||||
struct meson_i2c {
|
||||
const struct meson_i2c_data *data;
|
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struct clk clk;
|
||||
struct i2c_regs *regs;
|
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struct i2c_msg *msg; /* Current I2C message */
|
||||
@@ -229,7 +234,7 @@ static int meson_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
|
||||
if (IS_ERR_VALUE(clk_rate))
|
||||
return -EINVAL;
|
||||
|
||||
div = DIV_ROUND_UP(clk_rate, speed * 4);
|
||||
div = DIV_ROUND_UP(clk_rate, speed * i2c->data->div_factor);
|
||||
|
||||
/* clock divider has 12 bits */
|
||||
if (div >= (1 << 12)) {
|
||||
@@ -253,6 +258,8 @@ static int meson_i2c_probe(struct udevice *bus)
|
||||
struct meson_i2c *i2c = dev_get_priv(bus);
|
||||
int ret;
|
||||
|
||||
i2c->data = (const struct meson_i2c_data *)dev_get_driver_data(bus);
|
||||
|
||||
ret = clk_get_by_index(bus, 0, &i2c->clk);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
@@ -272,11 +279,24 @@ static const struct dm_i2c_ops meson_i2c_ops = {
|
||||
.set_bus_speed = meson_i2c_set_bus_speed,
|
||||
};
|
||||
|
||||
static const struct meson_i2c_data i2c_meson6_data = {
|
||||
.div_factor = 4,
|
||||
};
|
||||
|
||||
static const struct meson_i2c_data i2c_gxbb_data = {
|
||||
.div_factor = 4,
|
||||
};
|
||||
|
||||
static const struct meson_i2c_data i2c_axg_data = {
|
||||
.div_factor = 3,
|
||||
};
|
||||
|
||||
static const struct udevice_id meson_i2c_ids[] = {
|
||||
{ .compatible = "amlogic,meson6-i2c" },
|
||||
{ .compatible = "amlogic,meson-gx-i2c" },
|
||||
{ .compatible = "amlogic,meson-gxbb-i2c" },
|
||||
{ }
|
||||
{.compatible = "amlogic,meson6-i2c", .data = (ulong)&i2c_meson6_data},
|
||||
{.compatible = "amlogic,meson-gx-i2c", .data = (ulong)&i2c_gxbb_data},
|
||||
{.compatible = "amlogic,meson-gxbb-i2c", .data = (ulong)&i2c_gxbb_data},
|
||||
{.compatible = "amlogic,meson-axg-i2c", .data = (ulong)&i2c_axg_data},
|
||||
{}
|
||||
};
|
||||
|
||||
U_BOOT_DRIVER(i2c_meson) = {
|
||||
|
||||
@@ -350,7 +350,7 @@ static int sb_eth_recv(struct udevice *dev, int flags, uchar **packetp)
|
||||
struct eth_sandbox_priv *priv = dev_get_priv(dev);
|
||||
|
||||
if (skip_timeout) {
|
||||
sandbox_timer_add_offset(11000UL);
|
||||
timer_test_add_offset(11000UL);
|
||||
skip_timeout = false;
|
||||
}
|
||||
|
||||
|
||||
@@ -25,4 +25,8 @@ config PINCTRL_MESON_AXG
|
||||
bool "Amlogic Meson AXG SoC pinctrl driver"
|
||||
select PINCTRL_MESON_AXG_PMX
|
||||
|
||||
config PINCTRL_MESON_G12A
|
||||
bool "Amlogic Meson G12a SoC pinctrl driver"
|
||||
select PINCTRL_MESON_AXG_PMX
|
||||
|
||||
endif
|
||||
|
||||
@@ -6,3 +6,4 @@ obj-$(CONFIG_PINCTRL_MESON_AXG_PMX) += pinctrl-meson-axg-pmx.o
|
||||
obj-$(CONFIG_PINCTRL_MESON_GXBB) += pinctrl-meson-gxbb.o
|
||||
obj-$(CONFIG_PINCTRL_MESON_GXL) += pinctrl-meson-gxl.o
|
||||
obj-$(CONFIG_PINCTRL_MESON_AXG) += pinctrl-meson-axg.o
|
||||
obj-$(CONFIG_PINCTRL_MESON_G12A) += pinctrl-meson-g12a.o
|
||||
|
||||
@@ -17,239 +17,239 @@
|
||||
#define EE_OFF 15
|
||||
|
||||
/* emmc */
|
||||
static const unsigned int emmc_nand_d0_pins[] = {BOOT_0};
|
||||
static const unsigned int emmc_nand_d1_pins[] = {BOOT_1};
|
||||
static const unsigned int emmc_nand_d2_pins[] = {BOOT_2};
|
||||
static const unsigned int emmc_nand_d3_pins[] = {BOOT_3};
|
||||
static const unsigned int emmc_nand_d4_pins[] = {BOOT_4};
|
||||
static const unsigned int emmc_nand_d5_pins[] = {BOOT_5};
|
||||
static const unsigned int emmc_nand_d6_pins[] = {BOOT_6};
|
||||
static const unsigned int emmc_nand_d7_pins[] = {BOOT_7};
|
||||
static const unsigned int emmc_nand_d0_pins[] = { PIN(BOOT_0, EE_OFF) };
|
||||
static const unsigned int emmc_nand_d1_pins[] = { PIN(BOOT_1, EE_OFF) };
|
||||
static const unsigned int emmc_nand_d2_pins[] = { PIN(BOOT_2, EE_OFF) };
|
||||
static const unsigned int emmc_nand_d3_pins[] = { PIN(BOOT_3, EE_OFF) };
|
||||
static const unsigned int emmc_nand_d4_pins[] = { PIN(BOOT_4, EE_OFF) };
|
||||
static const unsigned int emmc_nand_d5_pins[] = { PIN(BOOT_5, EE_OFF) };
|
||||
static const unsigned int emmc_nand_d6_pins[] = { PIN(BOOT_6, EE_OFF) };
|
||||
static const unsigned int emmc_nand_d7_pins[] = { PIN(BOOT_7, EE_OFF) };
|
||||
|
||||
static const unsigned int emmc_clk_pins[] = {BOOT_8};
|
||||
static const unsigned int emmc_cmd_pins[] = {BOOT_10};
|
||||
static const unsigned int emmc_ds_pins[] = {BOOT_13};
|
||||
static const unsigned int emmc_clk_pins[] = { PIN(BOOT_8, EE_OFF) };
|
||||
static const unsigned int emmc_cmd_pins[] = { PIN(BOOT_10, EE_OFF) };
|
||||
static const unsigned int emmc_ds_pins[] = { PIN(BOOT_13, EE_OFF) };
|
||||
|
||||
/* nand */
|
||||
static const unsigned int nand_ce0_pins[] = {BOOT_8};
|
||||
static const unsigned int nand_ale_pins[] = {BOOT_9};
|
||||
static const unsigned int nand_cle_pins[] = {BOOT_10};
|
||||
static const unsigned int nand_wen_clk_pins[] = {BOOT_11};
|
||||
static const unsigned int nand_ren_wr_pins[] = {BOOT_12};
|
||||
static const unsigned int nand_rb0_pins[] = {BOOT_13};
|
||||
static const unsigned int nand_ce0_pins[] = { PIN(BOOT_8, EE_OFF) };
|
||||
static const unsigned int nand_ale_pins[] = { PIN(BOOT_9, EE_OFF) };
|
||||
static const unsigned int nand_cle_pins[] = { PIN(BOOT_10, EE_OFF) };
|
||||
static const unsigned int nand_wen_clk_pins[] = { PIN(BOOT_11, EE_OFF) };
|
||||
static const unsigned int nand_ren_wr_pins[] = { PIN(BOOT_12, EE_OFF) };
|
||||
static const unsigned int nand_rb0_pins[] = { PIN(BOOT_13, EE_OFF) };
|
||||
|
||||
/* nor */
|
||||
static const unsigned int nor_hold_pins[] = {BOOT_3};
|
||||
static const unsigned int nor_d_pins[] = {BOOT_4};
|
||||
static const unsigned int nor_q_pins[] = {BOOT_5};
|
||||
static const unsigned int nor_c_pins[] = {BOOT_6};
|
||||
static const unsigned int nor_wp_pins[] = {BOOT_9};
|
||||
static const unsigned int nor_cs_pins[] = {BOOT_14};
|
||||
static const unsigned int nor_hold_pins[] = { PIN(BOOT_3, EE_OFF) };
|
||||
static const unsigned int nor_d_pins[] = { PIN(BOOT_4, EE_OFF) };
|
||||
static const unsigned int nor_q_pins[] = { PIN(BOOT_5, EE_OFF) };
|
||||
static const unsigned int nor_c_pins[] = { PIN(BOOT_6, EE_OFF) };
|
||||
static const unsigned int nor_wp_pins[] = { PIN(BOOT_9, EE_OFF) };
|
||||
static const unsigned int nor_cs_pins[] = { PIN(BOOT_14, EE_OFF) };
|
||||
|
||||
/* sdio */
|
||||
static const unsigned int sdio_d0_pins[] = {GPIOX_0};
|
||||
static const unsigned int sdio_d1_pins[] = {GPIOX_1};
|
||||
static const unsigned int sdio_d2_pins[] = {GPIOX_2};
|
||||
static const unsigned int sdio_d3_pins[] = {GPIOX_3};
|
||||
static const unsigned int sdio_clk_pins[] = {GPIOX_4};
|
||||
static const unsigned int sdio_cmd_pins[] = {GPIOX_5};
|
||||
static const unsigned int sdio_d0_pins[] = { PIN(GPIOX_0, EE_OFF) };
|
||||
static const unsigned int sdio_d1_pins[] = { PIN(GPIOX_1, EE_OFF) };
|
||||
static const unsigned int sdio_d2_pins[] = { PIN(GPIOX_2, EE_OFF) };
|
||||
static const unsigned int sdio_d3_pins[] = { PIN(GPIOX_3, EE_OFF) };
|
||||
static const unsigned int sdio_clk_pins[] = { PIN(GPIOX_4, EE_OFF) };
|
||||
static const unsigned int sdio_cmd_pins[] = { PIN(GPIOX_5, EE_OFF) };
|
||||
|
||||
/* spi0 */
|
||||
static const unsigned int spi0_clk_pins[] = {GPIOZ_0};
|
||||
static const unsigned int spi0_mosi_pins[] = {GPIOZ_1};
|
||||
static const unsigned int spi0_miso_pins[] = {GPIOZ_2};
|
||||
static const unsigned int spi0_ss0_pins[] = {GPIOZ_3};
|
||||
static const unsigned int spi0_ss1_pins[] = {GPIOZ_4};
|
||||
static const unsigned int spi0_ss2_pins[] = {GPIOZ_5};
|
||||
static const unsigned int spi0_clk_pins[] = { PIN(GPIOZ_0, EE_OFF) };
|
||||
static const unsigned int spi0_mosi_pins[] = { PIN(GPIOZ_1, EE_OFF) };
|
||||
static const unsigned int spi0_miso_pins[] = { PIN(GPIOZ_2, EE_OFF) };
|
||||
static const unsigned int spi0_ss0_pins[] = { PIN(GPIOZ_3, EE_OFF) };
|
||||
static const unsigned int spi0_ss1_pins[] = { PIN(GPIOZ_4, EE_OFF) };
|
||||
static const unsigned int spi0_ss2_pins[] = { PIN(GPIOZ_5, EE_OFF) };
|
||||
|
||||
/* spi1 */
|
||||
static const unsigned int spi1_clk_x_pins[] = {GPIOX_19};
|
||||
static const unsigned int spi1_mosi_x_pins[] = {GPIOX_17};
|
||||
static const unsigned int spi1_miso_x_pins[] = {GPIOX_18};
|
||||
static const unsigned int spi1_ss0_x_pins[] = {GPIOX_16};
|
||||
static const unsigned int spi1_clk_x_pins[] = { PIN(GPIOX_19, EE_OFF) };
|
||||
static const unsigned int spi1_mosi_x_pins[] = { PIN(GPIOX_17, EE_OFF) };
|
||||
static const unsigned int spi1_miso_x_pins[] = { PIN(GPIOX_18, EE_OFF) };
|
||||
static const unsigned int spi1_ss0_x_pins[] = { PIN(GPIOX_16, EE_OFF) };
|
||||
|
||||
static const unsigned int spi1_clk_a_pins[] = {GPIOA_4};
|
||||
static const unsigned int spi1_mosi_a_pins[] = {GPIOA_2};
|
||||
static const unsigned int spi1_miso_a_pins[] = {GPIOA_3};
|
||||
static const unsigned int spi1_ss0_a_pins[] = {GPIOA_5};
|
||||
static const unsigned int spi1_ss1_pins[] = {GPIOA_6};
|
||||
static const unsigned int spi1_clk_a_pins[] = { PIN(GPIOA_4, EE_OFF) };
|
||||
static const unsigned int spi1_mosi_a_pins[] = { PIN(GPIOA_2, EE_OFF) };
|
||||
static const unsigned int spi1_miso_a_pins[] = { PIN(GPIOA_3, EE_OFF) };
|
||||
static const unsigned int spi1_ss0_a_pins[] = { PIN(GPIOA_5, EE_OFF) };
|
||||
static const unsigned int spi1_ss1_pins[] = { PIN(GPIOA_6, EE_OFF) };
|
||||
|
||||
/* i2c0 */
|
||||
static const unsigned int i2c0_sck_pins[] = {GPIOZ_6};
|
||||
static const unsigned int i2c0_sda_pins[] = {GPIOZ_7};
|
||||
static const unsigned int i2c0_sck_pins[] = { PIN(GPIOZ_6, EE_OFF) };
|
||||
static const unsigned int i2c0_sda_pins[] = { PIN(GPIOZ_7, EE_OFF) };
|
||||
|
||||
/* i2c1 */
|
||||
static const unsigned int i2c1_sck_z_pins[] = {GPIOZ_8};
|
||||
static const unsigned int i2c1_sda_z_pins[] = {GPIOZ_9};
|
||||
static const unsigned int i2c1_sck_z_pins[] = { PIN(GPIOZ_8, EE_OFF) };
|
||||
static const unsigned int i2c1_sda_z_pins[] = { PIN(GPIOZ_9, EE_OFF) };
|
||||
|
||||
static const unsigned int i2c1_sck_x_pins[] = {GPIOX_16};
|
||||
static const unsigned int i2c1_sda_x_pins[] = {GPIOX_17};
|
||||
static const unsigned int i2c1_sck_x_pins[] = { PIN(GPIOX_16, EE_OFF) };
|
||||
static const unsigned int i2c1_sda_x_pins[] = { PIN(GPIOX_17, EE_OFF) };
|
||||
|
||||
/* i2c2 */
|
||||
static const unsigned int i2c2_sck_x_pins[] = {GPIOX_18};
|
||||
static const unsigned int i2c2_sda_x_pins[] = {GPIOX_19};
|
||||
static const unsigned int i2c2_sck_x_pins[] = { PIN(GPIOX_18, EE_OFF) };
|
||||
static const unsigned int i2c2_sda_x_pins[] = { PIN(GPIOX_19, EE_OFF) };
|
||||
|
||||
static const unsigned int i2c2_sda_a_pins[] = {GPIOA_17};
|
||||
static const unsigned int i2c2_sck_a_pins[] = {GPIOA_18};
|
||||
static const unsigned int i2c2_sda_a_pins[] = { PIN(GPIOA_17, EE_OFF) };
|
||||
static const unsigned int i2c2_sck_a_pins[] = { PIN(GPIOA_18, EE_OFF) };
|
||||
|
||||
/* i2c3 */
|
||||
static const unsigned int i2c3_sda_a6_pins[] = {GPIOA_6};
|
||||
static const unsigned int i2c3_sck_a7_pins[] = {GPIOA_7};
|
||||
static const unsigned int i2c3_sda_a6_pins[] = { PIN(GPIOA_6, EE_OFF) };
|
||||
static const unsigned int i2c3_sck_a7_pins[] = { PIN(GPIOA_7, EE_OFF) };
|
||||
|
||||
static const unsigned int i2c3_sda_a12_pins[] = {GPIOA_12};
|
||||
static const unsigned int i2c3_sck_a13_pins[] = {GPIOA_13};
|
||||
static const unsigned int i2c3_sda_a12_pins[] = { PIN(GPIOA_12, EE_OFF) };
|
||||
static const unsigned int i2c3_sck_a13_pins[] = { PIN(GPIOA_13, EE_OFF) };
|
||||
|
||||
static const unsigned int i2c3_sda_a19_pins[] = {GPIOA_19};
|
||||
static const unsigned int i2c3_sck_a20_pins[] = {GPIOA_20};
|
||||
static const unsigned int i2c3_sda_a19_pins[] = { PIN(GPIOA_19, EE_OFF) };
|
||||
static const unsigned int i2c3_sck_a20_pins[] = { PIN(GPIOA_20, EE_OFF) };
|
||||
|
||||
/* uart_a */
|
||||
static const unsigned int uart_rts_a_pins[] = {GPIOX_11};
|
||||
static const unsigned int uart_cts_a_pins[] = {GPIOX_10};
|
||||
static const unsigned int uart_tx_a_pins[] = {GPIOX_8};
|
||||
static const unsigned int uart_rx_a_pins[] = {GPIOX_9};
|
||||
static const unsigned int uart_rts_a_pins[] = { PIN(GPIOX_11, EE_OFF) };
|
||||
static const unsigned int uart_cts_a_pins[] = { PIN(GPIOX_10, EE_OFF) };
|
||||
static const unsigned int uart_tx_a_pins[] = { PIN(GPIOX_8, EE_OFF) };
|
||||
static const unsigned int uart_rx_a_pins[] = { PIN(GPIOX_9, EE_OFF) };
|
||||
|
||||
/* uart_b */
|
||||
static const unsigned int uart_rts_b_z_pins[] = {GPIOZ_0};
|
||||
static const unsigned int uart_cts_b_z_pins[] = {GPIOZ_1};
|
||||
static const unsigned int uart_tx_b_z_pins[] = {GPIOZ_2};
|
||||
static const unsigned int uart_rx_b_z_pins[] = {GPIOZ_3};
|
||||
static const unsigned int uart_rts_b_z_pins[] = { PIN(GPIOZ_0, EE_OFF) };
|
||||
static const unsigned int uart_cts_b_z_pins[] = { PIN(GPIOZ_1, EE_OFF) };
|
||||
static const unsigned int uart_tx_b_z_pins[] = { PIN(GPIOZ_2, EE_OFF) };
|
||||
static const unsigned int uart_rx_b_z_pins[] = { PIN(GPIOZ_3, EE_OFF) };
|
||||
|
||||
static const unsigned int uart_rts_b_x_pins[] = {GPIOX_18};
|
||||
static const unsigned int uart_cts_b_x_pins[] = {GPIOX_19};
|
||||
static const unsigned int uart_tx_b_x_pins[] = {GPIOX_16};
|
||||
static const unsigned int uart_rx_b_x_pins[] = {GPIOX_17};
|
||||
static const unsigned int uart_rts_b_x_pins[] = { PIN(GPIOX_18, EE_OFF) };
|
||||
static const unsigned int uart_cts_b_x_pins[] = { PIN(GPIOX_19, EE_OFF) };
|
||||
static const unsigned int uart_tx_b_x_pins[] = { PIN(GPIOX_16, EE_OFF) };
|
||||
static const unsigned int uart_rx_b_x_pins[] = { PIN(GPIOX_17, EE_OFF) };
|
||||
|
||||
/* uart_ao_b */
|
||||
static const unsigned int uart_ao_tx_b_z_pins[] = {GPIOZ_8};
|
||||
static const unsigned int uart_ao_rx_b_z_pins[] = {GPIOZ_9};
|
||||
static const unsigned int uart_ao_cts_b_z_pins[] = {GPIOZ_6};
|
||||
static const unsigned int uart_ao_rts_b_z_pins[] = {GPIOZ_7};
|
||||
static const unsigned int uart_ao_tx_b_z_pins[] = { PIN(GPIOZ_8, EE_OFF) };
|
||||
static const unsigned int uart_ao_rx_b_z_pins[] = { PIN(GPIOZ_9, EE_OFF) };
|
||||
static const unsigned int uart_ao_cts_b_z_pins[] = { PIN(GPIOZ_6, EE_OFF) };
|
||||
static const unsigned int uart_ao_rts_b_z_pins[] = { PIN(GPIOZ_7, EE_OFF) };
|
||||
|
||||
/* pwm_a */
|
||||
static const unsigned int pwm_a_z_pins[] = {GPIOZ_5};
|
||||
static const unsigned int pwm_a_z_pins[] = { PIN(GPIOZ_5, EE_OFF) };
|
||||
|
||||
static const unsigned int pwm_a_x18_pins[] = {GPIOX_18};
|
||||
static const unsigned int pwm_a_x20_pins[] = {GPIOX_20};
|
||||
static const unsigned int pwm_a_x18_pins[] = { PIN(GPIOX_18, EE_OFF) };
|
||||
static const unsigned int pwm_a_x20_pins[] = { PIN(GPIOX_20, EE_OFF) };
|
||||
|
||||
static const unsigned int pwm_a_a_pins[] = {GPIOA_14};
|
||||
static const unsigned int pwm_a_a_pins[] = { PIN(GPIOA_14, EE_OFF) };
|
||||
|
||||
/* pwm_b */
|
||||
static const unsigned int pwm_b_z_pins[] = {GPIOZ_4};
|
||||
static const unsigned int pwm_b_z_pins[] = { PIN(GPIOZ_4, EE_OFF) };
|
||||
|
||||
static const unsigned int pwm_b_x_pins[] = {GPIOX_19};
|
||||
static const unsigned int pwm_b_x_pins[] = { PIN(GPIOX_19, EE_OFF) };
|
||||
|
||||
static const unsigned int pwm_b_a_pins[] = {GPIOA_15};
|
||||
static const unsigned int pwm_b_a_pins[] = { PIN(GPIOA_15, EE_OFF) };
|
||||
|
||||
/* pwm_c */
|
||||
static const unsigned int pwm_c_x10_pins[] = {GPIOX_10};
|
||||
static const unsigned int pwm_c_x17_pins[] = {GPIOX_17};
|
||||
static const unsigned int pwm_c_x10_pins[] = { PIN(GPIOX_10, EE_OFF) };
|
||||
static const unsigned int pwm_c_x17_pins[] = { PIN(GPIOX_17, EE_OFF) };
|
||||
|
||||
static const unsigned int pwm_c_a_pins[] = {GPIOA_16};
|
||||
static const unsigned int pwm_c_a_pins[] = { PIN(GPIOA_16, EE_OFF) };
|
||||
|
||||
/* pwm_d */
|
||||
static const unsigned int pwm_d_x11_pins[] = {GPIOX_11};
|
||||
static const unsigned int pwm_d_x16_pins[] = {GPIOX_16};
|
||||
static const unsigned int pwm_d_x11_pins[] = { PIN(GPIOX_11, EE_OFF) };
|
||||
static const unsigned int pwm_d_x16_pins[] = { PIN(GPIOX_16, EE_OFF) };
|
||||
|
||||
/* pwm_vs */
|
||||
static const unsigned int pwm_vs_pins[] = {GPIOA_0};
|
||||
static const unsigned int pwm_vs_pins[] = { PIN(GPIOA_0, EE_OFF) };
|
||||
|
||||
/* spdif_in */
|
||||
static const unsigned int spdif_in_z_pins[] = {GPIOZ_4};
|
||||
static const unsigned int spdif_in_z_pins[] = { PIN(GPIOZ_4, EE_OFF) };
|
||||
|
||||
static const unsigned int spdif_in_a1_pins[] = {GPIOA_1};
|
||||
static const unsigned int spdif_in_a7_pins[] = {GPIOA_7};
|
||||
static const unsigned int spdif_in_a19_pins[] = {GPIOA_19};
|
||||
static const unsigned int spdif_in_a20_pins[] = {GPIOA_20};
|
||||
static const unsigned int spdif_in_a1_pins[] = { PIN(GPIOA_1, EE_OFF) };
|
||||
static const unsigned int spdif_in_a7_pins[] = { PIN(GPIOA_7, EE_OFF) };
|
||||
static const unsigned int spdif_in_a19_pins[] = { PIN(GPIOA_19, EE_OFF) };
|
||||
static const unsigned int spdif_in_a20_pins[] = { PIN(GPIOA_20, EE_OFF) };
|
||||
|
||||
/* spdif_out */
|
||||
static const unsigned int spdif_out_z_pins[] = {GPIOZ_5};
|
||||
static const unsigned int spdif_out_z_pins[] = { PIN(GPIOZ_5, EE_OFF) };
|
||||
|
||||
static const unsigned int spdif_out_a1_pins[] = {GPIOA_1};
|
||||
static const unsigned int spdif_out_a11_pins[] = {GPIOA_11};
|
||||
static const unsigned int spdif_out_a19_pins[] = {GPIOA_19};
|
||||
static const unsigned int spdif_out_a20_pins[] = {GPIOA_20};
|
||||
static const unsigned int spdif_out_a1_pins[] = { PIN(GPIOA_1, EE_OFF) };
|
||||
static const unsigned int spdif_out_a11_pins[] = { PIN(GPIOA_11, EE_OFF) };
|
||||
static const unsigned int spdif_out_a19_pins[] = { PIN(GPIOA_19, EE_OFF) };
|
||||
static const unsigned int spdif_out_a20_pins[] = { PIN(GPIOA_20, EE_OFF) };
|
||||
|
||||
/* jtag_ee */
|
||||
static const unsigned int jtag_tdo_x_pins[] = {GPIOX_0};
|
||||
static const unsigned int jtag_tdi_x_pins[] = {GPIOX_1};
|
||||
static const unsigned int jtag_clk_x_pins[] = {GPIOX_4};
|
||||
static const unsigned int jtag_tms_x_pins[] = {GPIOX_5};
|
||||
static const unsigned int jtag_tdo_x_pins[] = { PIN(GPIOX_0, EE_OFF) };
|
||||
static const unsigned int jtag_tdi_x_pins[] = { PIN(GPIOX_1, EE_OFF) };
|
||||
static const unsigned int jtag_clk_x_pins[] = { PIN(GPIOX_4, EE_OFF) };
|
||||
static const unsigned int jtag_tms_x_pins[] = { PIN(GPIOX_5, EE_OFF) };
|
||||
|
||||
/* eth */
|
||||
static const unsigned int eth_txd0_x_pins[] = {GPIOX_8};
|
||||
static const unsigned int eth_txd1_x_pins[] = {GPIOX_9};
|
||||
static const unsigned int eth_txen_x_pins[] = {GPIOX_10};
|
||||
static const unsigned int eth_rgmii_rx_clk_x_pins[] = {GPIOX_12};
|
||||
static const unsigned int eth_rxd0_x_pins[] = {GPIOX_13};
|
||||
static const unsigned int eth_rxd1_x_pins[] = {GPIOX_14};
|
||||
static const unsigned int eth_rx_dv_x_pins[] = {GPIOX_15};
|
||||
static const unsigned int eth_mdio_x_pins[] = {GPIOX_21};
|
||||
static const unsigned int eth_mdc_x_pins[] = {GPIOX_22};
|
||||
static const unsigned int eth_txd0_x_pins[] = { PIN(GPIOX_8, EE_OFF) };
|
||||
static const unsigned int eth_txd1_x_pins[] = { PIN(GPIOX_9, EE_OFF) };
|
||||
static const unsigned int eth_txen_x_pins[] = { PIN(GPIOX_10, EE_OFF) };
|
||||
static const unsigned int eth_rgmii_rx_clk_x_pins[] = { PIN(GPIOX_12, EE_OFF) };
|
||||
static const unsigned int eth_rxd0_x_pins[] = { PIN(GPIOX_13, EE_OFF) };
|
||||
static const unsigned int eth_rxd1_x_pins[] = { PIN(GPIOX_14, EE_OFF) };
|
||||
static const unsigned int eth_rx_dv_x_pins[] = { PIN(GPIOX_15, EE_OFF) };
|
||||
static const unsigned int eth_mdio_x_pins[] = { PIN(GPIOX_21, EE_OFF) };
|
||||
static const unsigned int eth_mdc_x_pins[] = { PIN(GPIOX_22, EE_OFF) };
|
||||
|
||||
static const unsigned int eth_txd0_y_pins[] = {GPIOY_10};
|
||||
static const unsigned int eth_txd1_y_pins[] = {GPIOY_11};
|
||||
static const unsigned int eth_txen_y_pins[] = {GPIOY_9};
|
||||
static const unsigned int eth_rgmii_rx_clk_y_pins[] = {GPIOY_2};
|
||||
static const unsigned int eth_rxd0_y_pins[] = {GPIOY_4};
|
||||
static const unsigned int eth_rxd1_y_pins[] = {GPIOY_5};
|
||||
static const unsigned int eth_rx_dv_y_pins[] = {GPIOY_3};
|
||||
static const unsigned int eth_mdio_y_pins[] = {GPIOY_0};
|
||||
static const unsigned int eth_mdc_y_pins[] = {GPIOY_1};
|
||||
static const unsigned int eth_txd0_y_pins[] = { PIN(GPIOY_10, EE_OFF) };
|
||||
static const unsigned int eth_txd1_y_pins[] = { PIN(GPIOY_11, EE_OFF) };
|
||||
static const unsigned int eth_txen_y_pins[] = { PIN(GPIOY_9, EE_OFF) };
|
||||
static const unsigned int eth_rgmii_rx_clk_y_pins[] = { PIN(GPIOY_2, EE_OFF) };
|
||||
static const unsigned int eth_rxd0_y_pins[] = { PIN(GPIOY_4, EE_OFF) };
|
||||
static const unsigned int eth_rxd1_y_pins[] = { PIN(GPIOY_5, EE_OFF) };
|
||||
static const unsigned int eth_rx_dv_y_pins[] = { PIN(GPIOY_3, EE_OFF) };
|
||||
static const unsigned int eth_mdio_y_pins[] = { PIN(GPIOY_0, EE_OFF) };
|
||||
static const unsigned int eth_mdc_y_pins[] = { PIN(GPIOY_1, EE_OFF) };
|
||||
|
||||
static const unsigned int eth_rxd2_rgmii_pins[] = {GPIOY_6};
|
||||
static const unsigned int eth_rxd3_rgmii_pins[] = {GPIOY_7};
|
||||
static const unsigned int eth_rgmii_tx_clk_pins[] = {GPIOY_8};
|
||||
static const unsigned int eth_txd2_rgmii_pins[] = {GPIOY_12};
|
||||
static const unsigned int eth_txd3_rgmii_pins[] = {GPIOY_13};
|
||||
static const unsigned int eth_rxd2_rgmii_pins[] = { PIN(GPIOY_6, EE_OFF) };
|
||||
static const unsigned int eth_rxd3_rgmii_pins[] = { PIN(GPIOY_7, EE_OFF) };
|
||||
static const unsigned int eth_rgmii_tx_clk_pins[] = { PIN(GPIOY_8, EE_OFF) };
|
||||
static const unsigned int eth_txd2_rgmii_pins[] = { PIN(GPIOY_12, EE_OFF) };
|
||||
static const unsigned int eth_txd3_rgmii_pins[] = { PIN(GPIOY_13, EE_OFF) };
|
||||
|
||||
/* pdm */
|
||||
static const unsigned int pdm_dclk_a14_pins[] = {GPIOA_14};
|
||||
static const unsigned int pdm_dclk_a19_pins[] = {GPIOA_19};
|
||||
static const unsigned int pdm_din0_pins[] = {GPIOA_15};
|
||||
static const unsigned int pdm_din1_pins[] = {GPIOA_16};
|
||||
static const unsigned int pdm_din2_pins[] = {GPIOA_17};
|
||||
static const unsigned int pdm_din3_pins[] = {GPIOA_18};
|
||||
static const unsigned int pdm_dclk_a14_pins[] = { PIN(GPIOA_14, EE_OFF) };
|
||||
static const unsigned int pdm_dclk_a19_pins[] = { PIN(GPIOA_19, EE_OFF) };
|
||||
static const unsigned int pdm_din0_pins[] = { PIN(GPIOA_15, EE_OFF) };
|
||||
static const unsigned int pdm_din1_pins[] = { PIN(GPIOA_16, EE_OFF) };
|
||||
static const unsigned int pdm_din2_pins[] = { PIN(GPIOA_17, EE_OFF) };
|
||||
static const unsigned int pdm_din3_pins[] = { PIN(GPIOA_18, EE_OFF) };
|
||||
|
||||
/* mclk */
|
||||
static const unsigned int mclk_c_pins[] = {GPIOA_0};
|
||||
static const unsigned int mclk_b_pins[] = {GPIOA_1};
|
||||
static const unsigned int mclk_c_pins[] = { PIN(GPIOA_0, EE_OFF) };
|
||||
static const unsigned int mclk_b_pins[] = { PIN(GPIOA_1, EE_OFF) };
|
||||
|
||||
/* tdm */
|
||||
static const unsigned int tdma_sclk_pins[] = {GPIOX_12};
|
||||
static const unsigned int tdma_sclk_slv_pins[] = {GPIOX_12};
|
||||
static const unsigned int tdma_fs_pins[] = {GPIOX_13};
|
||||
static const unsigned int tdma_fs_slv_pins[] = {GPIOX_13};
|
||||
static const unsigned int tdma_din0_pins[] = {GPIOX_14};
|
||||
static const unsigned int tdma_dout0_x14_pins[] = {GPIOX_14};
|
||||
static const unsigned int tdma_dout0_x15_pins[] = {GPIOX_15};
|
||||
static const unsigned int tdma_dout1_pins[] = {GPIOX_15};
|
||||
static const unsigned int tdma_din1_pins[] = {GPIOX_15};
|
||||
static const unsigned int tdma_sclk_pins[] = { PIN(GPIOX_12, EE_OFF) };
|
||||
static const unsigned int tdma_sclk_slv_pins[] = { PIN(GPIOX_12, EE_OFF) };
|
||||
static const unsigned int tdma_fs_pins[] = { PIN(GPIOX_13, EE_OFF) };
|
||||
static const unsigned int tdma_fs_slv_pins[] = { PIN(GPIOX_13, EE_OFF) };
|
||||
static const unsigned int tdma_din0_pins[] = { PIN(GPIOX_14, EE_OFF) };
|
||||
static const unsigned int tdma_dout0_x14_pins[] = { PIN(GPIOX_14, EE_OFF) };
|
||||
static const unsigned int tdma_dout0_x15_pins[] = { PIN(GPIOX_15, EE_OFF) };
|
||||
static const unsigned int tdma_dout1_pins[] = { PIN(GPIOX_15, EE_OFF) };
|
||||
static const unsigned int tdma_din1_pins[] = { PIN(GPIOX_15, EE_OFF) };
|
||||
|
||||
static const unsigned int tdmc_sclk_pins[] = {GPIOA_2};
|
||||
static const unsigned int tdmc_sclk_slv_pins[] = {GPIOA_2};
|
||||
static const unsigned int tdmc_fs_pins[] = {GPIOA_3};
|
||||
static const unsigned int tdmc_fs_slv_pins[] = {GPIOA_3};
|
||||
static const unsigned int tdmc_din0_pins[] = {GPIOA_4};
|
||||
static const unsigned int tdmc_dout0_pins[] = {GPIOA_4};
|
||||
static const unsigned int tdmc_din1_pins[] = {GPIOA_5};
|
||||
static const unsigned int tdmc_dout1_pins[] = {GPIOA_5};
|
||||
static const unsigned int tdmc_din2_pins[] = {GPIOA_6};
|
||||
static const unsigned int tdmc_dout2_pins[] = {GPIOA_6};
|
||||
static const unsigned int tdmc_din3_pins[] = {GPIOA_7};
|
||||
static const unsigned int tdmc_dout3_pins[] = {GPIOA_7};
|
||||
static const unsigned int tdmc_sclk_pins[] = { PIN(GPIOA_2, EE_OFF) };
|
||||
static const unsigned int tdmc_sclk_slv_pins[] = { PIN(GPIOA_2, EE_OFF) };
|
||||
static const unsigned int tdmc_fs_pins[] = { PIN(GPIOA_3, EE_OFF) };
|
||||
static const unsigned int tdmc_fs_slv_pins[] = { PIN(GPIOA_3, EE_OFF) };
|
||||
static const unsigned int tdmc_din0_pins[] = { PIN(GPIOA_4, EE_OFF) };
|
||||
static const unsigned int tdmc_dout0_pins[] = { PIN(GPIOA_4, EE_OFF) };
|
||||
static const unsigned int tdmc_din1_pins[] = { PIN(GPIOA_5, EE_OFF) };
|
||||
static const unsigned int tdmc_dout1_pins[] = { PIN(GPIOA_5, EE_OFF) };
|
||||
static const unsigned int tdmc_din2_pins[] = { PIN(GPIOA_6, EE_OFF) };
|
||||
static const unsigned int tdmc_dout2_pins[] = { PIN(GPIOA_6, EE_OFF) };
|
||||
static const unsigned int tdmc_din3_pins[] = { PIN(GPIOA_7, EE_OFF) };
|
||||
static const unsigned int tdmc_dout3_pins[] = { PIN(GPIOA_7, EE_OFF) };
|
||||
|
||||
static const unsigned int tdmb_sclk_pins[] = {GPIOA_8};
|
||||
static const unsigned int tdmb_sclk_slv_pins[] = {GPIOA_8};
|
||||
static const unsigned int tdmb_fs_pins[] = {GPIOA_9};
|
||||
static const unsigned int tdmb_fs_slv_pins[] = {GPIOA_9};
|
||||
static const unsigned int tdmb_din0_pins[] = {GPIOA_10};
|
||||
static const unsigned int tdmb_dout0_pins[] = {GPIOA_10};
|
||||
static const unsigned int tdmb_din1_pins[] = {GPIOA_11};
|
||||
static const unsigned int tdmb_dout1_pins[] = {GPIOA_11};
|
||||
static const unsigned int tdmb_din2_pins[] = {GPIOA_12};
|
||||
static const unsigned int tdmb_dout2_pins[] = {GPIOA_12};
|
||||
static const unsigned int tdmb_din3_pins[] = {GPIOA_13};
|
||||
static const unsigned int tdmb_dout3_pins[] = {GPIOA_13};
|
||||
static const unsigned int tdmb_sclk_pins[] = { PIN(GPIOA_8, EE_OFF) };
|
||||
static const unsigned int tdmb_sclk_slv_pins[] = { PIN(GPIOA_8, EE_OFF) };
|
||||
static const unsigned int tdmb_fs_pins[] = { PIN(GPIOA_9, EE_OFF) };
|
||||
static const unsigned int tdmb_fs_slv_pins[] = { PIN(GPIOA_9, EE_OFF) };
|
||||
static const unsigned int tdmb_din0_pins[] = { PIN(GPIOA_10, EE_OFF) };
|
||||
static const unsigned int tdmb_dout0_pins[] = { PIN(GPIOA_10, EE_OFF) };
|
||||
static const unsigned int tdmb_din1_pins[] = { PIN(GPIOA_11, EE_OFF) };
|
||||
static const unsigned int tdmb_dout1_pins[] = { PIN(GPIOA_11, EE_OFF) };
|
||||
static const unsigned int tdmb_din2_pins[] = { PIN(GPIOA_12, EE_OFF) };
|
||||
static const unsigned int tdmb_dout2_pins[] = { PIN(GPIOA_12, EE_OFF) };
|
||||
static const unsigned int tdmb_din3_pins[] = { PIN(GPIOA_13, EE_OFF) };
|
||||
static const unsigned int tdmb_dout3_pins[] = { PIN(GPIOA_13, EE_OFF) };
|
||||
|
||||
static struct meson_pmx_group meson_axg_periphs_groups[] = {
|
||||
GPIO_GROUP(GPIOZ_0, EE_OFF),
|
||||
@@ -907,12 +907,12 @@ static struct meson_bank meson_axg_aobus_banks[] = {
|
||||
};
|
||||
|
||||
static struct meson_pmx_bank meson_axg_periphs_pmx_banks[] = {
|
||||
/* name first lask reg offset */
|
||||
BANK_PMX("Z", GPIOZ_0, GPIOZ_10, 0x2, 0),
|
||||
BANK_PMX("BOOT", BOOT_0, BOOT_14, 0x0, 0),
|
||||
BANK_PMX("A", GPIOA_0, GPIOA_20, 0xb, 0),
|
||||
BANK_PMX("X", GPIOX_0, GPIOX_22, 0x4, 0),
|
||||
BANK_PMX("Y", GPIOY_0, GPIOY_15, 0x8, 0),
|
||||
/* name first last reg offset */
|
||||
BANK_PMX("Z", PIN(GPIOZ_0, EE_OFF), PIN(GPIOZ_10, EE_OFF), 0x2, 0),
|
||||
BANK_PMX("BOOT", PIN(BOOT_0, EE_OFF), PIN(BOOT_14, EE_OFF), 0x0, 0),
|
||||
BANK_PMX("A", PIN(GPIOA_0, EE_OFF), PIN(GPIOA_20, EE_OFF), 0xb, 0),
|
||||
BANK_PMX("X", PIN(GPIOX_0, EE_OFF), PIN(GPIOX_22, EE_OFF), 0x4, 0),
|
||||
BANK_PMX("Y", PIN(GPIOY_0, EE_OFF), PIN(GPIOY_15, EE_OFF), 0x8, 0),
|
||||
};
|
||||
|
||||
static struct meson_axg_pmx_data meson_axg_periphs_pmx_banks_data = {
|
||||
@@ -931,7 +931,7 @@ static struct meson_axg_pmx_data meson_axg_aobus_pmx_banks_data = {
|
||||
|
||||
struct meson_pinctrl_data meson_axg_periphs_pinctrl_data = {
|
||||
.name = "periphs-banks",
|
||||
.pin_base = 15,
|
||||
.pin_base = EE_OFF,
|
||||
.groups = meson_axg_periphs_groups,
|
||||
.funcs = meson_axg_periphs_functions,
|
||||
.banks = meson_axg_periphs_banks,
|
||||
|
||||
1294
drivers/pinctrl/meson/pinctrl-meson-g12a.c
Normal file
1294
drivers/pinctrl/meson/pinctrl-meson-g12a.c
Normal file
File diff suppressed because it is too large
Load Diff
@@ -314,11 +314,11 @@ int meson_pinctrl_probe(struct udevice *dev)
|
||||
priv->reg_gpio = (void __iomem *)addr;
|
||||
|
||||
addr = parse_address(gpio, "pull", na, ns);
|
||||
if (addr == FDT_ADDR_T_NONE) {
|
||||
debug("pull address not found\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
priv->reg_pull = (void __iomem *)addr;
|
||||
/* Use gpio region if pull one is not present */
|
||||
if (addr == FDT_ADDR_T_NONE)
|
||||
priv->reg_pull = priv->reg_gpio;
|
||||
else
|
||||
priv->reg_pull = (void __iomem *)addr;
|
||||
|
||||
addr = parse_address(gpio, "pull-enable", na, ns);
|
||||
/* Use pull region if pull-enable one is not present */
|
||||
@@ -327,6 +327,13 @@ int meson_pinctrl_probe(struct udevice *dev)
|
||||
else
|
||||
priv->reg_pullen = (void __iomem *)addr;
|
||||
|
||||
addr = parse_address(gpio, "ds", na, ns);
|
||||
/* Drive strength region is optional */
|
||||
if (addr == FDT_ADDR_T_NONE)
|
||||
priv->reg_ds = NULL;
|
||||
else
|
||||
priv->reg_ds = (void __iomem *)addr;
|
||||
|
||||
priv->data = (struct meson_pinctrl_data *)dev_get_driver_data(dev);
|
||||
|
||||
/* Lookup GPIO driver */
|
||||
|
||||
@@ -41,6 +41,7 @@ struct meson_pinctrl {
|
||||
void __iomem *reg_gpio;
|
||||
void __iomem *reg_pull;
|
||||
void __iomem *reg_pullen;
|
||||
void __iomem *reg_ds;
|
||||
};
|
||||
|
||||
/**
|
||||
|
||||
@@ -69,6 +69,7 @@ struct reset_ops meson_reset_ops = {
|
||||
|
||||
static const struct udevice_id meson_reset_ids[] = {
|
||||
{ .compatible = "amlogic,meson-gxbb-reset" },
|
||||
{ .compatible = "amlogic,meson-axg-reset" },
|
||||
{ }
|
||||
};
|
||||
|
||||
|
||||
@@ -14,7 +14,7 @@
|
||||
/* system timer offset in ms */
|
||||
static unsigned long sandbox_timer_offset;
|
||||
|
||||
void sandbox_timer_add_offset(unsigned long offset)
|
||||
void timer_test_add_offset(unsigned long offset)
|
||||
{
|
||||
sandbox_timer_offset += offset;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user