net: pch_gbe: Convert to driver model
This commit converts pch_gbe ethernet driver to driver model. Since this driver is only used by Intel Crown Bay board, the conversion does not keep the non-dm version. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Bin Meng
Simon Glass
parent
868767c71a
commit
ca19a79342
@ -7,10 +7,10 @@
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <asm/io.h>
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#include <pci.h>
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#include <malloc.h>
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#include <miiphy.h>
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#include "pch_gbe.h"
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@ -19,7 +19,7 @@
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#endif
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static struct pci_device_id supported[] = {
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_GBE },
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_GBE) },
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{ }
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};
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@ -62,9 +62,10 @@ static int pch_gbe_mac_write(struct pch_gbe_regs *mac_regs, u8 *addr)
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return -ETIME;
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}
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static int pch_gbe_reset(struct eth_device *dev)
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static int pch_gbe_reset(struct udevice *dev)
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{
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struct pch_gbe_priv *priv = dev->priv;
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struct pch_gbe_priv *priv = dev_get_priv(dev);
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struct eth_pdata *plat = dev_get_platdata(dev);
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struct pch_gbe_regs *mac_regs = priv->mac_regs;
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ulong start;
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@ -97,7 +98,7 @@ static int pch_gbe_reset(struct eth_device *dev)
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* so we have to reload MAC address here in order to
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* make linux pch_gbe driver happy.
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*/
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return pch_gbe_mac_write(mac_regs, dev->enetaddr);
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return pch_gbe_mac_write(mac_regs, plat->enetaddr);
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}
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udelay(10);
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@ -107,9 +108,9 @@ static int pch_gbe_reset(struct eth_device *dev)
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return -ETIME;
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}
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static void pch_gbe_rx_descs_init(struct eth_device *dev)
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static void pch_gbe_rx_descs_init(struct udevice *dev)
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{
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struct pch_gbe_priv *priv = dev->priv;
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struct pch_gbe_priv *priv = dev_get_priv(dev);
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struct pch_gbe_regs *mac_regs = priv->mac_regs;
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struct pch_gbe_rx_desc *rx_desc = &priv->rx_desc[0];
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int i;
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@ -128,9 +129,9 @@ static void pch_gbe_rx_descs_init(struct eth_device *dev)
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&mac_regs->rx_dsc_sw_p);
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}
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static void pch_gbe_tx_descs_init(struct eth_device *dev)
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static void pch_gbe_tx_descs_init(struct udevice *dev)
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{
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struct pch_gbe_priv *priv = dev->priv;
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struct pch_gbe_priv *priv = dev_get_priv(dev);
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struct pch_gbe_regs *mac_regs = priv->mac_regs;
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struct pch_gbe_tx_desc *tx_desc = &priv->tx_desc[0];
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@ -183,9 +184,9 @@ static void pch_gbe_adjust_link(struct pch_gbe_regs *mac_regs,
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return;
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}
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static int pch_gbe_init(struct eth_device *dev, bd_t *bis)
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static int pch_gbe_start(struct udevice *dev)
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{
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struct pch_gbe_priv *priv = dev->priv;
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struct pch_gbe_priv *priv = dev_get_priv(dev);
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struct pch_gbe_regs *mac_regs = priv->mac_regs;
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if (pch_gbe_reset(dev))
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@ -226,18 +227,18 @@ static int pch_gbe_init(struct eth_device *dev, bd_t *bis)
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return 0;
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}
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static void pch_gbe_halt(struct eth_device *dev)
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static void pch_gbe_stop(struct udevice *dev)
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{
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struct pch_gbe_priv *priv = dev->priv;
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struct pch_gbe_priv *priv = dev_get_priv(dev);
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pch_gbe_reset(dev);
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phy_shutdown(priv->phydev);
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}
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static int pch_gbe_send(struct eth_device *dev, void *packet, int length)
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static int pch_gbe_send(struct udevice *dev, void *packet, int length)
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{
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struct pch_gbe_priv *priv = dev->priv;
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struct pch_gbe_priv *priv = dev_get_priv(dev);
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struct pch_gbe_regs *mac_regs = priv->mac_regs;
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struct pch_gbe_tx_desc *tx_head, *tx_desc;
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u16 frame_ctrl = 0;
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@ -277,15 +278,13 @@ static int pch_gbe_send(struct eth_device *dev, void *packet, int length)
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return -ETIME;
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}
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static int pch_gbe_recv(struct eth_device *dev)
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static int pch_gbe_recv(struct udevice *dev, int flags, uchar **packetp)
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{
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struct pch_gbe_priv *priv = dev->priv;
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struct pch_gbe_priv *priv = dev_get_priv(dev);
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struct pch_gbe_regs *mac_regs = priv->mac_regs;
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struct pch_gbe_rx_desc *rx_head, *rx_desc;
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struct pch_gbe_rx_desc *rx_desc;
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u32 hw_desc, buffer_addr, length;
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int rx_swp;
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rx_head = &priv->rx_desc[0];
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rx_desc = &priv->rx_desc[priv->rx_idx];
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readl(&mac_regs->int_st);
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@ -293,11 +292,21 @@ static int pch_gbe_recv(struct eth_device *dev)
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/* Just return if not receiving any packet */
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if ((u32)rx_desc == hw_desc)
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return 0;
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return -EAGAIN;
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buffer_addr = pci_mem_to_phys(priv->bdf, rx_desc->buffer_addr);
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*packetp = (uchar *)buffer_addr;
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length = rx_desc->rx_words_eob - 3 - ETH_FCS_LEN;
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net_process_received_packet((uchar *)buffer_addr, length);
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return length;
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}
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static int pch_gbe_free_pkt(struct udevice *dev, uchar *packet, int length)
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{
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struct pch_gbe_priv *priv = dev_get_priv(dev);
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struct pch_gbe_regs *mac_regs = priv->mac_regs;
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struct pch_gbe_rx_desc *rx_head = &priv->rx_desc[0];
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int rx_swp;
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/* Test the wrap-around condition */
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if (++priv->rx_idx >= PCH_GBE_DESC_NUM)
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@ -309,7 +318,7 @@ static int pch_gbe_recv(struct eth_device *dev)
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writel(pci_phys_to_mem(priv->bdf, (u32)(rx_head + rx_swp)),
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&mac_regs->rx_dsc_sw_p);
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return length;
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return 0;
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}
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static int pch_gbe_mdio_ready(struct pch_gbe_regs *mac_regs)
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@ -365,7 +374,7 @@ static int pch_gbe_mdio_write(struct mii_dev *bus, int addr, int devad,
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return 0;
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}
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static int pch_gbe_mdio_init(char *name, struct pch_gbe_regs *mac_regs)
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static int pch_gbe_mdio_init(const char *name, struct pch_gbe_regs *mac_regs)
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{
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struct mii_dev *bus;
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@ -384,13 +393,14 @@ static int pch_gbe_mdio_init(char *name, struct pch_gbe_regs *mac_regs)
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return mdio_register(bus);
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}
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static int pch_gbe_phy_init(struct eth_device *dev)
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static int pch_gbe_phy_init(struct udevice *dev)
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{
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struct pch_gbe_priv *priv = dev->priv;
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struct pch_gbe_priv *priv = dev_get_priv(dev);
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struct eth_pdata *plat = dev_get_platdata(dev);
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struct phy_device *phydev;
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int mask = 0xffffffff;
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phydev = phy_find_by_mask(priv->bus, mask, priv->interface);
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phydev = phy_find_by_mask(priv->bus, mask, plat->phy_interface);
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if (!phydev) {
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printf("pch_gbe: cannot find the phy\n");
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return -1;
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@ -404,63 +414,66 @@ static int pch_gbe_phy_init(struct eth_device *dev)
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priv->phydev = phydev;
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phy_config(phydev);
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return 1;
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return 0;
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}
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int pch_gbe_register(bd_t *bis)
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int pch_gbe_probe(struct udevice *dev)
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{
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struct eth_device *dev;
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struct pch_gbe_priv *priv;
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struct eth_pdata *plat = dev_get_platdata(dev);
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pci_dev_t devno;
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u32 iobase;
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devno = pci_find_devices(supported, 0);
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if (devno == -1)
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return -ENODEV;
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dev = (struct eth_device *)malloc(sizeof(*dev));
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if (!dev)
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return -ENOMEM;
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memset(dev, 0, sizeof(*dev));
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devno = pci_get_bdf(dev);
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/*
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* The priv structure contains the descriptors and frame buffers which
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* need a strict buswidth alignment (64 bytes)
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* need a strict buswidth alignment (64 bytes). This is guaranteed by
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* DM_FLAG_ALLOC_PRIV_DMA flag in the U_BOOT_DRIVER.
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*/
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priv = (struct pch_gbe_priv *)memalign(PCH_GBE_ALIGN_SIZE,
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sizeof(*priv));
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if (!priv) {
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free(dev);
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return -ENOMEM;
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}
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memset(priv, 0, sizeof(*priv));
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priv = dev_get_priv(dev);
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dev->priv = priv;
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priv->dev = dev;
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priv->bdf = devno;
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pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase);
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iobase &= PCI_BASE_ADDRESS_MEM_MASK;
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iobase = pci_mem_to_phys(devno, iobase);
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dev->iobase = iobase;
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plat->iobase = iobase;
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priv->mac_regs = (struct pch_gbe_regs *)iobase;
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sprintf(dev->name, "pch_gbe");
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/* Read MAC address from SROM and initialize dev->enetaddr with it */
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pch_gbe_mac_read(priv->mac_regs, dev->enetaddr);
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pch_gbe_mac_read(priv->mac_regs, plat->enetaddr);
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dev->init = pch_gbe_init;
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dev->halt = pch_gbe_halt;
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dev->send = pch_gbe_send;
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dev->recv = pch_gbe_recv;
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eth_register(dev);
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priv->interface = PHY_INTERFACE_MODE_RGMII;
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plat->phy_interface = PHY_INTERFACE_MODE_RGMII;
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pch_gbe_mdio_init(dev->name, priv->mac_regs);
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priv->bus = miiphy_get_dev_by_name(dev->name);
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return pch_gbe_phy_init(dev);
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}
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static const struct eth_ops pch_gbe_ops = {
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.start = pch_gbe_start,
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.send = pch_gbe_send,
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.recv = pch_gbe_recv,
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.free_pkt = pch_gbe_free_pkt,
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.stop = pch_gbe_stop,
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};
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static const struct udevice_id pch_gbe_ids[] = {
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{ .compatible = "intel,pch-gbe" },
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{ }
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};
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U_BOOT_DRIVER(eth_pch_gbe) = {
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.name = "pch_gbe",
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.id = UCLASS_ETH,
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.of_match = pch_gbe_ids,
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.probe = pch_gbe_probe,
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.ops = &pch_gbe_ops,
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.priv_auto_alloc_size = sizeof(struct pch_gbe_priv),
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.platdata_auto_alloc_size = sizeof(struct eth_pdata),
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.flags = DM_FLAG_ALLOC_PRIV_DMA,
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};
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U_BOOT_PCI_DEVICE(eth_pch_gbe, supported);
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@ -287,12 +287,10 @@ struct pch_gbe_priv {
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struct pch_gbe_rx_desc rx_desc[PCH_GBE_DESC_NUM];
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struct pch_gbe_tx_desc tx_desc[PCH_GBE_DESC_NUM];
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char rx_buff[PCH_GBE_DESC_NUM][PCH_GBE_RX_FRAME_LEN];
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struct eth_device *dev;
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struct phy_device *phydev;
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struct mii_dev *bus;
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struct pch_gbe_regs *mac_regs;
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pci_dev_t bdf;
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u32 interface;
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int rx_idx;
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int tx_idx;
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};
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@ -70,7 +70,6 @@ int natsemi_initialize(bd_t *bis);
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int ne2k_register(void);
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int npe_initialize(bd_t *bis);
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int ns8382x_initialize(bd_t *bis);
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int pch_gbe_register(bd_t *bis);
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int pcnet_initialize(bd_t *bis);
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int ppc_4xx_eth_initialize (bd_t *bis);
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int rtl8139_initialize(bd_t *bis);
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@ -123,9 +122,6 @@ static inline int pci_eth_init(bd_t *bis)
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#ifdef CONFIG_E1000
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num += e1000_initialize(bis);
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#endif
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#ifdef CONFIG_PCH_GBE
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num += pch_gbe_register(bis);
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#endif
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#ifdef CONFIG_PCNET
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num += pcnet_initialize(bis);
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#endif
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