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mips: bmips: add bcm6345-gpio driver support for BCM63268

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This SoC has one gpio bank divided into two 32 bit registers, with a total of
52 GPIOs.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Álvaro Fernández Rojas 2017-05-07 20:09:33 +02:00 committed by Daniel Schwierzeck
parent 320186f476
commit c9c94d5d7e
1 changed files with 19 additions and 0 deletions
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19
arch/mips/dts/brcm,bcm63268.dtsi
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@ -63,6 +63,25 @@
mask = <0x1>; mask = <0x1>;
}; };
gpio1: gpio-controller@100000c0 {
compatible = "brcm,bcm6345-gpio";
reg = <0x100000c0 0x4>, <0x100000c8 0x4>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <20>;
status = "disabled";
};
gpio0: gpio-controller@100000c4 {
compatible = "brcm,bcm6345-gpio";
reg = <0x100000c4 0x4>, <0x100000cc 0x4>;
gpio-controller;
#gpio-cells = <2>;
status = "disabled";
};
uart0: serial@10000180 { uart0: serial@10000180 {
compatible = "brcm,bcm6345-uart"; compatible = "brcm,bcm6345-uart";
reg = <0x10000180 0x18>; reg = <0x10000180 0x18>;