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p1010rdb: fix ddr values for p1014rdb (setting bus width to 16bit)

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There was an extra 0 in front of the value we were using to mask,
remove it to improve the code.

Also fix the value written to ddr_sdram_cfg to set the bus width
properly to 16 bits

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This commit is contained in:
Matthew McClintock 2012-08-13 08:10:38 +00:00 committed by Andy Fleming
parent 9c6b47d53e
commit c8f9802a72
1 changed files with 4 additions and 3 deletions
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7
board/freescale/p1010rdb/ddr.c
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@ -147,10 +147,11 @@ phys_size_t fixed_sdram(void)
cpu = gd->cpu;
/* P1014 and it's derivatives support max 16bit DDR width */
if (cpu->soc_ver == SVR_P1014) {
ddr_cfg_regs.ddr_sdram_cfg &= ~SDRAM_CFG_DBW_MASK;
ddr_cfg_regs.ddr_sdram_cfg |= SDRAM_CFG_16_BE;
ddr_cfg_regs.cs[0].bnds = CONFIG_SYS_DDR_CS0_BNDS >> 1;
ddr_cfg_regs.ddr_sdram_cfg &= ~0x00180000;
ddr_cfg_regs.ddr_sdram_cfg |= 0x001080000;
/* divide SA and EA by two and then mask the rest so we don't
* write to reserved fields */
ddr_cfg_regs.cs[0].bnds = (CONFIG_SYS_DDR_CS0_BNDS >> 1) & 0x0fff0fff;
}
ddr_size = (phys_size_t) CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;