ARM: remove broken "ep7312" board.
Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Marius Gröger <mag@sysgo.de>
This commit is contained in:
parent
fc5e5ceec4
commit
c8f63b415f
@ -664,7 +664,6 @@ Simon Guinot <simon.guinot@sequanux.org>
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Marius Gröger <mag@sysgo.de>
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impa7 ARM720T (EP7211)
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ep7312 ARM720T (EP7312)
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Igor Grinberg <grinberg@compulab.co.il>
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1
MAKEALL
1
MAKEALL
@ -301,7 +301,6 @@ LIST_SA="$(boards_by_cpu sa1100)"
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#########################################################################
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LIST_ARM7=" \
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ep7312 \
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evb4510 \
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impa7 \
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lpc2292sodimm \
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@ -36,7 +36,7 @@
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#include <asm/hardware.h>
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#include <asm/system.h>
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#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
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#if defined(CONFIG_IMPA7)
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static void cache_flush(void);
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#endif
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@ -50,7 +50,7 @@ int cleanup_before_linux (void)
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* and we set the CPU-speed to 73 MHz - see start.S for details
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*/
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#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
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#if defined(CONFIG_IMPA7)
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disable_interrupts ();
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/* turn off I-cache */
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@ -74,7 +74,7 @@ int cleanup_before_linux (void)
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return 0;
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}
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#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
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#if defined(CONFIG_IMPA7)
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/* flush I/D-cache */
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static void cache_flush (void)
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{
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@ -149,7 +149,7 @@ int timer_init (void)
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/* set timer 2 counter */
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lastdec = TIMER_LOAD_VAL;
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#elif defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
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#elif defined(CONFIG_IMPA7)
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/* disable all interrupts */
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IO_INTMR1 = 0;
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@ -207,7 +207,7 @@ int timer_init (void)
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*/
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#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) || defined(CONFIG_ARMADILLO) || defined(CONFIG_LPC2292)
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#if defined(CONFIG_IMPA7) || defined(CONFIG_NETARM) || defined(CONFIG_LPC2292)
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ulong get_timer (ulong base)
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{
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@ -272,7 +272,7 @@ _dynsym_start_ofs:
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*************************************************************************
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*/
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#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
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#if defined(CONFIG_IMPA7)
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/* Interrupt-Controller base addresses */
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INTMR1: .word 0x80000280 @ 32 bit size
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@ -301,7 +301,7 @@ MEMMAP_ADR: .word MEMMAP
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#endif
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cpu_init_crit:
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#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
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#if defined(CONFIG_IMPA7)
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/*
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* mask all IRQs by clearing all bits in the INTMRs
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@ -634,7 +634,7 @@ fiq:
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#endif
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#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
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#if defined(CONFIG_IMPA7)
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.align 5
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.globl reset_cpu
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reset_cpu:
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@ -28,10 +28,6 @@
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#include <asm/arch-arm720t/netarm_registers.h>
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#elif defined(CONFIG_IMPA7)
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/* include IMPA7 specific hardware file if there was one */
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#elif defined(CONFIG_EP7312)
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/* include EP7312 specific hardware file if there was one */
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#elif defined(CONFIG_ARMADILLO)
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/* include armadillo specific hardware file if there was one */
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#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
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/* include IntegratorCP/CM720T specific hardware file if there was one */
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#else
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@ -1,55 +0,0 @@
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#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2002
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# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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# Marius Groeger <mgroeger@sysgo.de>
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).o
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COBJS := ep7312.o flash.o
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SOBJS := lowlevel_init.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS)
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$(call cmd_link_o_target, $(OBJS) $(SOBJS))
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clean:
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rm -f $(SOBJS) $(OBJS)
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distclean: clean
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rm -f $(LIB) core *.bak $(obj).depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -1,28 +0,0 @@
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#
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# (C) Copyright 2000
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# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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# Marius Groeger <mgroeger@sysgo.de>
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#
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# (C) Copyright 2000
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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CONFIG_SYS_TEXT_BASE = 0xc0f80000
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@ -1,66 +0,0 @@
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/*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <netdev.h>
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#include <clps7111.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Miscelaneous platform dependent initialisations
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*/
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int board_init (void)
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{
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/* Activate LED flasher */
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IO_LEDFLSH = 0x40;
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/* arch number MACH_TYPE_EDB7312 */
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gd->bd->bi_arch_number = MACH_TYPE_EDB7312;
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/* location of boot parameters */
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gd->bd->bi_boot_params = 0xc0020100;
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return 0;
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}
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int dram_init (void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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return (0);
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}
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_CS8900
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rc = cs8900_initialize(0, CONFIG_CS8900_BASE);
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#endif
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return rc;
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}
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#endif
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@ -1,343 +0,0 @@
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/*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#define FLASH_BANK_SIZE 0x1000000
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#define MAIN_SECT_SIZE 0x20000
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flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
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/*-----------------------------------------------------------------------
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*/
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ulong flash_init (void)
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{
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int i, j;
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ulong size = 0;
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for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
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ulong flashbase = 0;
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flash_info[i].flash_id =
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(INTEL_MANUFACT & FLASH_VENDMASK) |
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(INTEL_ID_28F128J3 & FLASH_TYPEMASK);
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flash_info[i].size = FLASH_BANK_SIZE;
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flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
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memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
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if (i == 0)
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flashbase = PHYS_FLASH_1;
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else
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panic ("configured too many flash banks!\n");
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for (j = 0; j < flash_info[i].sector_count; j++) {
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flash_info[i].start[j] = flashbase + j * MAIN_SECT_SIZE;
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}
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size += flash_info[i].size;
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}
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/* Protect monitor and environment sectors
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*/
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flash_protect ( FLAG_PROTECT_SET,
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CONFIG_SYS_FLASH_BASE,
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CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
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&flash_info[0]);
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flash_protect ( FLAG_PROTECT_SET,
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CONFIG_ENV_ADDR,
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CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
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return size;
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}
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/*-----------------------------------------------------------------------
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*/
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void flash_print_info (flash_info_t * info)
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{
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int i;
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switch (info->flash_id & FLASH_VENDMASK) {
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case (INTEL_MANUFACT & FLASH_VENDMASK):
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printf ("Intel: ");
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break;
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default:
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printf ("Unknown Vendor ");
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break;
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}
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switch (info->flash_id & FLASH_TYPEMASK) {
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case (INTEL_ID_28F128J3 & FLASH_TYPEMASK):
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printf ("28F128J3 (128Mbit)\n");
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break;
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default:
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printf ("Unknown Chip Type\n");
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goto Done;
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break;
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}
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printf (" Size: %ld MB in %d Sectors\n",
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info->size >> 20, info->sector_count);
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printf (" Sector Start Addresses:");
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for (i = 0; i < info->sector_count; i++) {
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if ((i % 5) == 0) {
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printf ("\n ");
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}
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printf (" %08lX%s", info->start[i],
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info->protect[i] ? " (RO)" : " ");
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}
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printf ("\n");
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Done: ;
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}
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/*-----------------------------------------------------------------------
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*/
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int flash_erase (flash_info_t * info, int s_first, int s_last)
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{
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int flag, prot, sect;
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int rc = ERR_OK;
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ulong start;
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if (info->flash_id == FLASH_UNKNOWN)
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return ERR_UNKNOWN_FLASH_TYPE;
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if ((s_first < 0) || (s_first > s_last)) {
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return ERR_INVAL;
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}
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if ((info->flash_id & FLASH_VENDMASK) !=
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(INTEL_MANUFACT & FLASH_VENDMASK)) {
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return ERR_UNKNOWN_FLASH_VENDOR;
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}
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prot = 0;
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for (sect = s_first; sect <= s_last; ++sect) {
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if (info->protect[sect]) {
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prot++;
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}
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}
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if (prot)
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return ERR_PROTECTED;
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/*
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* Disable interrupts which might cause a timeout
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* here. Remember that our exception vectors are
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* at address 0 in the flash, and we don't want a
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* (ticker) exception to happen while the flash
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* chip is in programming mode.
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*/
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flag = disable_interrupts ();
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/* Start erase on unprotected sectors */
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for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
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printf ("Erasing sector %2d ... ", sect);
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/* arm simple, non interrupt dependent timer */
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start = get_timer(0);
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if (info->protect[sect] == 0) { /* not protected */
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vu_short *addr = (vu_short *) (info->start[sect]);
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*addr = 0x20; /* erase setup */
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*addr = 0xD0; /* erase confirm */
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while ((*addr & 0x80) != 0x80) {
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if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
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*addr = 0xB0; /* suspend erase */
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*addr = 0xFF; /* reset to read mode */
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rc = ERR_TIMOUT;
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goto outahere;
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}
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}
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/* clear status register command */
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*addr = 0x50;
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/* reset to read mode */
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*addr = 0xFF;
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}
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printf ("ok.\n");
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}
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if (ctrlc ())
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printf ("User Interrupt!\n");
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outahere:
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/* allow flash to settle - wait 10 ms */
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udelay_masked (10000);
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if (flag)
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enable_interrupts ();
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return rc;
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}
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/*-----------------------------------------------------------------------
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* Copy memory to flash
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*/
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static int write_word (flash_info_t * info, ulong dest, ushort data)
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{
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vu_short *addr = (vu_short *) dest, val;
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int rc = ERR_OK;
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int flag;
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ulong start;
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/* Check if Flash is (sufficiently) erased
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*/
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if ((*addr & data) != data)
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return ERR_NOT_ERASED;
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/*
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* Disable interrupts which might cause a timeout
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* here. Remember that our exception vectors are
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* at address 0 in the flash, and we don't want a
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* (ticker) exception to happen while the flash
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* chip is in programming mode.
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*/
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flag = disable_interrupts ();
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/* clear status register command */
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*addr = 0x50;
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/* program set-up command */
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*addr = 0x40;
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/* latch address/data */
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*addr = data;
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/* arm simple, non interrupt dependent timer */
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start = get_timer(0);
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/* wait while polling the status register */
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while (((val = *addr) & 0x80) != 0x80) {
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if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
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rc = ERR_TIMOUT;
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/* suspend program command */
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*addr = 0xB0;
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goto outahere;
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}
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}
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|
||||
if (val & 0x1A) { /* check for error */
|
||||
printf ("\nFlash write error %02x at address %08lx\n",
|
||||
(int) val, (unsigned long) dest);
|
||||
if (val & (1 << 3)) {
|
||||
printf ("Voltage range error.\n");
|
||||
rc = ERR_PROG_ERROR;
|
||||
goto outahere;
|
||||
}
|
||||
if (val & (1 << 1)) {
|
||||
printf ("Device protect error.\n");
|
||||
rc = ERR_PROTECTED;
|
||||
goto outahere;
|
||||
}
|
||||
if (val & (1 << 4)) {
|
||||
printf ("Programming error.\n");
|
||||
rc = ERR_PROG_ERROR;
|
||||
goto outahere;
|
||||
}
|
||||
rc = ERR_PROG_ERROR;
|
||||
goto outahere;
|
||||
}
|
||||
|
||||
outahere:
|
||||
/* read array command */
|
||||
*addr = 0xFF;
|
||||
|
||||
if (flag)
|
||||
enable_interrupts ();
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Copy memory to flash.
|
||||
*/
|
||||
|
||||
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
|
||||
{
|
||||
ulong cp, wp;
|
||||
ushort data;
|
||||
int l;
|
||||
int i, rc;
|
||||
|
||||
wp = (addr & ~1); /* get lower word aligned address */
|
||||
|
||||
/*
|
||||
* handle unaligned start bytes
|
||||
*/
|
||||
if ((l = addr - wp) != 0) {
|
||||
data = 0;
|
||||
for (i = 0, cp = wp; i < l; ++i, ++cp) {
|
||||
data = (data >> 8) | (*(uchar *) cp << 8);
|
||||
}
|
||||
for (; i < 2 && cnt > 0; ++i) {
|
||||
data = (data >> 8) | (*src++ << 8);
|
||||
--cnt;
|
||||
++cp;
|
||||
}
|
||||
for (; cnt == 0 && i < 2; ++i, ++cp) {
|
||||
data = (data >> 8) | (*(uchar *) cp << 8);
|
||||
}
|
||||
|
||||
if ((rc = write_word (info, wp, data)) != 0) {
|
||||
return (rc);
|
||||
}
|
||||
wp += 2;
|
||||
}
|
||||
|
||||
/*
|
||||
* handle word aligned part
|
||||
*/
|
||||
while (cnt >= 2) {
|
||||
data = *((vu_short *) src);
|
||||
if ((rc = write_word (info, wp, data)) != 0) {
|
||||
return (rc);
|
||||
}
|
||||
src += 2;
|
||||
wp += 2;
|
||||
cnt -= 2;
|
||||
}
|
||||
|
||||
if (cnt == 0) {
|
||||
return ERR_OK;
|
||||
}
|
||||
|
||||
/*
|
||||
* handle unaligned tail bytes
|
||||
*/
|
||||
data = 0;
|
||||
for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
|
||||
data = (data >> 8) | (*src++ << 8);
|
||||
--cnt;
|
||||
}
|
||||
for (; i < 2; ++i, ++cp) {
|
||||
data = (data >> 8) | (*(uchar *) cp << 8);
|
||||
}
|
||||
|
||||
return write_word (info, wp, data);
|
||||
}
|
@ -1,95 +0,0 @@
|
||||
/*
|
||||
* Memory Setup stuff - taken from ???
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
|
||||
#include <config.h>
|
||||
#include <version.h>
|
||||
|
||||
|
||||
/* some parameters for the board */
|
||||
|
||||
SYSCON1: .long 0x80000100
|
||||
SYSCON2: .long 0x80001100
|
||||
SYSCON3: .long 0x80002200
|
||||
MEMCFG1: .long 0x80000180
|
||||
MEMCFG2: .long 0x800001C0
|
||||
SDCONF: .long 0x80002300
|
||||
SDRFPR: .long 0x80002340
|
||||
|
||||
syscon1_val: .long 0x00040100
|
||||
syscon2_val: .long 0x00000102
|
||||
syscon3_val: .long 0x0000020E
|
||||
memcfg1_val: .long 0x1f101710
|
||||
memcfg2_mask: .long 0x0000ffff @ only set lower 16 bits
|
||||
memcfg2_val: .long 0x00001f13 @ upper 16 bits are reserved for CS7 + CS6
|
||||
sdrfpr_val: .long 0x00000240
|
||||
sdconf_val: .long 0x00000522
|
||||
/* setting up the memory */
|
||||
|
||||
.globl lowlevel_init
|
||||
lowlevel_init:
|
||||
/*
|
||||
* SYSCON1-3
|
||||
*/
|
||||
ldr r0, SYSCON1
|
||||
ldr r1, syscon1_val
|
||||
str r1, [r0]
|
||||
|
||||
ldr r0, SYSCON2
|
||||
ldr r1, syscon2_val
|
||||
str r1, [r0]
|
||||
|
||||
ldr r0, SYSCON3
|
||||
ldr r1, syscon3_val
|
||||
str r1, [r0]
|
||||
|
||||
/*
|
||||
* MEMCFG1
|
||||
*/
|
||||
ldr r0, MEMCFG1
|
||||
ldr r1, memcfg1_val
|
||||
str r1, [r0]
|
||||
|
||||
/*
|
||||
* MEMCFG2
|
||||
*/
|
||||
ldr r0, MEMCFG2
|
||||
ldr r2, [r0]
|
||||
ldr r1, memcfg2_mask
|
||||
bic r2, r2, r1
|
||||
ldr r1, memcfg2_val
|
||||
orr r2, r2, r1
|
||||
str r2, [r0]
|
||||
|
||||
/*
|
||||
* SDRFPR,SDCONF
|
||||
*/
|
||||
ldr r0, SDCONF
|
||||
ldr r1, sdconf_val
|
||||
str r1, [r0]
|
||||
|
||||
ldr r0, SDRFPR
|
||||
ldr r1, sdrfpr_val
|
||||
str r1, [r0]
|
||||
|
||||
/* everything is fine now */
|
||||
mov pc, lr
|
@ -42,7 +42,6 @@ imx31_litekit arm arm1136 - logicpd
|
||||
mx35pdk arm arm1136 - freescale mx35
|
||||
omap2420h4 arm arm1136 - ti omap24xx
|
||||
tnetv107x_evm arm arm1176 tnetv107xevm ti tnetv107x
|
||||
ep7312 arm arm720t
|
||||
impa7 arm arm720t
|
||||
modnet50 arm arm720t
|
||||
integratorap_cm720t arm arm720t integrator armltd - integratorap
|
||||
|
@ -11,6 +11,7 @@ easily if here is something they might want to dig for...
|
||||
|
||||
Board Arch CPU removed Commit last known maintainer/contact
|
||||
=============================================================================
|
||||
ep7312 arm arm720t - 2011-09-05 Marius Gröger <mag@sysgo.de>
|
||||
dnp1110 arm sa1100 - 2011-09-05 Alex Züpke <azu@sysgo.de>
|
||||
SMN42 arm arm720t - 2011-09-05
|
||||
at91rm9200dk arm arm920t 1c85752 2011-07-17
|
||||
|
@ -1,173 +0,0 @@
|
||||
/*
|
||||
* (C) Copyright 2000
|
||||
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
|
||||
* Marius Groeger <mgroeger@sysgo.de>
|
||||
*
|
||||
* Configuation settings for the EP7312 board.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
* (easy to change)
|
||||
*/
|
||||
#define CONFIG_ARM7 1 /* This is a ARM7 CPU */
|
||||
#define CONFIG_EP7312 1 /* on an EP7312 Board */
|
||||
#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */
|
||||
#undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */
|
||||
|
||||
#undef CONFIG_USE_IRQ /* don't need them anymore */
|
||||
|
||||
/*
|
||||
* Size of malloc() pool
|
||||
*/
|
||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
|
||||
|
||||
/*
|
||||
* Hardware drivers
|
||||
*/
|
||||
#define CONFIG_NET_MULTI
|
||||
#define CONFIG_CS8900 /* we have a CS8900 on-board */
|
||||
#define CONFIG_CS8900_BASE 0x20000000
|
||||
#define CONFIG_CS8900_BUS16
|
||||
#undef CONFIG_CS8900_BUS32
|
||||
|
||||
/*
|
||||
* select serial console configuration
|
||||
*/
|
||||
#define CONFIG_CLPS7111_SERIAL
|
||||
#define CONFIG_SERIAL1 1 /* we use Serial line 1 */
|
||||
|
||||
/* allow to overwrite serial and ethaddr */
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
|
||||
#define CONFIG_BAUDRATE 9600
|
||||
|
||||
/*
|
||||
* BOOTP options
|
||||
*/
|
||||
#define CONFIG_BOOTP_SUBNETMASK
|
||||
#define CONFIG_BOOTP_GATEWAY
|
||||
#define CONFIG_BOOTP_HOSTNAME
|
||||
#define CONFIG_BOOTP_BOOTPATH
|
||||
#define CONFIG_BOOTP_BOOTFILESIZE
|
||||
|
||||
|
||||
/*
|
||||
* Command line configuration.
|
||||
*/
|
||||
#include <config_cmd_default.h>
|
||||
|
||||
#define CONFIG_CMD_JFFS2
|
||||
|
||||
|
||||
#define CONFIG_BOOTDELAY 3
|
||||
#define CONFIG_BOOTARGS "devfs=mount root=ramfs console=ttyS0,9600"
|
||||
#define CONFIG_ETHADDR 08:00:3e:21:c7:f7
|
||||
/*#define CONFIG_NETMASK 255.255.0.0 */
|
||||
/*#define CONFIG_IPADDR 172.22.2.128 */
|
||||
/*#define CONFIG_SERVERIP 172.22.2.126 */
|
||||
/*#define CONFIG_BOOTFILE "impa7" */
|
||||
#define CONFIG_BOOTCOMMAND "bootp;bootm"
|
||||
|
||||
#if defined(CONFIG_CMD_KGDB)
|
||||
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
|
||||
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Miscellaneous configurable options
|
||||
*/
|
||||
#define CONFIG_SYS_LONGHELP /* undef to save memory */
|
||||
#define CONFIG_SYS_PROMPT "EP7312 # " /* Monitor Command Prompt */
|
||||
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
|
||||
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
|
||||
|
||||
#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
|
||||
#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
|
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR 0xc0500000 /* default load address */
|
||||
|
||||
#define CONFIG_SYS_HZ 2000 /* decrementer freq: 2 kHz */
|
||||
|
||||
/* valid baudrates */
|
||||
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Stack sizes
|
||||
*
|
||||
* The stack sizes are set up in start.S using the settings below
|
||||
*/
|
||||
#define CONFIG_STACKSIZE (128*1024) /* regular stack */
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
|
||||
#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Physical Memory Map
|
||||
*/
|
||||
#define CONFIG_NR_DRAM_BANKS 1 /* we have 2 banks of DRAM */
|
||||
#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Bank #1 */
|
||||
#define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
|
||||
|
||||
#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
|
||||
#define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */
|
||||
|
||||
#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* FLASH and environment organization
|
||||
*/
|
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
|
||||
#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
|
||||
|
||||
/* timeout values are in ticks */
|
||||
#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
|
||||
#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
|
||||
|
||||
#define CONFIG_ENV_IS_IN_FLASH 1
|
||||
#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x20000) /* Addr of Environment Sector */
|
||||
#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
|
||||
|
||||
/*
|
||||
* JFFS2 partitions
|
||||
*
|
||||
*/
|
||||
/* No command line, one static partition, whole device */
|
||||
#undef CONFIG_CMD_MTDPARTS
|
||||
#define CONFIG_JFFS2_DEV "nor0"
|
||||
#define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
|
||||
#define CONFIG_JFFS2_PART_OFFSET 0x00000000
|
||||
|
||||
/* mtdparts command line support */
|
||||
/* Note: fake mtd_id used, no linux mtd map file */
|
||||
/*
|
||||
#define CONFIG_CMD_MTDPARTS
|
||||
#define MTDIDS_DEFAULT "nor0=ep7312-0"
|
||||
#define MTDPARTS_DEFAULT "mtdparts=ep7312-0:-(jffs2)"
|
||||
*/
|
||||
|
||||
#endif /* __CONFIG_H */
|
Loading…
Reference in New Issue
Block a user