ARM: dts: rmobile: Synchronize Gen3 DTs with Linux 5.6.2
Synchronize R-Car Gen3 device trees with Linux 5.6.2, commit 9fbe5c87eaa9b72db08425c52c373eb5f6537a0a . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
Marek Vasut
marex
parent
329267fad2
commit
c7d681207d
@ -748,11 +748,11 @@ dtb-$(CONFIG_RCAR_GEN2) += \
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r8a7794-silk-u-boot.dtb
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r8a7794-silk-u-boot.dtb
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dtb-$(CONFIG_RCAR_GEN3) += \
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dtb-$(CONFIG_RCAR_GEN3) += \
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r8a7795-h3ulcb-u-boot.dtb \
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r8a77950-ulcb-u-boot.dtb \
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r8a7795-salvator-x-u-boot.dtb \
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r8a77950-salvator-x-u-boot.dtb \
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r8a7796-m3ulcb-u-boot.dtb \
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r8a77960-ulcb-u-boot.dtb \
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r8a7796-salvator-x-u-boot.dtb \
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r8a77960-salvator-x-u-boot.dtb \
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r8a77965-m3nulcb-u-boot.dtb \
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r8a77965-ulcb-u-boot.dtb \
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r8a77965-salvator-x-u-boot.dtb \
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r8a77965-salvator-x-u-boot.dtb \
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r8a77970-eagle-u-boot.dtb \
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r8a77970-eagle-u-boot.dtb \
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r8a77980-condor-u-boot.dtb \
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r8a77980-condor-u-boot.dtb \
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@ -5,8 +5,8 @@
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* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
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* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
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*/
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*/
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#include "r8a7795-salvator-x.dts"
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#include "r8a77950-salvator-x.dts"
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#include "r8a7795-u-boot.dtsi"
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#include "r8a77950-u-boot.dtsi"
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&sdhi0 {
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&sdhi0 {
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sd-uhs-sdr12;
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sd-uhs-sdr12;
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@ -1,16 +1,16 @@
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// SPDX-License-Identifier: GPL-2.0
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// SPDX-License-Identifier: GPL-2.0
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/*
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/*
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* Device Tree Source for the Salvator-X board with R-Car H3 ES2.0
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* Device Tree Source for the Salvator-X board with R-Car H3 ES1.x
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*
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*
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* Copyright (C) 2015 Renesas Electronics Corp.
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* Copyright (C) 2015 Renesas Electronics Corp.
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*/
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*/
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/dts-v1/;
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/dts-v1/;
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#include "r8a7795.dtsi"
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#include "r8a77950.dtsi"
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#include "salvator-x.dtsi"
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#include "salvator-x.dtsi"
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/ {
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/ {
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model = "Renesas Salvator-X board based on r8a7795 ES2.0+";
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model = "Renesas Salvator-X board based on r8a77950";
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compatible = "renesas,salvator-x", "renesas,r8a7795";
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compatible = "renesas,salvator-x", "renesas,r8a7795";
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memory@48000000 {
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memory@48000000 {
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@ -52,12 +52,6 @@
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status = "okay";
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status = "okay";
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};
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};
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&sound_card {
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dais = <&rsnd_port0 /* ak4613 */
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&rsnd_port1 /* HDMI0 */
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&rsnd_port2>; /* HDMI1 */
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};
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&hdmi0 {
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&hdmi0 {
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status = "okay";
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status = "okay";
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@ -108,6 +102,13 @@
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status = "okay";
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status = "okay";
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};
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};
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&pfc {
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usb2_pins: usb2 {
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groups = "usb2";
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function = "usb2";
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};
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};
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&rcar_sound {
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&rcar_sound {
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ports {
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ports {
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/* rsnd_port0 is on salvator-common */
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/* rsnd_port0 is on salvator-common */
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@ -138,17 +139,16 @@
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};
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};
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};
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};
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&pfc {
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usb2_pins: usb2 {
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groups = "usb2";
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function = "usb2";
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};
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};
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&sata {
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&sata {
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status = "okay";
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status = "okay";
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};
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};
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&sound_card {
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dais = <&rsnd_port0 /* ak4613 */
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&rsnd_port1 /* HDMI0 */
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&rsnd_port2>; /* HDMI1 */
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};
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&usb2_phy2 {
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&usb2_phy2 {
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pinctrl-0 = <&usb2_pins>;
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pinctrl-0 = <&usb2_pins>;
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pinctrl-names = "default";
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pinctrl-names = "default";
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@ -5,8 +5,8 @@
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* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
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* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
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*/
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*/
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#include "r8a7795-h3ulcb.dts"
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#include "r8a77950-ulcb.dts"
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#include "r8a7795-u-boot.dtsi"
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#include "r8a77950-u-boot.dtsi"
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/ {
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/ {
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cpld {
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cpld {
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@ -7,11 +7,11 @@
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*/
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*/
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/dts-v1/;
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/dts-v1/;
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#include "r8a7795.dtsi"
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#include "r8a77950.dtsi"
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#include "ulcb.dtsi"
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#include "ulcb.dtsi"
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/ {
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/ {
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model = "Renesas H3ULCB board based on r8a7795 ES2.0+";
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model = "Renesas H3ULCB board based on r8a77950";
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compatible = "renesas,h3ulcb", "renesas,r8a7795";
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compatible = "renesas,h3ulcb", "renesas,r8a7795";
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memory@48000000 {
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memory@48000000 {
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@ -35,16 +35,3 @@
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reg = <0x7 0x00000000 0x0 0x40000000>;
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reg = <0x7 0x00000000 0x0 0x40000000>;
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};
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};
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};
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};
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&du {
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clocks = <&cpg CPG_MOD 724>,
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<&cpg CPG_MOD 723>,
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<&cpg CPG_MOD 722>,
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<&cpg CPG_MOD 721>,
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<&versaclock5 1>,
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<&versaclock5 3>,
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<&versaclock5 4>,
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<&versaclock5 2>;
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clock-names = "du.0", "du.1", "du.2", "du.3",
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"dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
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};
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319
arch/arm/dts/r8a77950.dtsi
Normal file
319
arch/arm/dts/r8a77950.dtsi
Normal file
@ -0,0 +1,319 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the R-Car H3 (R8A77950) SoC
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*
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* Copyright (C) 2015 Renesas Electronics Corp.
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*/
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#include "r8a77951.dtsi"
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&audma0 {
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iommus = <&ipmmu_mp1 0>, <&ipmmu_mp1 1>,
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<&ipmmu_mp1 2>, <&ipmmu_mp1 3>,
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<&ipmmu_mp1 4>, <&ipmmu_mp1 5>,
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<&ipmmu_mp1 6>, <&ipmmu_mp1 7>,
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<&ipmmu_mp1 8>, <&ipmmu_mp1 9>,
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<&ipmmu_mp1 10>, <&ipmmu_mp1 11>,
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<&ipmmu_mp1 12>, <&ipmmu_mp1 13>,
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<&ipmmu_mp1 14>, <&ipmmu_mp1 15>;
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};
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&audma1 {
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iommus = <&ipmmu_mp1 16>, <&ipmmu_mp1 17>,
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<&ipmmu_mp1 18>, <&ipmmu_mp1 19>,
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<&ipmmu_mp1 20>, <&ipmmu_mp1 21>,
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<&ipmmu_mp1 22>, <&ipmmu_mp1 23>,
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<&ipmmu_mp1 24>, <&ipmmu_mp1 25>,
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<&ipmmu_mp1 26>, <&ipmmu_mp1 27>,
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<&ipmmu_mp1 28>, <&ipmmu_mp1 29>,
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<&ipmmu_mp1 30>, <&ipmmu_mp1 31>;
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};
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&du {
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vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd3 0>;
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};
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&fcpvb1 {
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iommus = <&ipmmu_vp0 7>;
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};
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&fcpf1 {
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iommus = <&ipmmu_vp0 1>;
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};
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&fcpvi1 {
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iommus = <&ipmmu_vp0 9>;
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};
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&fcpvd2 {
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iommus = <&ipmmu_vi0 10>;
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};
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&gpio1 {
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gpio-ranges = <&pfc 0 32 28>;
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};
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&ipmmu_vi0 {
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renesas,ipmmu-main = <&ipmmu_mm 11>;
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};
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&ipmmu_vp0 {
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renesas,ipmmu-main = <&ipmmu_mm 12>;
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};
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&ipmmu_vc0 {
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renesas,ipmmu-main = <&ipmmu_mm 9>;
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};
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&ipmmu_vc1 {
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renesas,ipmmu-main = <&ipmmu_mm 10>;
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};
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&ipmmu_rt {
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renesas,ipmmu-main = <&ipmmu_mm 7>;
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};
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&soc {
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/delete-node/ dma-controller@e6460000;
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/delete-node/ dma-controller@e6470000;
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ipmmu_mp1: mmu@ec680000 {
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compatible = "renesas,ipmmu-r8a7795";
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reg = <0 0xec680000 0 0x1000>;
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renesas,ipmmu-main = <&ipmmu_mm 5>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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#iommu-cells = <1>;
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};
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ipmmu_sy: mmu@e7730000 {
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compatible = "renesas,ipmmu-r8a7795";
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reg = <0 0xe7730000 0 0x1000>;
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renesas,ipmmu-main = <&ipmmu_mm 8>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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#iommu-cells = <1>;
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};
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/delete-node/ mmu@fd950000;
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/delete-node/ mmu@fd960000;
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/delete-node/ mmu@fd970000;
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/delete-node/ mmu@febe0000;
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/delete-node/ mmu@fe980000;
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xhci1: usb@ee040000 {
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compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
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reg = <0 0xee040000 0 0xc00>;
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interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 327>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 327>;
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status = "disabled";
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};
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/delete-node/ usb@e659c000;
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/delete-node/ usb@ee0e0000;
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/delete-node/ usb@ee0e0100;
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/delete-node/ usb-phy@ee0e0200;
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fdp1@fe948000 {
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compatible = "renesas,fdp1";
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reg = <0 0xfe948000 0 0x2400>;
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interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 117>;
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power-domains = <&sysc R8A7795_PD_A3VP>;
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resets = <&cpg 117>;
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renesas,fcp = <&fcpf2>;
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};
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fcpf2: fcp@fe952000 {
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compatible = "renesas,fcpf";
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reg = <0 0xfe952000 0 0x200>;
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clocks = <&cpg CPG_MOD 613>;
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power-domains = <&sysc R8A7795_PD_A3VP>;
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resets = <&cpg 613>;
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iommus = <&ipmmu_vp0 2>;
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};
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fcpvd3: fcp@fea3f000 {
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compatible = "renesas,fcpv";
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reg = <0 0xfea3f000 0 0x200>;
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clocks = <&cpg CPG_MOD 600>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 600>;
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iommus = <&ipmmu_vi0 11>;
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};
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fcpvi2: fcp@fe9cf000 {
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compatible = "renesas,fcpv";
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reg = <0 0xfe9cf000 0 0x200>;
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clocks = <&cpg CPG_MOD 609>;
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power-domains = <&sysc R8A7795_PD_A3VP>;
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resets = <&cpg 609>;
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iommus = <&ipmmu_vp0 10>;
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};
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vspd3: vsp@fea38000 {
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compatible = "renesas,vsp2";
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reg = <0 0xfea38000 0 0x5000>;
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interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 620>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 620>;
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renesas,fcp = <&fcpvd3>;
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};
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vspi2: vsp@fe9c0000 {
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compatible = "renesas,vsp2";
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reg = <0 0xfe9c0000 0 0x8000>;
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interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 629>;
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power-domains = <&sysc R8A7795_PD_A3VP>;
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resets = <&cpg 629>;
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renesas,fcp = <&fcpvi2>;
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};
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csi21: csi2@fea90000 {
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compatible = "renesas,r8a7795-csi2";
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reg = <0 0xfea90000 0 0x10000>;
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interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 713>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 713>;
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status = "disabled";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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csi21vin0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&vin0csi21>;
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};
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csi21vin1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&vin1csi21>;
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};
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csi21vin2: endpoint@2 {
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reg = <2>;
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||||||
|
remote-endpoint = <&vin2csi21>;
|
||||||
|
};
|
||||||
|
csi21vin3: endpoint@3 {
|
||||||
|
reg = <3>;
|
||||||
|
remote-endpoint = <&vin3csi21>;
|
||||||
|
};
|
||||||
|
csi21vin4: endpoint@4 {
|
||||||
|
reg = <4>;
|
||||||
|
remote-endpoint = <&vin4csi21>;
|
||||||
|
};
|
||||||
|
csi21vin5: endpoint@5 {
|
||||||
|
reg = <5>;
|
||||||
|
remote-endpoint = <&vin5csi21>;
|
||||||
|
};
|
||||||
|
csi21vin6: endpoint@6 {
|
||||||
|
reg = <6>;
|
||||||
|
remote-endpoint = <&vin6csi21>;
|
||||||
|
};
|
||||||
|
csi21vin7: endpoint@7 {
|
||||||
|
reg = <7>;
|
||||||
|
remote-endpoint = <&vin7csi21>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&vin0 {
|
||||||
|
ports {
|
||||||
|
port@1 {
|
||||||
|
vin0csi21: endpoint@1 {
|
||||||
|
reg = <1>;
|
||||||
|
remote-endpoint = <&csi21vin0>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&vin1 {
|
||||||
|
ports {
|
||||||
|
port@1 {
|
||||||
|
vin1csi21: endpoint@1 {
|
||||||
|
reg = <1>;
|
||||||
|
remote-endpoint = <&csi21vin1>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&vin2 {
|
||||||
|
ports {
|
||||||
|
port@1 {
|
||||||
|
vin2csi21: endpoint@1 {
|
||||||
|
reg = <1>;
|
||||||
|
remote-endpoint = <&csi21vin2>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&vin3 {
|
||||||
|
ports {
|
||||||
|
port@1 {
|
||||||
|
vin3csi21: endpoint@1 {
|
||||||
|
reg = <1>;
|
||||||
|
remote-endpoint = <&csi21vin3>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&vin4 {
|
||||||
|
ports {
|
||||||
|
port@1 {
|
||||||
|
vin4csi21: endpoint@1 {
|
||||||
|
reg = <1>;
|
||||||
|
remote-endpoint = <&csi21vin4>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&vin5 {
|
||||||
|
ports {
|
||||||
|
port@1 {
|
||||||
|
vin5csi21: endpoint@1 {
|
||||||
|
reg = <1>;
|
||||||
|
remote-endpoint = <&csi21vin5>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&vin6 {
|
||||||
|
ports {
|
||||||
|
port@1 {
|
||||||
|
vin6csi21: endpoint@1 {
|
||||||
|
reg = <1>;
|
||||||
|
remote-endpoint = <&csi21vin6>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&vin7 {
|
||||||
|
ports {
|
||||||
|
port@1 {
|
||||||
|
vin7csi21: endpoint@1 {
|
||||||
|
reg = <1>;
|
||||||
|
remote-endpoint = <&csi21vin7>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
@ -1,6 +1,6 @@
|
|||||||
// SPDX-License-Identifier: GPL-2.0
|
// SPDX-License-Identifier: GPL-2.0
|
||||||
/*
|
/*
|
||||||
* Device Tree Source for the R-Car H3 (R8A77950) SoC
|
* Device Tree Source for the R-Car H3 (R8A77951) SoC
|
||||||
*
|
*
|
||||||
* Copyright (C) 2015 Renesas Electronics Corp.
|
* Copyright (C) 2015 Renesas Electronics Corp.
|
||||||
*/
|
*/
|
||||||
@ -155,6 +155,8 @@
|
|||||||
power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
|
power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
|
||||||
next-level-cache = <&L2_CA57>;
|
next-level-cache = <&L2_CA57>;
|
||||||
enable-method = "psci";
|
enable-method = "psci";
|
||||||
|
cpu-idle-states = <&CPU_SLEEP_0>;
|
||||||
|
dynamic-power-coefficient = <854>;
|
||||||
clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
|
clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
|
||||||
operating-points-v2 = <&cluster0_opp>;
|
operating-points-v2 = <&cluster0_opp>;
|
||||||
capacity-dmips-mhz = <1024>;
|
capacity-dmips-mhz = <1024>;
|
||||||
@ -168,6 +170,7 @@
|
|||||||
power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
|
power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
|
||||||
next-level-cache = <&L2_CA57>;
|
next-level-cache = <&L2_CA57>;
|
||||||
enable-method = "psci";
|
enable-method = "psci";
|
||||||
|
cpu-idle-states = <&CPU_SLEEP_0>;
|
||||||
clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
|
clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
|
||||||
operating-points-v2 = <&cluster0_opp>;
|
operating-points-v2 = <&cluster0_opp>;
|
||||||
capacity-dmips-mhz = <1024>;
|
capacity-dmips-mhz = <1024>;
|
||||||
@ -181,6 +184,7 @@
|
|||||||
power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
|
power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
|
||||||
next-level-cache = <&L2_CA57>;
|
next-level-cache = <&L2_CA57>;
|
||||||
enable-method = "psci";
|
enable-method = "psci";
|
||||||
|
cpu-idle-states = <&CPU_SLEEP_0>;
|
||||||
clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
|
clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
|
||||||
operating-points-v2 = <&cluster0_opp>;
|
operating-points-v2 = <&cluster0_opp>;
|
||||||
capacity-dmips-mhz = <1024>;
|
capacity-dmips-mhz = <1024>;
|
||||||
@ -194,6 +198,7 @@
|
|||||||
power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
|
power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
|
||||||
next-level-cache = <&L2_CA57>;
|
next-level-cache = <&L2_CA57>;
|
||||||
enable-method = "psci";
|
enable-method = "psci";
|
||||||
|
cpu-idle-states = <&CPU_SLEEP_0>;
|
||||||
clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
|
clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
|
||||||
operating-points-v2 = <&cluster0_opp>;
|
operating-points-v2 = <&cluster0_opp>;
|
||||||
capacity-dmips-mhz = <1024>;
|
capacity-dmips-mhz = <1024>;
|
||||||
@ -207,6 +212,9 @@
|
|||||||
power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
|
power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
|
||||||
next-level-cache = <&L2_CA53>;
|
next-level-cache = <&L2_CA53>;
|
||||||
enable-method = "psci";
|
enable-method = "psci";
|
||||||
|
cpu-idle-states = <&CPU_SLEEP_1>;
|
||||||
|
#cooling-cells = <2>;
|
||||||
|
dynamic-power-coefficient = <277>;
|
||||||
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
|
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
|
||||||
operating-points-v2 = <&cluster1_opp>;
|
operating-points-v2 = <&cluster1_opp>;
|
||||||
capacity-dmips-mhz = <535>;
|
capacity-dmips-mhz = <535>;
|
||||||
@ -219,6 +227,7 @@
|
|||||||
power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
|
power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
|
||||||
next-level-cache = <&L2_CA53>;
|
next-level-cache = <&L2_CA53>;
|
||||||
enable-method = "psci";
|
enable-method = "psci";
|
||||||
|
cpu-idle-states = <&CPU_SLEEP_1>;
|
||||||
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
|
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
|
||||||
operating-points-v2 = <&cluster1_opp>;
|
operating-points-v2 = <&cluster1_opp>;
|
||||||
capacity-dmips-mhz = <535>;
|
capacity-dmips-mhz = <535>;
|
||||||
@ -231,6 +240,7 @@
|
|||||||
power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
|
power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
|
||||||
next-level-cache = <&L2_CA53>;
|
next-level-cache = <&L2_CA53>;
|
||||||
enable-method = "psci";
|
enable-method = "psci";
|
||||||
|
cpu-idle-states = <&CPU_SLEEP_1>;
|
||||||
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
|
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
|
||||||
operating-points-v2 = <&cluster1_opp>;
|
operating-points-v2 = <&cluster1_opp>;
|
||||||
capacity-dmips-mhz = <535>;
|
capacity-dmips-mhz = <535>;
|
||||||
@ -243,6 +253,7 @@
|
|||||||
power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
|
power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
|
||||||
next-level-cache = <&L2_CA53>;
|
next-level-cache = <&L2_CA53>;
|
||||||
enable-method = "psci";
|
enable-method = "psci";
|
||||||
|
cpu-idle-states = <&CPU_SLEEP_1>;
|
||||||
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
|
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
|
||||||
operating-points-v2 = <&cluster1_opp>;
|
operating-points-v2 = <&cluster1_opp>;
|
||||||
capacity-dmips-mhz = <535>;
|
capacity-dmips-mhz = <535>;
|
||||||
@ -261,6 +272,28 @@
|
|||||||
cache-unified;
|
cache-unified;
|
||||||
cache-level = <2>;
|
cache-level = <2>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
idle-states {
|
||||||
|
entry-method = "psci";
|
||||||
|
|
||||||
|
CPU_SLEEP_0: cpu-sleep-0 {
|
||||||
|
compatible = "arm,idle-state";
|
||||||
|
arm,psci-suspend-param = <0x0010000>;
|
||||||
|
local-timer-stop;
|
||||||
|
entry-latency-us = <400>;
|
||||||
|
exit-latency-us = <500>;
|
||||||
|
min-residency-us = <4000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
CPU_SLEEP_1: cpu-sleep-1 {
|
||||||
|
compatible = "arm,idle-state";
|
||||||
|
arm,psci-suspend-param = <0x0010000>;
|
||||||
|
local-timer-stop;
|
||||||
|
entry-latency-us = <700>;
|
||||||
|
exit-latency-us = <700>;
|
||||||
|
min-residency-us = <5000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
extal_clk: extal {
|
extal_clk: extal {
|
||||||
@ -572,12 +605,12 @@
|
|||||||
#interrupt-cells = <2>;
|
#interrupt-cells = <2>;
|
||||||
interrupt-controller;
|
interrupt-controller;
|
||||||
reg = <0 0xe61c0000 0 0x200>;
|
reg = <0 0xe61c0000 0 0x200>;
|
||||||
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 407>;
|
clocks = <&cpg CPG_MOD 407>;
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 407>;
|
resets = <&cpg 407>;
|
||||||
@ -812,7 +845,7 @@
|
|||||||
<&usb_dmac1 0>, <&usb_dmac1 1>;
|
<&usb_dmac1 0>, <&usb_dmac1 1>;
|
||||||
dma-names = "ch0", "ch1", "ch2", "ch3";
|
dma-names = "ch0", "ch1", "ch2", "ch3";
|
||||||
renesas,buswait = <11>;
|
renesas,buswait = <11>;
|
||||||
phys = <&usb2_phy0>;
|
phys = <&usb2_phy0 3>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 704>, <&cpg 703>;
|
resets = <&cpg 704>, <&cpg 703>;
|
||||||
@ -829,7 +862,7 @@
|
|||||||
<&usb_dmac3 0>, <&usb_dmac3 1>;
|
<&usb_dmac3 0>, <&usb_dmac3 1>;
|
||||||
dma-names = "ch0", "ch1", "ch2", "ch3";
|
dma-names = "ch0", "ch1", "ch2", "ch3";
|
||||||
renesas,buswait = <11>;
|
renesas,buswait = <11>;
|
||||||
phys = <&usb2_phy3>;
|
phys = <&usb2_phy3 3>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 705>, <&cpg 700>;
|
resets = <&cpg 705>, <&cpg 700>;
|
||||||
@ -840,8 +873,8 @@
|
|||||||
compatible = "renesas,r8a7795-usb-dmac",
|
compatible = "renesas,r8a7795-usb-dmac",
|
||||||
"renesas,usb-dmac";
|
"renesas,usb-dmac";
|
||||||
reg = <0 0xe65a0000 0 0x100>;
|
reg = <0 0xe65a0000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "ch0", "ch1";
|
interrupt-names = "ch0", "ch1";
|
||||||
clocks = <&cpg CPG_MOD 330>;
|
clocks = <&cpg CPG_MOD 330>;
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
@ -854,8 +887,8 @@
|
|||||||
compatible = "renesas,r8a7795-usb-dmac",
|
compatible = "renesas,r8a7795-usb-dmac",
|
||||||
"renesas,usb-dmac";
|
"renesas,usb-dmac";
|
||||||
reg = <0 0xe65b0000 0 0x100>;
|
reg = <0 0xe65b0000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "ch0", "ch1";
|
interrupt-names = "ch0", "ch1";
|
||||||
clocks = <&cpg CPG_MOD 331>;
|
clocks = <&cpg CPG_MOD 331>;
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
@ -868,8 +901,8 @@
|
|||||||
compatible = "renesas,r8a7795-usb-dmac",
|
compatible = "renesas,r8a7795-usb-dmac",
|
||||||
"renesas,usb-dmac";
|
"renesas,usb-dmac";
|
||||||
reg = <0 0xe6460000 0 0x100>;
|
reg = <0 0xe6460000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "ch0", "ch1";
|
interrupt-names = "ch0", "ch1";
|
||||||
clocks = <&cpg CPG_MOD 326>;
|
clocks = <&cpg CPG_MOD 326>;
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
@ -882,8 +915,8 @@
|
|||||||
compatible = "renesas,r8a7795-usb-dmac",
|
compatible = "renesas,r8a7795-usb-dmac",
|
||||||
"renesas,usb-dmac";
|
"renesas,usb-dmac";
|
||||||
reg = <0 0xe6470000 0 0x100>;
|
reg = <0 0xe6470000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "ch0", "ch1";
|
interrupt-names = "ch0", "ch1";
|
||||||
clocks = <&cpg CPG_MOD 329>;
|
clocks = <&cpg CPG_MOD 329>;
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
@ -918,23 +951,23 @@
|
|||||||
compatible = "renesas,dmac-r8a7795",
|
compatible = "renesas,dmac-r8a7795",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xe6700000 0 0x10000>;
|
reg = <0 0xe6700000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7",
|
"ch4", "ch5", "ch6", "ch7",
|
||||||
@ -960,23 +993,23 @@
|
|||||||
compatible = "renesas,dmac-r8a7795",
|
compatible = "renesas,dmac-r8a7795",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xe7300000 0 0x10000>;
|
reg = <0 0xe7300000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7",
|
"ch4", "ch5", "ch6", "ch7",
|
||||||
@ -1002,23 +1035,23 @@
|
|||||||
compatible = "renesas,dmac-r8a7795",
|
compatible = "renesas,dmac-r8a7795",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xe7310000 0 0x10000>;
|
reg = <0 0xe7310000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7",
|
"ch4", "ch5", "ch6", "ch7",
|
||||||
@ -1450,6 +1483,17 @@
|
|||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
tpu: pwm@e6e80000 {
|
||||||
|
compatible = "renesas,tpu-r8a7795", "renesas,tpu";
|
||||||
|
reg = <0 0xe6e80000 0 0x148>;
|
||||||
|
interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&cpg CPG_MOD 304>;
|
||||||
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
|
resets = <&cpg 304>;
|
||||||
|
#pwm-cells = <3>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
msiof0: spi@e6e90000 {
|
msiof0: spi@e6e90000 {
|
||||||
compatible = "renesas,msiof-r8a7795",
|
compatible = "renesas,msiof-r8a7795",
|
||||||
"renesas,rcar-gen3-msiof";
|
"renesas,rcar-gen3-msiof";
|
||||||
@ -2299,23 +2343,23 @@
|
|||||||
compatible = "renesas,dmac-r8a7795",
|
compatible = "renesas,dmac-r8a7795",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xec700000 0 0x10000>;
|
reg = <0 0xec700000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7",
|
"ch4", "ch5", "ch6", "ch7",
|
||||||
@ -2341,23 +2385,23 @@
|
|||||||
compatible = "renesas,dmac-r8a7795",
|
compatible = "renesas,dmac-r8a7795",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xec720000 0 0x10000>;
|
reg = <0 0xec720000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7",
|
"ch4", "ch5", "ch6", "ch7",
|
||||||
@ -2405,7 +2449,7 @@
|
|||||||
reg = <0 0xee080000 0 0x100>;
|
reg = <0 0xee080000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||||
phys = <&usb2_phy0>;
|
phys = <&usb2_phy0 1>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 703>, <&cpg 704>;
|
resets = <&cpg 703>, <&cpg 704>;
|
||||||
@ -2417,7 +2461,7 @@
|
|||||||
reg = <0 0xee0a0000 0 0x100>;
|
reg = <0 0xee0a0000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 702>;
|
clocks = <&cpg CPG_MOD 702>;
|
||||||
phys = <&usb2_phy1>;
|
phys = <&usb2_phy1 1>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 702>;
|
resets = <&cpg 702>;
|
||||||
@ -2429,7 +2473,7 @@
|
|||||||
reg = <0 0xee0c0000 0 0x100>;
|
reg = <0 0xee0c0000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 701>;
|
clocks = <&cpg CPG_MOD 701>;
|
||||||
phys = <&usb2_phy2>;
|
phys = <&usb2_phy2 1>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 701>;
|
resets = <&cpg 701>;
|
||||||
@ -2441,7 +2485,7 @@
|
|||||||
reg = <0 0xee0e0000 0 0x100>;
|
reg = <0 0xee0e0000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
|
clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
|
||||||
phys = <&usb2_phy3>;
|
phys = <&usb2_phy3 1>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 700>, <&cpg 705>;
|
resets = <&cpg 700>, <&cpg 705>;
|
||||||
@ -2453,7 +2497,7 @@
|
|||||||
reg = <0 0xee080100 0 0x100>;
|
reg = <0 0xee080100 0 0x100>;
|
||||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||||
phys = <&usb2_phy0>;
|
phys = <&usb2_phy0 2>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
companion = <&ohci0>;
|
companion = <&ohci0>;
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
@ -2466,7 +2510,7 @@
|
|||||||
reg = <0 0xee0a0100 0 0x100>;
|
reg = <0 0xee0a0100 0 0x100>;
|
||||||
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 702>;
|
clocks = <&cpg CPG_MOD 702>;
|
||||||
phys = <&usb2_phy1>;
|
phys = <&usb2_phy1 2>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
companion = <&ohci1>;
|
companion = <&ohci1>;
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
@ -2479,7 +2523,7 @@
|
|||||||
reg = <0 0xee0c0100 0 0x100>;
|
reg = <0 0xee0c0100 0 0x100>;
|
||||||
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 701>;
|
clocks = <&cpg CPG_MOD 701>;
|
||||||
phys = <&usb2_phy2>;
|
phys = <&usb2_phy2 2>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
companion = <&ohci2>;
|
companion = <&ohci2>;
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
@ -2492,7 +2536,7 @@
|
|||||||
reg = <0 0xee0e0100 0 0x100>;
|
reg = <0 0xee0e0100 0 0x100>;
|
||||||
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
|
clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
|
||||||
phys = <&usb2_phy3>;
|
phys = <&usb2_phy3 2>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
companion = <&ohci3>;
|
companion = <&ohci3>;
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
@ -2508,7 +2552,7 @@
|
|||||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 703>, <&cpg 704>;
|
resets = <&cpg 703>, <&cpg 704>;
|
||||||
#phy-cells = <0>;
|
#phy-cells = <1>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -2519,7 +2563,7 @@
|
|||||||
clocks = <&cpg CPG_MOD 702>;
|
clocks = <&cpg CPG_MOD 702>;
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 702>;
|
resets = <&cpg 702>;
|
||||||
#phy-cells = <0>;
|
#phy-cells = <1>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -2530,7 +2574,7 @@
|
|||||||
clocks = <&cpg CPG_MOD 701>;
|
clocks = <&cpg CPG_MOD 701>;
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 701>;
|
resets = <&cpg 701>;
|
||||||
#phy-cells = <0>;
|
#phy-cells = <1>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -2542,7 +2586,7 @@
|
|||||||
clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
|
clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 700>, <&cpg 705>;
|
resets = <&cpg 700>, <&cpg 705>;
|
||||||
#phy-cells = <0>;
|
#phy-cells = <1>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -2555,6 +2599,7 @@
|
|||||||
max-frequency = <200000000>;
|
max-frequency = <200000000>;
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 314>;
|
resets = <&cpg 314>;
|
||||||
|
iommus = <&ipmmu_ds1 32>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -2567,6 +2612,7 @@
|
|||||||
max-frequency = <200000000>;
|
max-frequency = <200000000>;
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 313>;
|
resets = <&cpg 313>;
|
||||||
|
iommus = <&ipmmu_ds1 33>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -2579,6 +2625,7 @@
|
|||||||
max-frequency = <200000000>;
|
max-frequency = <200000000>;
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 312>;
|
resets = <&cpg 312>;
|
||||||
|
iommus = <&ipmmu_ds1 34>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -2591,6 +2638,7 @@
|
|||||||
max-frequency = <200000000>;
|
max-frequency = <200000000>;
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 311>;
|
resets = <&cpg 311>;
|
||||||
|
iommus = <&ipmmu_ds1 35>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -2631,10 +2679,10 @@
|
|||||||
#size-cells = <2>;
|
#size-cells = <2>;
|
||||||
bus-range = <0x00 0xff>;
|
bus-range = <0x00 0xff>;
|
||||||
device_type = "pci";
|
device_type = "pci";
|
||||||
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
|
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
|
||||||
0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
|
<0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
|
||||||
0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
|
<0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
|
||||||
0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
|
<0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
|
||||||
/* Map all possible DDR as inbound ranges */
|
/* Map all possible DDR as inbound ranges */
|
||||||
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
|
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
|
||||||
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
|
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
@ -2658,10 +2706,10 @@
|
|||||||
#size-cells = <2>;
|
#size-cells = <2>;
|
||||||
bus-range = <0x00 0xff>;
|
bus-range = <0x00 0xff>;
|
||||||
device_type = "pci";
|
device_type = "pci";
|
||||||
ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
|
ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
|
||||||
0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
|
<0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
|
||||||
0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
|
<0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
|
||||||
0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
|
<0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
|
||||||
/* Map all possible DDR as inbound ranges */
|
/* Map all possible DDR as inbound ranges */
|
||||||
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
|
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
|
||||||
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
|
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
@ -2717,6 +2765,83 @@
|
|||||||
resets = <&cpg 820>;
|
resets = <&cpg 820>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
vspbc: vsp@fe920000 {
|
||||||
|
compatible = "renesas,vsp2";
|
||||||
|
reg = <0 0xfe920000 0 0x8000>;
|
||||||
|
interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&cpg CPG_MOD 624>;
|
||||||
|
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||||
|
resets = <&cpg 624>;
|
||||||
|
|
||||||
|
renesas,fcp = <&fcpvb1>;
|
||||||
|
};
|
||||||
|
|
||||||
|
vspbd: vsp@fe960000 {
|
||||||
|
compatible = "renesas,vsp2";
|
||||||
|
reg = <0 0xfe960000 0 0x8000>;
|
||||||
|
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&cpg CPG_MOD 626>;
|
||||||
|
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||||
|
resets = <&cpg 626>;
|
||||||
|
|
||||||
|
renesas,fcp = <&fcpvb0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
vspd0: vsp@fea20000 {
|
||||||
|
compatible = "renesas,vsp2";
|
||||||
|
reg = <0 0xfea20000 0 0x5000>;
|
||||||
|
interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&cpg CPG_MOD 623>;
|
||||||
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
|
resets = <&cpg 623>;
|
||||||
|
|
||||||
|
renesas,fcp = <&fcpvd0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
vspd1: vsp@fea28000 {
|
||||||
|
compatible = "renesas,vsp2";
|
||||||
|
reg = <0 0xfea28000 0 0x5000>;
|
||||||
|
interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&cpg CPG_MOD 622>;
|
||||||
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
|
resets = <&cpg 622>;
|
||||||
|
|
||||||
|
renesas,fcp = <&fcpvd1>;
|
||||||
|
};
|
||||||
|
|
||||||
|
vspd2: vsp@fea30000 {
|
||||||
|
compatible = "renesas,vsp2";
|
||||||
|
reg = <0 0xfea30000 0 0x5000>;
|
||||||
|
interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&cpg CPG_MOD 621>;
|
||||||
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
|
resets = <&cpg 621>;
|
||||||
|
|
||||||
|
renesas,fcp = <&fcpvd2>;
|
||||||
|
};
|
||||||
|
|
||||||
|
vspi0: vsp@fe9a0000 {
|
||||||
|
compatible = "renesas,vsp2";
|
||||||
|
reg = <0 0xfe9a0000 0 0x8000>;
|
||||||
|
interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&cpg CPG_MOD 631>;
|
||||||
|
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||||
|
resets = <&cpg 631>;
|
||||||
|
|
||||||
|
renesas,fcp = <&fcpvi0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
vspi1: vsp@fe9b0000 {
|
||||||
|
compatible = "renesas,vsp2";
|
||||||
|
reg = <0 0xfe9b0000 0 0x8000>;
|
||||||
|
interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&cpg CPG_MOD 630>;
|
||||||
|
power-domains = <&sysc R8A7795_PD_A3VP>;
|
||||||
|
resets = <&cpg 630>;
|
||||||
|
|
||||||
|
renesas,fcp = <&fcpvi1>;
|
||||||
|
};
|
||||||
|
|
||||||
fdp1@fe940000 {
|
fdp1@fe940000 {
|
||||||
compatible = "renesas,fdp1";
|
compatible = "renesas,fdp1";
|
||||||
reg = <0 0xfe940000 0 0x2400>;
|
reg = <0 0xfe940000 0 0x2400>;
|
||||||
@ -2818,81 +2943,40 @@
|
|||||||
iommus = <&ipmmu_vi1 10>;
|
iommus = <&ipmmu_vi1 10>;
|
||||||
};
|
};
|
||||||
|
|
||||||
vspbd: vsp@fe960000 {
|
cmm0: cmm@fea40000 {
|
||||||
compatible = "renesas,vsp2";
|
compatible = "renesas,r8a7795-cmm",
|
||||||
reg = <0 0xfe960000 0 0x8000>;
|
"renesas,rcar-gen3-cmm";
|
||||||
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
|
reg = <0 0xfea40000 0 0x1000>;
|
||||||
clocks = <&cpg CPG_MOD 626>;
|
|
||||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
|
||||||
resets = <&cpg 626>;
|
|
||||||
|
|
||||||
renesas,fcp = <&fcpvb0>;
|
|
||||||
};
|
|
||||||
|
|
||||||
vspbc: vsp@fe920000 {
|
|
||||||
compatible = "renesas,vsp2";
|
|
||||||
reg = <0 0xfe920000 0 0x8000>;
|
|
||||||
interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
|
|
||||||
clocks = <&cpg CPG_MOD 624>;
|
|
||||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
|
||||||
resets = <&cpg 624>;
|
|
||||||
|
|
||||||
renesas,fcp = <&fcpvb1>;
|
|
||||||
};
|
|
||||||
|
|
||||||
vspd0: vsp@fea20000 {
|
|
||||||
compatible = "renesas,vsp2";
|
|
||||||
reg = <0 0xfea20000 0 0x5000>;
|
|
||||||
interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
|
|
||||||
clocks = <&cpg CPG_MOD 623>;
|
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 623>;
|
clocks = <&cpg CPG_MOD 711>;
|
||||||
|
resets = <&cpg 711>;
|
||||||
renesas,fcp = <&fcpvd0>;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
vspd1: vsp@fea28000 {
|
cmm1: cmm@fea50000 {
|
||||||
compatible = "renesas,vsp2";
|
compatible = "renesas,r8a7795-cmm",
|
||||||
reg = <0 0xfea28000 0 0x5000>;
|
"renesas,rcar-gen3-cmm";
|
||||||
interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
|
reg = <0 0xfea50000 0 0x1000>;
|
||||||
clocks = <&cpg CPG_MOD 622>;
|
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 622>;
|
clocks = <&cpg CPG_MOD 710>;
|
||||||
|
resets = <&cpg 710>;
|
||||||
renesas,fcp = <&fcpvd1>;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
vspd2: vsp@fea30000 {
|
cmm2: cmm@fea60000 {
|
||||||
compatible = "renesas,vsp2";
|
compatible = "renesas,r8a7795-cmm",
|
||||||
reg = <0 0xfea30000 0 0x5000>;
|
"renesas,rcar-gen3-cmm";
|
||||||
interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
|
reg = <0 0xfea60000 0 0x1000>;
|
||||||
clocks = <&cpg CPG_MOD 621>;
|
|
||||||
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 621>;
|
clocks = <&cpg CPG_MOD 709>;
|
||||||
|
resets = <&cpg 709>;
|
||||||
renesas,fcp = <&fcpvd2>;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
vspi0: vsp@fe9a0000 {
|
cmm3: cmm@fea70000 {
|
||||||
compatible = "renesas,vsp2";
|
compatible = "renesas,r8a7795-cmm",
|
||||||
reg = <0 0xfe9a0000 0 0x8000>;
|
"renesas,rcar-gen3-cmm";
|
||||||
interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
|
reg = <0 0xfea70000 0 0x1000>;
|
||||||
clocks = <&cpg CPG_MOD 631>;
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
||||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
clocks = <&cpg CPG_MOD 708>;
|
||||||
resets = <&cpg 631>;
|
resets = <&cpg 708>;
|
||||||
|
|
||||||
renesas,fcp = <&fcpvi0>;
|
|
||||||
};
|
|
||||||
|
|
||||||
vspi1: vsp@fe9b0000 {
|
|
||||||
compatible = "renesas,vsp2";
|
|
||||||
reg = <0 0xfe9b0000 0 0x8000>;
|
|
||||||
interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
|
|
||||||
clocks = <&cpg CPG_MOD 630>;
|
|
||||||
power-domains = <&sysc R8A7795_PD_A3VP>;
|
|
||||||
resets = <&cpg 630>;
|
|
||||||
|
|
||||||
renesas,fcp = <&fcpvi1>;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
csi20: csi2@fea80000 {
|
csi20: csi2@fea80000 {
|
||||||
@ -3098,7 +3182,10 @@
|
|||||||
<&cpg CPG_MOD 722>,
|
<&cpg CPG_MOD 722>,
|
||||||
<&cpg CPG_MOD 721>;
|
<&cpg CPG_MOD 721>;
|
||||||
clock-names = "du.0", "du.1", "du.2", "du.3";
|
clock-names = "du.0", "du.1", "du.2", "du.3";
|
||||||
vsps = <&vspd0 0 &vspd1 0 &vspd2 0 &vspd0 1>;
|
|
||||||
|
renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
|
||||||
|
vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>;
|
||||||
|
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
|
|
||||||
ports {
|
ports {
|
||||||
@ -3168,58 +3255,30 @@
|
|||||||
polling-delay-passive = <250>;
|
polling-delay-passive = <250>;
|
||||||
polling-delay = <1000>;
|
polling-delay = <1000>;
|
||||||
thermal-sensors = <&tsc 0>;
|
thermal-sensors = <&tsc 0>;
|
||||||
|
sustainable-power = <6313>;
|
||||||
|
|
||||||
trips {
|
trips {
|
||||||
sensor1_passive: sensor1-passive {
|
|
||||||
temperature = <95000>;
|
|
||||||
hysteresis = <1000>;
|
|
||||||
type = "passive";
|
|
||||||
};
|
|
||||||
sensor1_crit: sensor1-crit {
|
sensor1_crit: sensor1-crit {
|
||||||
temperature = <120000>;
|
temperature = <120000>;
|
||||||
hysteresis = <1000>;
|
hysteresis = <1000>;
|
||||||
type = "critical";
|
type = "critical";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
cooling-maps {
|
|
||||||
map0 {
|
|
||||||
trip = <&sensor1_passive>;
|
|
||||||
cooling-device = <&a57_0 4 4>,
|
|
||||||
<&a57_1 4 4>,
|
|
||||||
<&a57_2 4 4>,
|
|
||||||
<&a57_3 4 4>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
};
|
||||||
|
|
||||||
sensor_thermal2: sensor-thermal2 {
|
sensor_thermal2: sensor-thermal2 {
|
||||||
polling-delay-passive = <250>;
|
polling-delay-passive = <250>;
|
||||||
polling-delay = <1000>;
|
polling-delay = <1000>;
|
||||||
thermal-sensors = <&tsc 1>;
|
thermal-sensors = <&tsc 1>;
|
||||||
|
sustainable-power = <6313>;
|
||||||
|
|
||||||
trips {
|
trips {
|
||||||
sensor2_passive: sensor2-passive {
|
|
||||||
temperature = <95000>;
|
|
||||||
hysteresis = <1000>;
|
|
||||||
type = "passive";
|
|
||||||
};
|
|
||||||
sensor2_crit: sensor2-crit {
|
sensor2_crit: sensor2-crit {
|
||||||
temperature = <120000>;
|
temperature = <120000>;
|
||||||
hysteresis = <1000>;
|
hysteresis = <1000>;
|
||||||
type = "critical";
|
type = "critical";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
cooling-maps {
|
|
||||||
map0 {
|
|
||||||
trip = <&sensor2_passive>;
|
|
||||||
cooling-device = <&a57_0 4 4>,
|
|
||||||
<&a57_1 4 4>,
|
|
||||||
<&a57_2 4 4>,
|
|
||||||
<&a57_3 4 4>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
};
|
||||||
|
|
||||||
sensor_thermal3: sensor-thermal3 {
|
sensor_thermal3: sensor-thermal3 {
|
||||||
@ -3228,11 +3287,12 @@
|
|||||||
thermal-sensors = <&tsc 2>;
|
thermal-sensors = <&tsc 2>;
|
||||||
|
|
||||||
trips {
|
trips {
|
||||||
sensor3_passive: sensor3-passive {
|
target: trip-point1 {
|
||||||
temperature = <95000>;
|
temperature = <100000>;
|
||||||
hysteresis = <1000>;
|
hysteresis = <1000>;
|
||||||
type = "passive";
|
type = "passive";
|
||||||
};
|
};
|
||||||
|
|
||||||
sensor3_crit: sensor3-crit {
|
sensor3_crit: sensor3-crit {
|
||||||
temperature = <120000>;
|
temperature = <120000>;
|
||||||
hysteresis = <1000>;
|
hysteresis = <1000>;
|
||||||
@ -3242,11 +3302,15 @@
|
|||||||
|
|
||||||
cooling-maps {
|
cooling-maps {
|
||||||
map0 {
|
map0 {
|
||||||
trip = <&sensor3_passive>;
|
trip = <&target>;
|
||||||
cooling-device = <&a57_0 4 4>,
|
cooling-device = <&a57_0 2 4>;
|
||||||
<&a57_1 4 4>,
|
contribution = <1024>;
|
||||||
<&a57_2 4 4>,
|
};
|
||||||
<&a57_3 4 4>;
|
|
||||||
|
map1 {
|
||||||
|
trip = <&target>;
|
||||||
|
cooling-device = <&a53_0 0 2>;
|
||||||
|
contribution = <1024>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
@ -5,8 +5,8 @@
|
|||||||
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "r8a7796-salvator-x.dts"
|
#include "r8a77960-salvator-x.dts"
|
||||||
#include "r8a7796-u-boot.dtsi"
|
#include "r8a77960-u-boot.dtsi"
|
||||||
|
|
||||||
&sdhi0 {
|
&sdhi0 {
|
||||||
sd-uhs-sdr12;
|
sd-uhs-sdr12;
|
||||||
@ -6,11 +6,11 @@
|
|||||||
*/
|
*/
|
||||||
|
|
||||||
/dts-v1/;
|
/dts-v1/;
|
||||||
#include "r8a7796.dtsi"
|
#include "r8a77960.dtsi"
|
||||||
#include "salvator-x.dtsi"
|
#include "salvator-x.dtsi"
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
model = "Renesas Salvator-X board based on r8a7796";
|
model = "Renesas Salvator-X board based on r8a77960";
|
||||||
compatible = "renesas,salvator-x", "renesas,r8a7796";
|
compatible = "renesas,salvator-x", "renesas,r8a7796";
|
||||||
|
|
||||||
memory@48000000 {
|
memory@48000000 {
|
||||||
@ -36,11 +36,6 @@
|
|||||||
"dclkin.0", "dclkin.1", "dclkin.2";
|
"dclkin.0", "dclkin.1", "dclkin.2";
|
||||||
};
|
};
|
||||||
|
|
||||||
&sound_card {
|
|
||||||
dais = <&rsnd_port0 /* ak4613 */
|
|
||||||
&rsnd_port1>; /* HDMI0 */
|
|
||||||
};
|
|
||||||
|
|
||||||
&hdmi0 {
|
&hdmi0 {
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
||||||
@ -81,3 +76,8 @@
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&sound_card {
|
||||||
|
dais = <&rsnd_port0 /* ak4613 */
|
||||||
|
&rsnd_port1>; /* HDMI0 */
|
||||||
|
};
|
||||||
@ -5,8 +5,8 @@
|
|||||||
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "r8a7796-m3ulcb.dts"
|
#include "r8a77960-ulcb.dts"
|
||||||
#include "r8a7796-u-boot.dtsi"
|
#include "r8a77960-u-boot.dtsi"
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
cpld {
|
cpld {
|
||||||
@ -7,11 +7,11 @@
|
|||||||
*/
|
*/
|
||||||
|
|
||||||
/dts-v1/;
|
/dts-v1/;
|
||||||
#include "r8a7796.dtsi"
|
#include "r8a77960.dtsi"
|
||||||
#include "ulcb.dtsi"
|
#include "ulcb.dtsi"
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
model = "Renesas M3ULCB board based on r8a7796";
|
model = "Renesas M3ULCB board based on r8a77960";
|
||||||
compatible = "renesas,m3ulcb", "renesas,r8a7796";
|
compatible = "renesas,m3ulcb", "renesas,r8a7796";
|
||||||
|
|
||||||
memory@48000000 {
|
memory@48000000 {
|
||||||
@ -160,6 +160,8 @@
|
|||||||
power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
|
power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
|
||||||
next-level-cache = <&L2_CA57>;
|
next-level-cache = <&L2_CA57>;
|
||||||
enable-method = "psci";
|
enable-method = "psci";
|
||||||
|
cpu-idle-states = <&CPU_SLEEP_0>;
|
||||||
|
dynamic-power-coefficient = <854>;
|
||||||
clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
|
clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
|
||||||
operating-points-v2 = <&cluster0_opp>;
|
operating-points-v2 = <&cluster0_opp>;
|
||||||
capacity-dmips-mhz = <1024>;
|
capacity-dmips-mhz = <1024>;
|
||||||
@ -173,6 +175,7 @@
|
|||||||
power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
|
power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
|
||||||
next-level-cache = <&L2_CA57>;
|
next-level-cache = <&L2_CA57>;
|
||||||
enable-method = "psci";
|
enable-method = "psci";
|
||||||
|
cpu-idle-states = <&CPU_SLEEP_0>;
|
||||||
clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
|
clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
|
||||||
operating-points-v2 = <&cluster0_opp>;
|
operating-points-v2 = <&cluster0_opp>;
|
||||||
capacity-dmips-mhz = <1024>;
|
capacity-dmips-mhz = <1024>;
|
||||||
@ -186,6 +189,9 @@
|
|||||||
power-domains = <&sysc R8A7796_PD_CA53_CPU0>;
|
power-domains = <&sysc R8A7796_PD_CA53_CPU0>;
|
||||||
next-level-cache = <&L2_CA53>;
|
next-level-cache = <&L2_CA53>;
|
||||||
enable-method = "psci";
|
enable-method = "psci";
|
||||||
|
cpu-idle-states = <&CPU_SLEEP_1>;
|
||||||
|
#cooling-cells = <2>;
|
||||||
|
dynamic-power-coefficient = <277>;
|
||||||
clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
|
clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
|
||||||
operating-points-v2 = <&cluster1_opp>;
|
operating-points-v2 = <&cluster1_opp>;
|
||||||
capacity-dmips-mhz = <535>;
|
capacity-dmips-mhz = <535>;
|
||||||
@ -198,6 +204,7 @@
|
|||||||
power-domains = <&sysc R8A7796_PD_CA53_CPU1>;
|
power-domains = <&sysc R8A7796_PD_CA53_CPU1>;
|
||||||
next-level-cache = <&L2_CA53>;
|
next-level-cache = <&L2_CA53>;
|
||||||
enable-method = "psci";
|
enable-method = "psci";
|
||||||
|
cpu-idle-states = <&CPU_SLEEP_1>;
|
||||||
clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
|
clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
|
||||||
operating-points-v2 = <&cluster1_opp>;
|
operating-points-v2 = <&cluster1_opp>;
|
||||||
capacity-dmips-mhz = <535>;
|
capacity-dmips-mhz = <535>;
|
||||||
@ -210,6 +217,7 @@
|
|||||||
power-domains = <&sysc R8A7796_PD_CA53_CPU2>;
|
power-domains = <&sysc R8A7796_PD_CA53_CPU2>;
|
||||||
next-level-cache = <&L2_CA53>;
|
next-level-cache = <&L2_CA53>;
|
||||||
enable-method = "psci";
|
enable-method = "psci";
|
||||||
|
cpu-idle-states = <&CPU_SLEEP_1>;
|
||||||
clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
|
clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
|
||||||
operating-points-v2 = <&cluster1_opp>;
|
operating-points-v2 = <&cluster1_opp>;
|
||||||
capacity-dmips-mhz = <535>;
|
capacity-dmips-mhz = <535>;
|
||||||
@ -222,6 +230,7 @@
|
|||||||
power-domains = <&sysc R8A7796_PD_CA53_CPU3>;
|
power-domains = <&sysc R8A7796_PD_CA53_CPU3>;
|
||||||
next-level-cache = <&L2_CA53>;
|
next-level-cache = <&L2_CA53>;
|
||||||
enable-method = "psci";
|
enable-method = "psci";
|
||||||
|
cpu-idle-states = <&CPU_SLEEP_1>;
|
||||||
clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
|
clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
|
||||||
operating-points-v2 = <&cluster1_opp>;
|
operating-points-v2 = <&cluster1_opp>;
|
||||||
capacity-dmips-mhz = <535>;
|
capacity-dmips-mhz = <535>;
|
||||||
@ -240,6 +249,28 @@
|
|||||||
cache-unified;
|
cache-unified;
|
||||||
cache-level = <2>;
|
cache-level = <2>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
idle-states {
|
||||||
|
entry-method = "psci";
|
||||||
|
|
||||||
|
CPU_SLEEP_0: cpu-sleep-0 {
|
||||||
|
compatible = "arm,idle-state";
|
||||||
|
arm,psci-suspend-param = <0x0010000>;
|
||||||
|
local-timer-stop;
|
||||||
|
entry-latency-us = <400>;
|
||||||
|
exit-latency-us = <500>;
|
||||||
|
min-residency-us = <4000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
CPU_SLEEP_1: cpu-sleep-1 {
|
||||||
|
compatible = "arm,idle-state";
|
||||||
|
arm,psci-suspend-param = <0x0010000>;
|
||||||
|
local-timer-stop;
|
||||||
|
entry-latency-us = <700>;
|
||||||
|
exit-latency-us = <700>;
|
||||||
|
min-residency-us = <5000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
extal_clk: extal {
|
extal_clk: extal {
|
||||||
@ -543,12 +574,12 @@
|
|||||||
#interrupt-cells = <2>;
|
#interrupt-cells = <2>;
|
||||||
interrupt-controller;
|
interrupt-controller;
|
||||||
reg = <0 0xe61c0000 0 0x200>;
|
reg = <0 0xe61c0000 0 0x200>;
|
||||||
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 407>;
|
clocks = <&cpg CPG_MOD 407>;
|
||||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 407>;
|
resets = <&cpg 407>;
|
||||||
@ -783,7 +814,7 @@
|
|||||||
<&usb_dmac1 0>, <&usb_dmac1 1>;
|
<&usb_dmac1 0>, <&usb_dmac1 1>;
|
||||||
dma-names = "ch0", "ch1", "ch2", "ch3";
|
dma-names = "ch0", "ch1", "ch2", "ch3";
|
||||||
renesas,buswait = <11>;
|
renesas,buswait = <11>;
|
||||||
phys = <&usb2_phy0>;
|
phys = <&usb2_phy0 3>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 704>, <&cpg 703>;
|
resets = <&cpg 704>, <&cpg 703>;
|
||||||
@ -794,8 +825,8 @@
|
|||||||
compatible = "renesas,r8a7796-usb-dmac",
|
compatible = "renesas,r8a7796-usb-dmac",
|
||||||
"renesas,usb-dmac";
|
"renesas,usb-dmac";
|
||||||
reg = <0 0xe65a0000 0 0x100>;
|
reg = <0 0xe65a0000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "ch0", "ch1";
|
interrupt-names = "ch0", "ch1";
|
||||||
clocks = <&cpg CPG_MOD 330>;
|
clocks = <&cpg CPG_MOD 330>;
|
||||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||||
@ -808,8 +839,8 @@
|
|||||||
compatible = "renesas,r8a7796-usb-dmac",
|
compatible = "renesas,r8a7796-usb-dmac",
|
||||||
"renesas,usb-dmac";
|
"renesas,usb-dmac";
|
||||||
reg = <0 0xe65b0000 0 0x100>;
|
reg = <0 0xe65b0000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "ch0", "ch1";
|
interrupt-names = "ch0", "ch1";
|
||||||
clocks = <&cpg CPG_MOD 331>;
|
clocks = <&cpg CPG_MOD 331>;
|
||||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||||
@ -835,23 +866,23 @@
|
|||||||
compatible = "renesas,dmac-r8a7796",
|
compatible = "renesas,dmac-r8a7796",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xe6700000 0 0x10000>;
|
reg = <0 0xe6700000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7",
|
"ch4", "ch5", "ch6", "ch7",
|
||||||
@ -877,23 +908,23 @@
|
|||||||
compatible = "renesas,dmac-r8a7796",
|
compatible = "renesas,dmac-r8a7796",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xe7300000 0 0x10000>;
|
reg = <0 0xe7300000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7",
|
"ch4", "ch5", "ch6", "ch7",
|
||||||
@ -919,23 +950,23 @@
|
|||||||
compatible = "renesas,dmac-r8a7796",
|
compatible = "renesas,dmac-r8a7796",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xe7310000 0 0x10000>;
|
reg = <0 0xe7310000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7",
|
"ch4", "ch5", "ch6", "ch7",
|
||||||
@ -1319,6 +1350,17 @@
|
|||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
tpu: pwm@e6e80000 {
|
||||||
|
compatible = "renesas,tpu-r8a7796", "renesas,tpu";
|
||||||
|
reg = <0 0xe6e80000 0 0x148>;
|
||||||
|
interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&cpg CPG_MOD 304>;
|
||||||
|
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||||
|
resets = <&cpg 304>;
|
||||||
|
#pwm-cells = <3>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
msiof0: spi@e6e90000 {
|
msiof0: spi@e6e90000 {
|
||||||
compatible = "renesas,msiof-r8a7796",
|
compatible = "renesas,msiof-r8a7796",
|
||||||
"renesas,rcar-gen3-msiof";
|
"renesas,rcar-gen3-msiof";
|
||||||
@ -1819,6 +1861,17 @@
|
|||||||
"ssi.1", "ssi.0";
|
"ssi.1", "ssi.0";
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
|
|
||||||
|
rcar_sound,ctu {
|
||||||
|
ctu00: ctu-0 { };
|
||||||
|
ctu01: ctu-1 { };
|
||||||
|
ctu02: ctu-2 { };
|
||||||
|
ctu03: ctu-3 { };
|
||||||
|
ctu10: ctu-4 { };
|
||||||
|
ctu11: ctu-5 { };
|
||||||
|
ctu12: ctu-6 { };
|
||||||
|
ctu13: ctu-7 { };
|
||||||
|
};
|
||||||
|
|
||||||
rcar_sound,dvc {
|
rcar_sound,dvc {
|
||||||
dvc0: dvc-0 {
|
dvc0: dvc-0 {
|
||||||
dmas = <&audma1 0xbc>;
|
dmas = <&audma1 0xbc>;
|
||||||
@ -1835,17 +1888,6 @@
|
|||||||
mix1: mix-1 { };
|
mix1: mix-1 { };
|
||||||
};
|
};
|
||||||
|
|
||||||
rcar_sound,ctu {
|
|
||||||
ctu00: ctu-0 { };
|
|
||||||
ctu01: ctu-1 { };
|
|
||||||
ctu02: ctu-2 { };
|
|
||||||
ctu03: ctu-3 { };
|
|
||||||
ctu10: ctu-4 { };
|
|
||||||
ctu11: ctu-5 { };
|
|
||||||
ctu12: ctu-6 { };
|
|
||||||
ctu13: ctu-7 { };
|
|
||||||
};
|
|
||||||
|
|
||||||
rcar_sound,src {
|
rcar_sound,src {
|
||||||
src0: src-0 {
|
src0: src-0 {
|
||||||
interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
@ -1899,6 +1941,59 @@
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
rcar_sound,ssi {
|
||||||
|
ssi0: ssi-0 {
|
||||||
|
interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
dmas = <&audma0 0x01>, <&audma1 0x02>;
|
||||||
|
dma-names = "rx", "tx";
|
||||||
|
};
|
||||||
|
ssi1: ssi-1 {
|
||||||
|
interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
dmas = <&audma0 0x03>, <&audma1 0x04>;
|
||||||
|
dma-names = "rx", "tx";
|
||||||
|
};
|
||||||
|
ssi2: ssi-2 {
|
||||||
|
interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
dmas = <&audma0 0x05>, <&audma1 0x06>;
|
||||||
|
dma-names = "rx", "tx";
|
||||||
|
};
|
||||||
|
ssi3: ssi-3 {
|
||||||
|
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
dmas = <&audma0 0x07>, <&audma1 0x08>;
|
||||||
|
dma-names = "rx", "tx";
|
||||||
|
};
|
||||||
|
ssi4: ssi-4 {
|
||||||
|
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
dmas = <&audma0 0x09>, <&audma1 0x0a>;
|
||||||
|
dma-names = "rx", "tx";
|
||||||
|
};
|
||||||
|
ssi5: ssi-5 {
|
||||||
|
interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
dmas = <&audma0 0x0b>, <&audma1 0x0c>;
|
||||||
|
dma-names = "rx", "tx";
|
||||||
|
};
|
||||||
|
ssi6: ssi-6 {
|
||||||
|
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
dmas = <&audma0 0x0d>, <&audma1 0x0e>;
|
||||||
|
dma-names = "rx", "tx";
|
||||||
|
};
|
||||||
|
ssi7: ssi-7 {
|
||||||
|
interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
dmas = <&audma0 0x0f>, <&audma1 0x10>;
|
||||||
|
dma-names = "rx", "tx";
|
||||||
|
};
|
||||||
|
ssi8: ssi-8 {
|
||||||
|
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
dmas = <&audma0 0x11>, <&audma1 0x12>;
|
||||||
|
dma-names = "rx", "tx";
|
||||||
|
};
|
||||||
|
ssi9: ssi-9 {
|
||||||
|
interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
dmas = <&audma0 0x13>, <&audma1 0x14>;
|
||||||
|
dma-names = "rx", "tx";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
rcar_sound,ssiu {
|
rcar_sound,ssiu {
|
||||||
ssiu00: ssiu-0 {
|
ssiu00: ssiu-0 {
|
||||||
dmas = <&audma0 0x15>, <&audma1 0x16>;
|
dmas = <&audma0 0x15>, <&audma1 0x16>;
|
||||||
@ -2109,82 +2204,29 @@
|
|||||||
dma-names = "rx", "tx";
|
dma-names = "rx", "tx";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
rcar_sound,ssi {
|
|
||||||
ssi0: ssi-0 {
|
|
||||||
interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
|
|
||||||
dmas = <&audma0 0x01>, <&audma1 0x02>;
|
|
||||||
dma-names = "rx", "tx";
|
|
||||||
};
|
|
||||||
ssi1: ssi-1 {
|
|
||||||
interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
|
|
||||||
dmas = <&audma0 0x03>, <&audma1 0x04>;
|
|
||||||
dma-names = "rx", "tx";
|
|
||||||
};
|
|
||||||
ssi2: ssi-2 {
|
|
||||||
interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
|
|
||||||
dmas = <&audma0 0x05>, <&audma1 0x06>;
|
|
||||||
dma-names = "rx", "tx";
|
|
||||||
};
|
|
||||||
ssi3: ssi-3 {
|
|
||||||
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
|
|
||||||
dmas = <&audma0 0x07>, <&audma1 0x08>;
|
|
||||||
dma-names = "rx", "tx";
|
|
||||||
};
|
|
||||||
ssi4: ssi-4 {
|
|
||||||
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
|
|
||||||
dmas = <&audma0 0x09>, <&audma1 0x0a>;
|
|
||||||
dma-names = "rx", "tx";
|
|
||||||
};
|
|
||||||
ssi5: ssi-5 {
|
|
||||||
interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
|
|
||||||
dmas = <&audma0 0x0b>, <&audma1 0x0c>;
|
|
||||||
dma-names = "rx", "tx";
|
|
||||||
};
|
|
||||||
ssi6: ssi-6 {
|
|
||||||
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
|
|
||||||
dmas = <&audma0 0x0d>, <&audma1 0x0e>;
|
|
||||||
dma-names = "rx", "tx";
|
|
||||||
};
|
|
||||||
ssi7: ssi-7 {
|
|
||||||
interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
|
|
||||||
dmas = <&audma0 0x0f>, <&audma1 0x10>;
|
|
||||||
dma-names = "rx", "tx";
|
|
||||||
};
|
|
||||||
ssi8: ssi-8 {
|
|
||||||
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
|
|
||||||
dmas = <&audma0 0x11>, <&audma1 0x12>;
|
|
||||||
dma-names = "rx", "tx";
|
|
||||||
};
|
|
||||||
ssi9: ssi-9 {
|
|
||||||
interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
|
|
||||||
dmas = <&audma0 0x13>, <&audma1 0x14>;
|
|
||||||
dma-names = "rx", "tx";
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
};
|
||||||
|
|
||||||
audma0: dma-controller@ec700000 {
|
audma0: dma-controller@ec700000 {
|
||||||
compatible = "renesas,dmac-r8a7796",
|
compatible = "renesas,dmac-r8a7796",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xec700000 0 0x10000>;
|
reg = <0 0xec700000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7",
|
"ch4", "ch5", "ch6", "ch7",
|
||||||
@ -2210,23 +2252,23 @@
|
|||||||
compatible = "renesas,dmac-r8a7796",
|
compatible = "renesas,dmac-r8a7796",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xec720000 0 0x10000>;
|
reg = <0 0xec720000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7",
|
"ch4", "ch5", "ch6", "ch7",
|
||||||
@ -2275,7 +2317,7 @@
|
|||||||
reg = <0 0xee080000 0 0x100>;
|
reg = <0 0xee080000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||||
phys = <&usb2_phy0>;
|
phys = <&usb2_phy0 1>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 703>, <&cpg 704>;
|
resets = <&cpg 703>, <&cpg 704>;
|
||||||
@ -2287,7 +2329,7 @@
|
|||||||
reg = <0 0xee0a0000 0 0x100>;
|
reg = <0 0xee0a0000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 702>;
|
clocks = <&cpg CPG_MOD 702>;
|
||||||
phys = <&usb2_phy1>;
|
phys = <&usb2_phy1 1>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 702>;
|
resets = <&cpg 702>;
|
||||||
@ -2299,7 +2341,7 @@
|
|||||||
reg = <0 0xee080100 0 0x100>;
|
reg = <0 0xee080100 0 0x100>;
|
||||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||||
phys = <&usb2_phy0>;
|
phys = <&usb2_phy0 2>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
companion = <&ohci0>;
|
companion = <&ohci0>;
|
||||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||||
@ -2312,7 +2354,7 @@
|
|||||||
reg = <0 0xee0a0100 0 0x100>;
|
reg = <0 0xee0a0100 0 0x100>;
|
||||||
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 702>;
|
clocks = <&cpg CPG_MOD 702>;
|
||||||
phys = <&usb2_phy1>;
|
phys = <&usb2_phy1 2>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
companion = <&ohci1>;
|
companion = <&ohci1>;
|
||||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||||
@ -2328,7 +2370,7 @@
|
|||||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 703>, <&cpg 704>;
|
resets = <&cpg 703>, <&cpg 704>;
|
||||||
#phy-cells = <0>;
|
#phy-cells = <1>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -2339,7 +2381,7 @@
|
|||||||
clocks = <&cpg CPG_MOD 702>;
|
clocks = <&cpg CPG_MOD 702>;
|
||||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 702>;
|
resets = <&cpg 702>;
|
||||||
#phy-cells = <0>;
|
#phy-cells = <1>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -2352,6 +2394,7 @@
|
|||||||
max-frequency = <200000000>;
|
max-frequency = <200000000>;
|
||||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 314>;
|
resets = <&cpg 314>;
|
||||||
|
iommus = <&ipmmu_ds1 32>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -2364,6 +2407,7 @@
|
|||||||
max-frequency = <200000000>;
|
max-frequency = <200000000>;
|
||||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 313>;
|
resets = <&cpg 313>;
|
||||||
|
iommus = <&ipmmu_ds1 33>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -2376,6 +2420,7 @@
|
|||||||
max-frequency = <200000000>;
|
max-frequency = <200000000>;
|
||||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 312>;
|
resets = <&cpg 312>;
|
||||||
|
iommus = <&ipmmu_ds1 34>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -2388,6 +2433,7 @@
|
|||||||
max-frequency = <200000000>;
|
max-frequency = <200000000>;
|
||||||
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 311>;
|
resets = <&cpg 311>;
|
||||||
|
iommus = <&ipmmu_ds1 35>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -2416,10 +2462,10 @@
|
|||||||
#size-cells = <2>;
|
#size-cells = <2>;
|
||||||
bus-range = <0x00 0xff>;
|
bus-range = <0x00 0xff>;
|
||||||
device_type = "pci";
|
device_type = "pci";
|
||||||
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
|
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
|
||||||
0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
|
<0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
|
||||||
0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
|
<0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
|
||||||
0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
|
<0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
|
||||||
/* Map all possible DDR as inbound ranges */
|
/* Map all possible DDR as inbound ranges */
|
||||||
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
|
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
|
||||||
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
|
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
@ -2443,10 +2489,10 @@
|
|||||||
#size-cells = <2>;
|
#size-cells = <2>;
|
||||||
bus-range = <0x00 0xff>;
|
bus-range = <0x00 0xff>;
|
||||||
device_type = "pci";
|
device_type = "pci";
|
||||||
ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
|
ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
|
||||||
0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
|
<0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
|
||||||
0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
|
<0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
|
||||||
0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
|
<0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
|
||||||
/* Map all possible DDR as inbound ranges */
|
/* Map all possible DDR as inbound ranges */
|
||||||
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
|
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
|
||||||
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
|
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
@ -2599,6 +2645,33 @@
|
|||||||
renesas,fcp = <&fcpvi0>;
|
renesas,fcp = <&fcpvi0>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
cmm0: cmm@fea40000 {
|
||||||
|
compatible = "renesas,r8a7796-cmm",
|
||||||
|
"renesas,rcar-gen3-cmm";
|
||||||
|
reg = <0 0xfea40000 0 0x1000>;
|
||||||
|
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||||
|
clocks = <&cpg CPG_MOD 711>;
|
||||||
|
resets = <&cpg 711>;
|
||||||
|
};
|
||||||
|
|
||||||
|
cmm1: cmm@fea50000 {
|
||||||
|
compatible = "renesas,r8a7796-cmm",
|
||||||
|
"renesas,rcar-gen3-cmm";
|
||||||
|
reg = <0 0xfea50000 0 0x1000>;
|
||||||
|
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||||
|
clocks = <&cpg CPG_MOD 710>;
|
||||||
|
resets = <&cpg 710>;
|
||||||
|
};
|
||||||
|
|
||||||
|
cmm2: cmm@fea60000 {
|
||||||
|
compatible = "renesas,r8a7796-cmm",
|
||||||
|
"renesas,rcar-gen3-cmm";
|
||||||
|
reg = <0 0xfea60000 0 0x1000>;
|
||||||
|
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
|
||||||
|
clocks = <&cpg CPG_MOD 709>;
|
||||||
|
resets = <&cpg 709>;
|
||||||
|
};
|
||||||
|
|
||||||
csi20: csi2@fea80000 {
|
csi20: csi2@fea80000 {
|
||||||
compatible = "renesas,r8a7796-csi2";
|
compatible = "renesas,r8a7796-csi2";
|
||||||
reg = <0 0xfea80000 0 0x10000>;
|
reg = <0 0xfea80000 0 0x10000>;
|
||||||
@ -2749,9 +2822,11 @@
|
|||||||
<&cpg CPG_MOD 723>,
|
<&cpg CPG_MOD 723>,
|
||||||
<&cpg CPG_MOD 722>;
|
<&cpg CPG_MOD 722>;
|
||||||
clock-names = "du.0", "du.1", "du.2";
|
clock-names = "du.0", "du.1", "du.2";
|
||||||
status = "disabled";
|
|
||||||
|
|
||||||
vsps = <&vspd0 &vspd1 &vspd2>;
|
renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>;
|
||||||
|
vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
|
||||||
|
|
||||||
|
status = "disabled";
|
||||||
|
|
||||||
ports {
|
ports {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
@ -2814,78 +2889,63 @@
|
|||||||
polling-delay-passive = <250>;
|
polling-delay-passive = <250>;
|
||||||
polling-delay = <1000>;
|
polling-delay = <1000>;
|
||||||
thermal-sensors = <&tsc 0>;
|
thermal-sensors = <&tsc 0>;
|
||||||
|
sustainable-power = <3874>;
|
||||||
|
|
||||||
trips {
|
trips {
|
||||||
sensor1_passive: sensor1-passive {
|
|
||||||
temperature = <95000>;
|
|
||||||
hysteresis = <1000>;
|
|
||||||
type = "passive";
|
|
||||||
};
|
|
||||||
sensor1_crit: sensor1-crit {
|
sensor1_crit: sensor1-crit {
|
||||||
temperature = <120000>;
|
temperature = <120000>;
|
||||||
hysteresis = <1000>;
|
hysteresis = <1000>;
|
||||||
type = "critical";
|
type = "critical";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
cooling-maps {
|
|
||||||
map0 {
|
|
||||||
trip = <&sensor1_passive>;
|
|
||||||
cooling-device = <&a57_0 5 5>, <&a57_1 5 5>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
};
|
||||||
|
|
||||||
sensor_thermal2: sensor-thermal2 {
|
sensor_thermal2: sensor-thermal2 {
|
||||||
polling-delay-passive = <250>;
|
polling-delay-passive = <250>;
|
||||||
polling-delay = <1000>;
|
polling-delay = <1000>;
|
||||||
thermal-sensors = <&tsc 1>;
|
thermal-sensors = <&tsc 1>;
|
||||||
|
sustainable-power = <3874>;
|
||||||
|
|
||||||
trips {
|
trips {
|
||||||
sensor2_passive: sensor2-passive {
|
|
||||||
temperature = <95000>;
|
|
||||||
hysteresis = <1000>;
|
|
||||||
type = "passive";
|
|
||||||
};
|
|
||||||
sensor2_crit: sensor2-crit {
|
sensor2_crit: sensor2-crit {
|
||||||
temperature = <120000>;
|
temperature = <120000>;
|
||||||
hysteresis = <1000>;
|
hysteresis = <1000>;
|
||||||
type = "critical";
|
type = "critical";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
cooling-maps {
|
|
||||||
map0 {
|
|
||||||
trip = <&sensor2_passive>;
|
|
||||||
cooling-device = <&a57_0 5 5>, <&a57_1 5 5>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
};
|
||||||
|
|
||||||
sensor_thermal3: sensor-thermal3 {
|
sensor_thermal3: sensor-thermal3 {
|
||||||
polling-delay-passive = <250>;
|
polling-delay-passive = <250>;
|
||||||
polling-delay = <1000>;
|
polling-delay = <1000>;
|
||||||
thermal-sensors = <&tsc 2>;
|
thermal-sensors = <&tsc 2>;
|
||||||
|
sustainable-power = <3874>;
|
||||||
|
|
||||||
|
cooling-maps {
|
||||||
|
map0 {
|
||||||
|
trip = <&target>;
|
||||||
|
cooling-device = <&a57_0 2 4>;
|
||||||
|
contribution = <1024>;
|
||||||
|
};
|
||||||
|
map1 {
|
||||||
|
trip = <&target>;
|
||||||
|
cooling-device = <&a53_0 0 2>;
|
||||||
|
contribution = <1024>;
|
||||||
|
};
|
||||||
|
};
|
||||||
trips {
|
trips {
|
||||||
sensor3_passive: sensor3-passive {
|
target: trip-point1 {
|
||||||
temperature = <95000>;
|
temperature = <100000>;
|
||||||
hysteresis = <1000>;
|
hysteresis = <1000>;
|
||||||
type = "passive";
|
type = "passive";
|
||||||
};
|
};
|
||||||
|
|
||||||
sensor3_crit: sensor3-crit {
|
sensor3_crit: sensor3-crit {
|
||||||
temperature = <120000>;
|
temperature = <120000>;
|
||||||
hysteresis = <1000>;
|
hysteresis = <1000>;
|
||||||
type = "critical";
|
type = "critical";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
cooling-maps {
|
|
||||||
map0 {
|
|
||||||
trip = <&sensor3_passive>;
|
|
||||||
cooling-device = <&a57_0 5 5>, <&a57_1 5 5>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -41,9 +41,37 @@
|
|||||||
remote-endpoint = <&hdmi0_con>;
|
remote-endpoint = <&hdmi0_con>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
port@2 {
|
||||||
|
reg = <2>;
|
||||||
|
dw_hdmi0_snd_in: endpoint {
|
||||||
|
remote-endpoint = <&rsnd_endpoint1>;
|
||||||
|
};
|
||||||
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
&hdmi0_con {
|
&hdmi0_con {
|
||||||
remote-endpoint = <&rcar_dw_hdmi0_out>;
|
remote-endpoint = <&rcar_dw_hdmi0_out>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&rcar_sound {
|
||||||
|
ports {
|
||||||
|
rsnd_port1: port@1 {
|
||||||
|
reg = <1>;
|
||||||
|
rsnd_endpoint1: endpoint {
|
||||||
|
remote-endpoint = <&dw_hdmi0_snd_in>;
|
||||||
|
|
||||||
|
dai-format = "i2s";
|
||||||
|
bitclock-master = <&rsnd_endpoint1>;
|
||||||
|
frame-master = <&rsnd_endpoint1>;
|
||||||
|
|
||||||
|
playback = <&ssi2>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&sound_card {
|
||||||
|
dais = <&rsnd_port0 /* ak4613 */
|
||||||
|
&rsnd_port1>; /* HDMI0 */
|
||||||
|
};
|
||||||
|
|||||||
@ -5,7 +5,7 @@
|
|||||||
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "r8a77965-m3nulcb.dts"
|
#include "r8a77965-ulcb.dts"
|
||||||
#include "r8a77965-u-boot.dtsi"
|
#include "r8a77965-u-boot.dtsi"
|
||||||
|
|
||||||
/ {
|
/ {
|
||||||
@ -111,6 +111,8 @@
|
|||||||
power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
|
power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
|
||||||
next-level-cache = <&L2_CA57>;
|
next-level-cache = <&L2_CA57>;
|
||||||
enable-method = "psci";
|
enable-method = "psci";
|
||||||
|
#cooling-cells = <2>;
|
||||||
|
dynamic-power-coefficient = <854>;
|
||||||
clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
|
clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
|
||||||
operating-points-v2 = <&cluster0_opp>;
|
operating-points-v2 = <&cluster0_opp>;
|
||||||
};
|
};
|
||||||
@ -427,12 +429,12 @@
|
|||||||
#interrupt-cells = <2>;
|
#interrupt-cells = <2>;
|
||||||
interrupt-controller;
|
interrupt-controller;
|
||||||
reg = <0 0xe61c0000 0 0x200>;
|
reg = <0 0xe61c0000 0 0x200>;
|
||||||
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 407>;
|
clocks = <&cpg CPG_MOD 407>;
|
||||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 407>;
|
resets = <&cpg 407>;
|
||||||
@ -667,7 +669,7 @@
|
|||||||
<&usb_dmac1 0>, <&usb_dmac1 1>;
|
<&usb_dmac1 0>, <&usb_dmac1 1>;
|
||||||
dma-names = "ch0", "ch1", "ch2", "ch3";
|
dma-names = "ch0", "ch1", "ch2", "ch3";
|
||||||
renesas,buswait = <11>;
|
renesas,buswait = <11>;
|
||||||
phys = <&usb2_phy0>;
|
phys = <&usb2_phy0 3>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 704>, <&cpg 703>;
|
resets = <&cpg 704>, <&cpg 703>;
|
||||||
@ -678,8 +680,8 @@
|
|||||||
compatible = "renesas,r8a77965-usb-dmac",
|
compatible = "renesas,r8a77965-usb-dmac",
|
||||||
"renesas,usb-dmac";
|
"renesas,usb-dmac";
|
||||||
reg = <0 0xe65a0000 0 0x100>;
|
reg = <0 0xe65a0000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "ch0", "ch1";
|
interrupt-names = "ch0", "ch1";
|
||||||
clocks = <&cpg CPG_MOD 330>;
|
clocks = <&cpg CPG_MOD 330>;
|
||||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||||
@ -692,8 +694,8 @@
|
|||||||
compatible = "renesas,r8a77965-usb-dmac",
|
compatible = "renesas,r8a77965-usb-dmac",
|
||||||
"renesas,usb-dmac";
|
"renesas,usb-dmac";
|
||||||
reg = <0 0xe65b0000 0 0x100>;
|
reg = <0 0xe65b0000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "ch0", "ch1";
|
interrupt-names = "ch0", "ch1";
|
||||||
clocks = <&cpg CPG_MOD 331>;
|
clocks = <&cpg CPG_MOD 331>;
|
||||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||||
@ -719,23 +721,23 @@
|
|||||||
compatible = "renesas,dmac-r8a77965",
|
compatible = "renesas,dmac-r8a77965",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xe6700000 0 0x10000>;
|
reg = <0 0xe6700000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7",
|
"ch4", "ch5", "ch6", "ch7",
|
||||||
@ -761,23 +763,23 @@
|
|||||||
compatible = "renesas,dmac-r8a77965",
|
compatible = "renesas,dmac-r8a77965",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xe7300000 0 0x10000>;
|
reg = <0 0xe7300000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7",
|
"ch4", "ch5", "ch6", "ch7",
|
||||||
@ -803,23 +805,23 @@
|
|||||||
compatible = "renesas,dmac-r8a77965",
|
compatible = "renesas,dmac-r8a77965",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xe7310000 0 0x10000>;
|
reg = <0 0xe7310000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7",
|
"ch4", "ch5", "ch6", "ch7",
|
||||||
@ -1195,6 +1197,17 @@
|
|||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
tpu: pwm@e6e80000 {
|
||||||
|
compatible = "renesas,tpu-r8a77965", "renesas,tpu";
|
||||||
|
reg = <0 0xe6e80000 0 0x148>;
|
||||||
|
interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&cpg CPG_MOD 304>;
|
||||||
|
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||||
|
resets = <&cpg 304>;
|
||||||
|
#pwm-cells = <3>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
msiof0: spi@e6e90000 {
|
msiof0: spi@e6e90000 {
|
||||||
compatible = "renesas,msiof-r8a77965",
|
compatible = "renesas,msiof-r8a77965",
|
||||||
"renesas,rcar-gen3-msiof";
|
"renesas,rcar-gen3-msiof";
|
||||||
@ -1924,23 +1937,23 @@
|
|||||||
compatible = "renesas,dmac-r8a77965",
|
compatible = "renesas,dmac-r8a77965",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xec700000 0 0x10000>;
|
reg = <0 0xec700000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7",
|
"ch4", "ch5", "ch6", "ch7",
|
||||||
@ -1958,23 +1971,23 @@
|
|||||||
compatible = "renesas,dmac-r8a77965",
|
compatible = "renesas,dmac-r8a77965",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xec720000 0 0x10000>;
|
reg = <0 0xec720000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7",
|
"ch4", "ch5", "ch6", "ch7",
|
||||||
@ -2015,7 +2028,7 @@
|
|||||||
reg = <0 0xee080000 0 0x100>;
|
reg = <0 0xee080000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||||
phys = <&usb2_phy0>;
|
phys = <&usb2_phy0 1>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 703>, <&cpg 704>;
|
resets = <&cpg 703>, <&cpg 704>;
|
||||||
@ -2027,7 +2040,7 @@
|
|||||||
reg = <0 0xee0a0000 0 0x100>;
|
reg = <0 0xee0a0000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 702>;
|
clocks = <&cpg CPG_MOD 702>;
|
||||||
phys = <&usb2_phy1>;
|
phys = <&usb2_phy1 1>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 702>;
|
resets = <&cpg 702>;
|
||||||
@ -2039,7 +2052,7 @@
|
|||||||
reg = <0 0xee080100 0 0x100>;
|
reg = <0 0xee080100 0 0x100>;
|
||||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||||
phys = <&usb2_phy0>;
|
phys = <&usb2_phy0 2>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
companion = <&ohci0>;
|
companion = <&ohci0>;
|
||||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||||
@ -2052,7 +2065,7 @@
|
|||||||
reg = <0 0xee0a0100 0 0x100>;
|
reg = <0 0xee0a0100 0 0x100>;
|
||||||
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 702>;
|
clocks = <&cpg CPG_MOD 702>;
|
||||||
phys = <&usb2_phy1>;
|
phys = <&usb2_phy1 2>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
companion = <&ohci1>;
|
companion = <&ohci1>;
|
||||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||||
@ -2068,7 +2081,7 @@
|
|||||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 703>, <&cpg 704>;
|
resets = <&cpg 703>, <&cpg 704>;
|
||||||
#phy-cells = <0>;
|
#phy-cells = <1>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -2079,7 +2092,7 @@
|
|||||||
clocks = <&cpg CPG_MOD 702>;
|
clocks = <&cpg CPG_MOD 702>;
|
||||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 702>;
|
resets = <&cpg 702>;
|
||||||
#phy-cells = <0>;
|
#phy-cells = <1>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -2092,6 +2105,7 @@
|
|||||||
max-frequency = <200000000>;
|
max-frequency = <200000000>;
|
||||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 314>;
|
resets = <&cpg 314>;
|
||||||
|
iommus = <&ipmmu_ds1 32>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -2104,6 +2118,7 @@
|
|||||||
max-frequency = <200000000>;
|
max-frequency = <200000000>;
|
||||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 313>;
|
resets = <&cpg 313>;
|
||||||
|
iommus = <&ipmmu_ds1 33>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -2116,6 +2131,7 @@
|
|||||||
max-frequency = <200000000>;
|
max-frequency = <200000000>;
|
||||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 312>;
|
resets = <&cpg 312>;
|
||||||
|
iommus = <&ipmmu_ds1 34>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -2128,6 +2144,7 @@
|
|||||||
max-frequency = <200000000>;
|
max-frequency = <200000000>;
|
||||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 311>;
|
resets = <&cpg 311>;
|
||||||
|
iommus = <&ipmmu_ds1 35>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -2167,10 +2184,10 @@
|
|||||||
#size-cells = <2>;
|
#size-cells = <2>;
|
||||||
bus-range = <0x00 0xff>;
|
bus-range = <0x00 0xff>;
|
||||||
device_type = "pci";
|
device_type = "pci";
|
||||||
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
|
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
|
||||||
0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
|
<0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
|
||||||
0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
|
<0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
|
||||||
0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
|
<0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
|
||||||
/* Map all possible DDR as inbound ranges */
|
/* Map all possible DDR as inbound ranges */
|
||||||
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
|
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
|
||||||
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
|
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
@ -2194,10 +2211,10 @@
|
|||||||
#size-cells = <2>;
|
#size-cells = <2>;
|
||||||
bus-range = <0x00 0xff>;
|
bus-range = <0x00 0xff>;
|
||||||
device_type = "pci";
|
device_type = "pci";
|
||||||
ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
|
ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
|
||||||
0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
|
<0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
|
||||||
0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
|
<0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
|
||||||
0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
|
<0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
|
||||||
/* Map all possible DDR as inbound ranges */
|
/* Map all possible DDR as inbound ranges */
|
||||||
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
|
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
|
||||||
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
|
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
@ -2242,14 +2259,6 @@
|
|||||||
renesas,fcp = <&fcpvb0>;
|
renesas,fcp = <&fcpvb0>;
|
||||||
};
|
};
|
||||||
|
|
||||||
fcpvb0: fcp@fe96f000 {
|
|
||||||
compatible = "renesas,fcpv";
|
|
||||||
reg = <0 0xfe96f000 0 0x200>;
|
|
||||||
clocks = <&cpg CPG_MOD 607>;
|
|
||||||
power-domains = <&sysc R8A77965_PD_A3VP>;
|
|
||||||
resets = <&cpg 607>;
|
|
||||||
};
|
|
||||||
|
|
||||||
vspi0: vsp@fe9a0000 {
|
vspi0: vsp@fe9a0000 {
|
||||||
compatible = "renesas,vsp2";
|
compatible = "renesas,vsp2";
|
||||||
reg = <0 0xfe9a0000 0 0x8000>;
|
reg = <0 0xfe9a0000 0 0x8000>;
|
||||||
@ -2261,14 +2270,6 @@
|
|||||||
renesas,fcp = <&fcpvi0>;
|
renesas,fcp = <&fcpvi0>;
|
||||||
};
|
};
|
||||||
|
|
||||||
fcpvi0: fcp@fe9af000 {
|
|
||||||
compatible = "renesas,fcpv";
|
|
||||||
reg = <0 0xfe9af000 0 0x200>;
|
|
||||||
clocks = <&cpg CPG_MOD 611>;
|
|
||||||
power-domains = <&sysc R8A77965_PD_A3VP>;
|
|
||||||
resets = <&cpg 611>;
|
|
||||||
};
|
|
||||||
|
|
||||||
vspd0: vsp@fea20000 {
|
vspd0: vsp@fea20000 {
|
||||||
compatible = "renesas,vsp2";
|
compatible = "renesas,vsp2";
|
||||||
reg = <0 0xfea20000 0 0x5000>;
|
reg = <0 0xfea20000 0 0x5000>;
|
||||||
@ -2280,14 +2281,6 @@
|
|||||||
renesas,fcp = <&fcpvd0>;
|
renesas,fcp = <&fcpvd0>;
|
||||||
};
|
};
|
||||||
|
|
||||||
fcpvd0: fcp@fea27000 {
|
|
||||||
compatible = "renesas,fcpv";
|
|
||||||
reg = <0 0xfea27000 0 0x200>;
|
|
||||||
clocks = <&cpg CPG_MOD 603>;
|
|
||||||
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
|
||||||
resets = <&cpg 603>;
|
|
||||||
};
|
|
||||||
|
|
||||||
vspd1: vsp@fea28000 {
|
vspd1: vsp@fea28000 {
|
||||||
compatible = "renesas,vsp2";
|
compatible = "renesas,vsp2";
|
||||||
reg = <0 0xfea28000 0 0x5000>;
|
reg = <0 0xfea28000 0 0x5000>;
|
||||||
@ -2299,6 +2292,22 @@
|
|||||||
renesas,fcp = <&fcpvd1>;
|
renesas,fcp = <&fcpvd1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
fcpvb0: fcp@fe96f000 {
|
||||||
|
compatible = "renesas,fcpv";
|
||||||
|
reg = <0 0xfe96f000 0 0x200>;
|
||||||
|
clocks = <&cpg CPG_MOD 607>;
|
||||||
|
power-domains = <&sysc R8A77965_PD_A3VP>;
|
||||||
|
resets = <&cpg 607>;
|
||||||
|
};
|
||||||
|
|
||||||
|
fcpvd0: fcp@fea27000 {
|
||||||
|
compatible = "renesas,fcpv";
|
||||||
|
reg = <0 0xfea27000 0 0x200>;
|
||||||
|
clocks = <&cpg CPG_MOD 603>;
|
||||||
|
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||||
|
resets = <&cpg 603>;
|
||||||
|
};
|
||||||
|
|
||||||
fcpvd1: fcp@fea2f000 {
|
fcpvd1: fcp@fea2f000 {
|
||||||
compatible = "renesas,fcpv";
|
compatible = "renesas,fcpv";
|
||||||
reg = <0 0xfea2f000 0 0x200>;
|
reg = <0 0xfea2f000 0 0x200>;
|
||||||
@ -2307,6 +2316,41 @@
|
|||||||
resets = <&cpg 602>;
|
resets = <&cpg 602>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
fcpvi0: fcp@fe9af000 {
|
||||||
|
compatible = "renesas,fcpv";
|
||||||
|
reg = <0 0xfe9af000 0 0x200>;
|
||||||
|
clocks = <&cpg CPG_MOD 611>;
|
||||||
|
power-domains = <&sysc R8A77965_PD_A3VP>;
|
||||||
|
resets = <&cpg 611>;
|
||||||
|
};
|
||||||
|
|
||||||
|
cmm0: cmm@fea40000 {
|
||||||
|
compatible = "renesas,r8a77965-cmm",
|
||||||
|
"renesas,rcar-gen3-cmm";
|
||||||
|
reg = <0 0xfea40000 0 0x1000>;
|
||||||
|
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||||
|
clocks = <&cpg CPG_MOD 711>;
|
||||||
|
resets = <&cpg 711>;
|
||||||
|
};
|
||||||
|
|
||||||
|
cmm1: cmm@fea50000 {
|
||||||
|
compatible = "renesas,r8a77965-cmm",
|
||||||
|
"renesas,rcar-gen3-cmm";
|
||||||
|
reg = <0 0xfea50000 0 0x1000>;
|
||||||
|
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||||
|
clocks = <&cpg CPG_MOD 710>;
|
||||||
|
resets = <&cpg 710>;
|
||||||
|
};
|
||||||
|
|
||||||
|
cmm3: cmm@fea70000 {
|
||||||
|
compatible = "renesas,r8a77965-cmm",
|
||||||
|
"renesas,rcar-gen3-cmm";
|
||||||
|
reg = <0 0xfea70000 0 0x1000>;
|
||||||
|
power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
|
||||||
|
clocks = <&cpg CPG_MOD 708>;
|
||||||
|
resets = <&cpg 708>;
|
||||||
|
};
|
||||||
|
|
||||||
csi20: csi2@fea80000 {
|
csi20: csi2@fea80000 {
|
||||||
compatible = "renesas,r8a77965-csi2";
|
compatible = "renesas,r8a77965-csi2";
|
||||||
reg = <0 0xfea80000 0 0x10000>;
|
reg = <0 0xfea80000 0 0x10000>;
|
||||||
@ -2454,9 +2498,11 @@
|
|||||||
<&cpg CPG_MOD 723>,
|
<&cpg CPG_MOD 723>,
|
||||||
<&cpg CPG_MOD 721>;
|
<&cpg CPG_MOD 721>;
|
||||||
clock-names = "du.0", "du.1", "du.3";
|
clock-names = "du.0", "du.1", "du.3";
|
||||||
status = "disabled";
|
|
||||||
|
|
||||||
vsps = <&vspd0 0 &vspd1 0 &vspd0 1>;
|
renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>;
|
||||||
|
vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
|
||||||
|
|
||||||
|
status = "disabled";
|
||||||
|
|
||||||
ports {
|
ports {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
@ -2519,6 +2565,7 @@
|
|||||||
polling-delay-passive = <250>;
|
polling-delay-passive = <250>;
|
||||||
polling-delay = <1000>;
|
polling-delay = <1000>;
|
||||||
thermal-sensors = <&tsc 0>;
|
thermal-sensors = <&tsc 0>;
|
||||||
|
sustainable-power = <2439>;
|
||||||
|
|
||||||
trips {
|
trips {
|
||||||
sensor1_crit: sensor1-crit {
|
sensor1_crit: sensor1-crit {
|
||||||
@ -2533,6 +2580,7 @@
|
|||||||
polling-delay-passive = <250>;
|
polling-delay-passive = <250>;
|
||||||
polling-delay = <1000>;
|
polling-delay = <1000>;
|
||||||
thermal-sensors = <&tsc 1>;
|
thermal-sensors = <&tsc 1>;
|
||||||
|
sustainable-power = <2439>;
|
||||||
|
|
||||||
trips {
|
trips {
|
||||||
sensor2_crit: sensor2-crit {
|
sensor2_crit: sensor2-crit {
|
||||||
@ -2547,14 +2595,30 @@
|
|||||||
polling-delay-passive = <250>;
|
polling-delay-passive = <250>;
|
||||||
polling-delay = <1000>;
|
polling-delay = <1000>;
|
||||||
thermal-sensors = <&tsc 2>;
|
thermal-sensors = <&tsc 2>;
|
||||||
|
sustainable-power = <2439>;
|
||||||
|
|
||||||
trips {
|
trips {
|
||||||
|
target: trip-point1 {
|
||||||
|
/* miliCelsius */
|
||||||
|
temperature = <100000>;
|
||||||
|
hysteresis = <1000>;
|
||||||
|
type = "passive";
|
||||||
|
};
|
||||||
|
|
||||||
sensor3_crit: sensor3-crit {
|
sensor3_crit: sensor3-crit {
|
||||||
temperature = <120000>;
|
temperature = <120000>;
|
||||||
hysteresis = <1000>;
|
hysteresis = <1000>;
|
||||||
type = "critical";
|
type = "critical";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
cooling-maps {
|
||||||
|
map0 {
|
||||||
|
trip = <&target>;
|
||||||
|
cooling-device = <&a57_0 2 4>;
|
||||||
|
contribution = <1024>;
|
||||||
|
};
|
||||||
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
@ -19,14 +19,17 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
chosen {
|
chosen {
|
||||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
|
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
|
||||||
stdout-path = "serial0:115200n8";
|
stdout-path = "serial0:115200n8";
|
||||||
};
|
};
|
||||||
|
|
||||||
memory@48000000 {
|
d3p3: regulator-fixed {
|
||||||
device_type = "memory";
|
compatible = "regulator-fixed";
|
||||||
/* first 128MB is reserved for secure area. */
|
regulator-name = "fixed-3.3V";
|
||||||
reg = <0x0 0x48000000 0x0 0x38000000>;
|
regulator-min-microvolt = <3300000>;
|
||||||
|
regulator-max-microvolt = <3300000>;
|
||||||
|
regulator-boot-on;
|
||||||
|
regulator-always-on;
|
||||||
};
|
};
|
||||||
|
|
||||||
hdmi-out {
|
hdmi-out {
|
||||||
@ -40,15 +43,6 @@
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
d3p3: regulator-fixed {
|
|
||||||
compatible = "regulator-fixed";
|
|
||||||
regulator-name = "fixed-3.3V";
|
|
||||||
regulator-min-microvolt = <3300000>;
|
|
||||||
regulator-max-microvolt = <3300000>;
|
|
||||||
regulator-boot-on;
|
|
||||||
regulator-always-on;
|
|
||||||
};
|
|
||||||
|
|
||||||
lvds-decoder {
|
lvds-decoder {
|
||||||
compatible = "thine,thc63lvd1024";
|
compatible = "thine,thc63lvd1024";
|
||||||
|
|
||||||
@ -73,6 +67,12 @@
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
memory@48000000 {
|
||||||
|
device_type = "memory";
|
||||||
|
/* first 128MB is reserved for secure area. */
|
||||||
|
reg = <0x0 0x48000000 0x0 0x38000000>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
&avb {
|
&avb {
|
||||||
@ -102,6 +102,10 @@
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&du {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
&extal_clk {
|
&extal_clk {
|
||||||
clock-frequency = <16666666>;
|
clock-frequency = <16666666>;
|
||||||
};
|
};
|
||||||
@ -157,6 +161,18 @@
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&lvds0 {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
ports {
|
||||||
|
port@1 {
|
||||||
|
lvds0_out: endpoint {
|
||||||
|
remote-endpoint = <&thc63lvd1024_in>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
&pfc {
|
&pfc {
|
||||||
avb_pins: avb0 {
|
avb_pins: avb0 {
|
||||||
groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
|
groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
|
||||||
@ -190,19 +206,3 @@
|
|||||||
|
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
&du {
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&lvds0 {
|
|
||||||
status = "okay";
|
|
||||||
|
|
||||||
ports {
|
|
||||||
port@1 {
|
|
||||||
lvds0_out: endpoint {
|
|
||||||
remote-endpoint = <&thc63lvd1024_in>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|||||||
@ -302,8 +302,8 @@
|
|||||||
|
|
||||||
thermal: thermal@e6190000 {
|
thermal: thermal@e6190000 {
|
||||||
compatible = "renesas,thermal-r8a77970";
|
compatible = "renesas,thermal-r8a77970";
|
||||||
reg = <0 0xe6190000 0 0x10
|
reg = <0 0xe6190000 0 0x10>,
|
||||||
0 0xe6190100 0 0x120>;
|
<0 0xe6190100 0 0x120>;
|
||||||
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
|
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
<GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
|
<GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
<GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
@ -318,12 +318,12 @@
|
|||||||
#interrupt-cells = <2>;
|
#interrupt-cells = <2>;
|
||||||
interrupt-controller;
|
interrupt-controller;
|
||||||
reg = <0 0xe61c0000 0 0x200>;
|
reg = <0 0xe61c0000 0 0x200>;
|
||||||
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 407>;
|
clocks = <&cpg CPG_MOD 407>;
|
||||||
power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 407>;
|
resets = <&cpg 407>;
|
||||||
@ -652,7 +652,7 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
pwm3: pwm@e6e33000 {
|
pwm3: pwm@e6e33000 {
|
||||||
compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar";
|
compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
|
||||||
reg = <0 0xe6e33000 0 8>;
|
reg = <0 0xe6e33000 0 8>;
|
||||||
#pwm-cells = <2>;
|
#pwm-cells = <2>;
|
||||||
clocks = <&cpg CPG_MOD 523>;
|
clocks = <&cpg CPG_MOD 523>;
|
||||||
@ -933,15 +933,15 @@
|
|||||||
compatible = "renesas,dmac-r8a77970",
|
compatible = "renesas,dmac-r8a77970",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xe7300000 0 0x10000>;
|
reg = <0 0xe7300000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7";
|
"ch4", "ch5", "ch6", "ch7";
|
||||||
@ -961,15 +961,15 @@
|
|||||||
compatible = "renesas,dmac-r8a77970",
|
compatible = "renesas,dmac-r8a77970",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xe7310000 0 0x10000>;
|
reg = <0 0xe7310000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7";
|
"ch4", "ch5", "ch6", "ch7";
|
||||||
@ -1035,6 +1035,7 @@
|
|||||||
power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 314>;
|
resets = <&cpg 314>;
|
||||||
max-frequency = <200000000>;
|
max-frequency = <200000000>;
|
||||||
|
iommus = <&ipmmu_ds1 32>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -1120,7 +1121,7 @@
|
|||||||
clock-names = "du.0";
|
clock-names = "du.0";
|
||||||
power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 724>;
|
resets = <&cpg 724>;
|
||||||
vsps = <&vspd0>;
|
vsps = <&vspd0 0>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
|
|
||||||
ports {
|
ports {
|
||||||
@ -1181,6 +1182,9 @@
|
|||||||
polling-delay = <1000>;
|
polling-delay = <1000>;
|
||||||
thermal-sensors = <&thermal>;
|
thermal-sensors = <&thermal>;
|
||||||
|
|
||||||
|
cooling-maps {
|
||||||
|
};
|
||||||
|
|
||||||
trips {
|
trips {
|
||||||
cpu-crit {
|
cpu-crit {
|
||||||
temperature = <120000>;
|
temperature = <120000>;
|
||||||
@ -1188,9 +1192,6 @@
|
|||||||
type = "critical";
|
type = "critical";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
cooling-maps {
|
|
||||||
};
|
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
@ -22,10 +22,13 @@
|
|||||||
stdout-path = "serial0:115200n8";
|
stdout-path = "serial0:115200n8";
|
||||||
};
|
};
|
||||||
|
|
||||||
memory@48000000 {
|
d1_8v: regulator-2 {
|
||||||
device_type = "memory";
|
compatible = "regulator-fixed";
|
||||||
/* first 128MB is reserved for secure area. */
|
regulator-name = "D1.8V";
|
||||||
reg = <0 0x48000000 0 0x78000000>;
|
regulator-min-microvolt = <1800000>;
|
||||||
|
regulator-max-microvolt = <1800000>;
|
||||||
|
regulator-boot-on;
|
||||||
|
regulator-always-on;
|
||||||
};
|
};
|
||||||
|
|
||||||
d3_3v: regulator-0 {
|
d3_3v: regulator-0 {
|
||||||
@ -37,24 +40,6 @@
|
|||||||
regulator-always-on;
|
regulator-always-on;
|
||||||
};
|
};
|
||||||
|
|
||||||
vddq_vin01: regulator-1 {
|
|
||||||
compatible = "regulator-fixed";
|
|
||||||
regulator-name = "VDDQ_VIN01";
|
|
||||||
regulator-min-microvolt = <1800000>;
|
|
||||||
regulator-max-microvolt = <1800000>;
|
|
||||||
regulator-boot-on;
|
|
||||||
regulator-always-on;
|
|
||||||
};
|
|
||||||
|
|
||||||
d1_8v: regulator-2 {
|
|
||||||
compatible = "regulator-fixed";
|
|
||||||
regulator-name = "D1.8V";
|
|
||||||
regulator-min-microvolt = <1800000>;
|
|
||||||
regulator-max-microvolt = <1800000>;
|
|
||||||
regulator-boot-on;
|
|
||||||
regulator-always-on;
|
|
||||||
};
|
|
||||||
|
|
||||||
hdmi-out {
|
hdmi-out {
|
||||||
compatible = "hdmi-connector";
|
compatible = "hdmi-connector";
|
||||||
type = "a";
|
type = "a";
|
||||||
@ -90,6 +75,21 @@
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
memory@48000000 {
|
||||||
|
device_type = "memory";
|
||||||
|
/* first 128MB is reserved for secure area. */
|
||||||
|
reg = <0 0x48000000 0 0x78000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
vddq_vin01: regulator-1 {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
regulator-name = "VDDQ_VIN01";
|
||||||
|
regulator-min-microvolt = <1800000>;
|
||||||
|
regulator-max-microvolt = <1800000>;
|
||||||
|
regulator-boot-on;
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
x1_clk: x1-clock {
|
x1_clk: x1-clock {
|
||||||
compatible = "fixed-clock";
|
compatible = "fixed-clock";
|
||||||
#clock-cells = <0>;
|
#clock-cells = <0>;
|
||||||
|
|||||||
@ -348,12 +348,12 @@
|
|||||||
#interrupt-cells = <2>;
|
#interrupt-cells = <2>;
|
||||||
interrupt-controller;
|
interrupt-controller;
|
||||||
reg = <0 0xe61c0000 0 0x200>;
|
reg = <0 0xe61c0000 0 0x200>;
|
||||||
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 407>;
|
clocks = <&cpg CPG_MOD 407>;
|
||||||
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 407>;
|
resets = <&cpg 407>;
|
||||||
@ -1174,23 +1174,23 @@
|
|||||||
compatible = "renesas,dmac-r8a77980",
|
compatible = "renesas,dmac-r8a77980",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xe7300000 0 0x10000>;
|
reg = <0 0xe7300000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7",
|
"ch4", "ch5", "ch6", "ch7",
|
||||||
@ -1216,23 +1216,23 @@
|
|||||||
compatible = "renesas,dmac-r8a77980",
|
compatible = "renesas,dmac-r8a77980",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xe7310000 0 0x10000>;
|
reg = <0 0xe7310000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7",
|
"ch4", "ch5", "ch6", "ch7",
|
||||||
@ -1299,9 +1299,9 @@
|
|||||||
#iommu-cells = <1>;
|
#iommu-cells = <1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
ipmmu_vc0: mmu@fe6b0000 {
|
ipmmu_vc0: mmu@fe990000 {
|
||||||
compatible = "renesas,ipmmu-r8a77980";
|
compatible = "renesas,ipmmu-r8a77980";
|
||||||
reg = <0 0xfe6b0000 0 0x1000>;
|
reg = <0 0xfe990000 0 0x1000>;
|
||||||
renesas,ipmmu-main = <&ipmmu_mm 12>;
|
renesas,ipmmu-main = <&ipmmu_mm 12>;
|
||||||
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
|
||||||
#iommu-cells = <1>;
|
#iommu-cells = <1>;
|
||||||
@ -1338,6 +1338,7 @@
|
|||||||
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 314>;
|
resets = <&cpg 314>;
|
||||||
max-frequency = <200000000>;
|
max-frequency = <200000000>;
|
||||||
|
iommus = <&ipmmu_ds1 32>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -1366,21 +1367,17 @@
|
|||||||
#size-cells = <2>;
|
#size-cells = <2>;
|
||||||
bus-range = <0x00 0xff>;
|
bus-range = <0x00 0xff>;
|
||||||
device_type = "pci";
|
device_type = "pci";
|
||||||
ranges = <
|
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x0100000>,
|
||||||
0x01000000 0 0x00000000 0 0xfe100000 0 0x0100000
|
<0x02000000 0 0xfe200000 0 0xfe200000 0 0x0200000>,
|
||||||
0x02000000 0 0xfe200000 0 0xfe200000 0 0x0200000
|
<0x02000000 0 0x30000000 0 0x30000000 0 0x8000000>,
|
||||||
0x02000000 0 0x30000000 0 0x30000000 0 0x8000000
|
<0x42000000 0 0x38000000 0 0x38000000 0 0x8000000>;
|
||||||
0x42000000 0 0x38000000 0 0x38000000 0 0x8000000
|
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
|
||||||
>;
|
|
||||||
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000
|
|
||||||
0 0x80000000>;
|
|
||||||
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
|
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
<GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
<GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
interrupt-map-mask = <0 0 0 0>;
|
interrupt-map-mask = <0 0 0 0>;
|
||||||
interrupt-map = <0 0 0 0 &gic GIC_SPI 148
|
interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
IRQ_TYPE_LEVEL_HIGH>;
|
|
||||||
clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
|
clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
|
||||||
clock-names = "pcie", "pcie_bus";
|
clock-names = "pcie", "pcie_bus";
|
||||||
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
|
||||||
@ -1495,7 +1492,7 @@
|
|||||||
clock-names = "du.0";
|
clock-names = "du.0";
|
||||||
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 724>;
|
resets = <&cpg 724>;
|
||||||
vsps = <&vspd0>;
|
vsps = <&vspd0 0>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
|
|
||||||
ports {
|
ports {
|
||||||
|
|||||||
@ -19,16 +19,10 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
chosen {
|
chosen {
|
||||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
|
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
|
||||||
stdout-path = "serial0:115200n8";
|
stdout-path = "serial0:115200n8";
|
||||||
};
|
};
|
||||||
|
|
||||||
memory@48000000 {
|
|
||||||
device_type = "memory";
|
|
||||||
/* first 128MB is reserved for secure area. */
|
|
||||||
reg = <0x0 0x48000000 0x0 0x38000000>;
|
|
||||||
};
|
|
||||||
|
|
||||||
audio_clkout: audio-clkout {
|
audio_clkout: audio-clkout {
|
||||||
/*
|
/*
|
||||||
* This is same as <&rcar_sound 0>
|
* This is same as <&rcar_sound 0>
|
||||||
@ -107,6 +101,113 @@
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
memory@48000000 {
|
||||||
|
device_type = "memory";
|
||||||
|
/* first 128MB is reserved for secure area. */
|
||||||
|
reg = <0x0 0x48000000 0x0 0x38000000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
reg_1p8v: regulator0 {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
regulator-name = "fixed-1.8V";
|
||||||
|
regulator-min-microvolt = <1800000>;
|
||||||
|
regulator-max-microvolt = <1800000>;
|
||||||
|
regulator-boot-on;
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
reg_3p3v: regulator1 {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
regulator-name = "fixed-3.3V";
|
||||||
|
regulator-min-microvolt = <3300000>;
|
||||||
|
regulator-max-microvolt = <3300000>;
|
||||||
|
regulator-boot-on;
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
reg_12p0v: regulator2 {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
regulator-name = "D12.0V";
|
||||||
|
regulator-min-microvolt = <12000000>;
|
||||||
|
regulator-max-microvolt = <12000000>;
|
||||||
|
regulator-boot-on;
|
||||||
|
regulator-always-on;
|
||||||
|
};
|
||||||
|
|
||||||
|
rsnd_ak4613: sound {
|
||||||
|
compatible = "simple-audio-card";
|
||||||
|
|
||||||
|
simple-audio-card,name = "rsnd-ak4613";
|
||||||
|
simple-audio-card,format = "left_j";
|
||||||
|
simple-audio-card,bitclock-master = <&sndcpu>;
|
||||||
|
simple-audio-card,frame-master = <&sndcpu>;
|
||||||
|
|
||||||
|
sndcodec: simple-audio-card,codec {
|
||||||
|
sound-dai = <&ak4613>;
|
||||||
|
};
|
||||||
|
|
||||||
|
sndcpu: simple-audio-card,cpu {
|
||||||
|
sound-dai = <&rcar_sound>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
vbus0_usb2: regulator-vbus0-usb2 {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
|
||||||
|
regulator-name = "USB20_VBUS_CN";
|
||||||
|
regulator-min-microvolt = <5000000>;
|
||||||
|
regulator-max-microvolt = <5000000>;
|
||||||
|
|
||||||
|
gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>;
|
||||||
|
enable-active-high;
|
||||||
|
};
|
||||||
|
|
||||||
|
vcc_sdhi0: regulator-vcc-sdhi0 {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
|
||||||
|
regulator-name = "SDHI0 Vcc";
|
||||||
|
regulator-min-microvolt = <3300000>;
|
||||||
|
regulator-max-microvolt = <3300000>;
|
||||||
|
|
||||||
|
gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
|
||||||
|
enable-active-high;
|
||||||
|
};
|
||||||
|
|
||||||
|
vccq_sdhi0: regulator-vccq-sdhi0 {
|
||||||
|
compatible = "regulator-gpio";
|
||||||
|
|
||||||
|
regulator-name = "SDHI0 VccQ";
|
||||||
|
regulator-min-microvolt = <1800000>;
|
||||||
|
regulator-max-microvolt = <3300000>;
|
||||||
|
|
||||||
|
gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
|
||||||
|
gpios-states = <1>;
|
||||||
|
states = <3300000 1>, <1800000 0>;
|
||||||
|
};
|
||||||
|
|
||||||
|
vcc_sdhi1: regulator-vcc-sdhi1 {
|
||||||
|
compatible = "regulator-fixed";
|
||||||
|
|
||||||
|
regulator-name = "SDHI1 Vcc";
|
||||||
|
regulator-min-microvolt = <3300000>;
|
||||||
|
regulator-max-microvolt = <3300000>;
|
||||||
|
|
||||||
|
gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
|
||||||
|
enable-active-high;
|
||||||
|
};
|
||||||
|
|
||||||
|
vccq_sdhi1: regulator-vccq-sdhi1 {
|
||||||
|
compatible = "regulator-gpio";
|
||||||
|
|
||||||
|
regulator-name = "SDHI1 VccQ";
|
||||||
|
regulator-min-microvolt = <1800000>;
|
||||||
|
regulator-max-microvolt = <3300000>;
|
||||||
|
|
||||||
|
gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
|
||||||
|
gpios-states = <1>;
|
||||||
|
states = <3300000 1>, <1800000 0>;
|
||||||
|
};
|
||||||
|
|
||||||
vga {
|
vga {
|
||||||
compatible = "vga-connector";
|
compatible = "vga-connector";
|
||||||
|
|
||||||
@ -139,120 +240,17 @@
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
reg_1p8v: regulator0 {
|
|
||||||
compatible = "regulator-fixed";
|
|
||||||
regulator-name = "fixed-1.8V";
|
|
||||||
regulator-min-microvolt = <1800000>;
|
|
||||||
regulator-max-microvolt = <1800000>;
|
|
||||||
regulator-boot-on;
|
|
||||||
regulator-always-on;
|
|
||||||
};
|
|
||||||
|
|
||||||
reg_3p3v: regulator1 {
|
|
||||||
compatible = "regulator-fixed";
|
|
||||||
regulator-name = "fixed-3.3V";
|
|
||||||
regulator-min-microvolt = <3300000>;
|
|
||||||
regulator-max-microvolt = <3300000>;
|
|
||||||
regulator-boot-on;
|
|
||||||
regulator-always-on;
|
|
||||||
};
|
|
||||||
|
|
||||||
vbus0_usb2: regulator-vbus0-usb2 {
|
|
||||||
compatible = "regulator-fixed";
|
|
||||||
|
|
||||||
regulator-name = "USB20_VBUS_CN";
|
|
||||||
regulator-min-microvolt = <5000000>;
|
|
||||||
regulator-max-microvolt = <5000000>;
|
|
||||||
|
|
||||||
gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>;
|
|
||||||
enable-active-high;
|
|
||||||
};
|
|
||||||
|
|
||||||
rsnd_ak4613: sound {
|
|
||||||
compatible = "simple-audio-card";
|
|
||||||
|
|
||||||
simple-audio-card,name = "rsnd-ak4613";
|
|
||||||
simple-audio-card,format = "left_j";
|
|
||||||
simple-audio-card,bitclock-master = <&sndcpu>;
|
|
||||||
simple-audio-card,frame-master = <&sndcpu>;
|
|
||||||
|
|
||||||
sndcpu: simple-audio-card,cpu {
|
|
||||||
sound-dai = <&rcar_sound>;
|
|
||||||
};
|
|
||||||
|
|
||||||
sndcodec: simple-audio-card,codec {
|
|
||||||
sound-dai = <&ak4613>;
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
x12_clk: x12 {
|
x12_clk: x12 {
|
||||||
compatible = "fixed-clock";
|
compatible = "fixed-clock";
|
||||||
#clock-cells = <0>;
|
#clock-cells = <0>;
|
||||||
clock-frequency = <24576000>;
|
clock-frequency = <24576000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
reg_12p0v: regulator2 {
|
|
||||||
compatible = "regulator-fixed";
|
|
||||||
regulator-name = "D12.0V";
|
|
||||||
regulator-min-microvolt = <12000000>;
|
|
||||||
regulator-max-microvolt = <12000000>;
|
|
||||||
regulator-boot-on;
|
|
||||||
regulator-always-on;
|
|
||||||
};
|
|
||||||
|
|
||||||
x13_clk: x13 {
|
x13_clk: x13 {
|
||||||
compatible = "fixed-clock";
|
compatible = "fixed-clock";
|
||||||
#clock-cells = <0>;
|
#clock-cells = <0>;
|
||||||
clock-frequency = <74250000>;
|
clock-frequency = <74250000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
vcc_sdhi0: regulator-vcc-sdhi0 {
|
|
||||||
compatible = "regulator-fixed";
|
|
||||||
|
|
||||||
regulator-name = "SDHI0 Vcc";
|
|
||||||
regulator-min-microvolt = <3300000>;
|
|
||||||
regulator-max-microvolt = <3300000>;
|
|
||||||
|
|
||||||
gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
|
|
||||||
enable-active-high;
|
|
||||||
};
|
|
||||||
|
|
||||||
vccq_sdhi0: regulator-vccq-sdhi0 {
|
|
||||||
compatible = "regulator-gpio";
|
|
||||||
|
|
||||||
regulator-name = "SDHI0 VccQ";
|
|
||||||
regulator-min-microvolt = <1800000>;
|
|
||||||
regulator-max-microvolt = <3300000>;
|
|
||||||
|
|
||||||
gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
|
|
||||||
gpios-states = <1>;
|
|
||||||
states = <3300000 1
|
|
||||||
1800000 0>;
|
|
||||||
};
|
|
||||||
|
|
||||||
vcc_sdhi1: regulator-vcc-sdhi1 {
|
|
||||||
compatible = "regulator-fixed";
|
|
||||||
|
|
||||||
regulator-name = "SDHI1 Vcc";
|
|
||||||
regulator-min-microvolt = <3300000>;
|
|
||||||
regulator-max-microvolt = <3300000>;
|
|
||||||
|
|
||||||
gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
|
|
||||||
enable-active-high;
|
|
||||||
};
|
|
||||||
|
|
||||||
vccq_sdhi1: regulator-vccq-sdhi1 {
|
|
||||||
compatible = "regulator-gpio";
|
|
||||||
|
|
||||||
regulator-name = "SDHI1 VccQ";
|
|
||||||
regulator-min-microvolt = <1800000>;
|
|
||||||
regulator-max-microvolt = <3300000>;
|
|
||||||
|
|
||||||
gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
|
|
||||||
gpios-states = <1>;
|
|
||||||
states = <3300000 1
|
|
||||||
1800000 0>;
|
|
||||||
};
|
|
||||||
};
|
};
|
||||||
|
|
||||||
&audio_clk_a {
|
&audio_clk_a {
|
||||||
@ -262,7 +260,6 @@
|
|||||||
&avb {
|
&avb {
|
||||||
pinctrl-0 = <&avb_pins>;
|
pinctrl-0 = <&avb_pins>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
renesas,no-ether-link;
|
|
||||||
phy-handle = <&phy0>;
|
phy-handle = <&phy0>;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
||||||
@ -272,6 +269,14 @@
|
|||||||
interrupt-parent = <&gpio2>;
|
interrupt-parent = <&gpio2>;
|
||||||
interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
|
interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
|
||||||
reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
|
reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
|
||||||
|
/*
|
||||||
|
* TX clock internal delay mode is required for reliable
|
||||||
|
* 1Gbps communication using the KSZ9031RNX phy present on
|
||||||
|
* the Ebisu board, however, TX clock internal delay mode
|
||||||
|
* isn't supported on r8a77990. Thus, limit speed to
|
||||||
|
* 100Mbps for reliable communication.
|
||||||
|
*/
|
||||||
|
max-speed = <100>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -548,6 +553,11 @@
|
|||||||
function = "pwm5";
|
function = "pwm5";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
scif2_pins: scif2 {
|
||||||
|
groups = "scif2_data_a";
|
||||||
|
function = "scif2";
|
||||||
|
};
|
||||||
|
|
||||||
sdhi0_pins: sd0 {
|
sdhi0_pins: sd0 {
|
||||||
groups = "sdhi0_data4", "sdhi0_ctrl";
|
groups = "sdhi0_data4", "sdhi0_ctrl";
|
||||||
function = "sdhi0";
|
function = "sdhi0";
|
||||||
@ -578,20 +588,15 @@
|
|||||||
power-source = <1800>;
|
power-source = <1800>;
|
||||||
};
|
};
|
||||||
|
|
||||||
sound_pins: sound {
|
|
||||||
groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data";
|
|
||||||
function = "ssi";
|
|
||||||
};
|
|
||||||
|
|
||||||
sound_clk_pins: sound_clk {
|
sound_clk_pins: sound_clk {
|
||||||
groups = "audio_clk_a", "audio_clk_b_a", "audio_clk_c_a",
|
groups = "audio_clk_a", "audio_clk_b_a", "audio_clk_c_a",
|
||||||
"audio_clkout_a", "audio_clkout1_a";
|
"audio_clkout_a", "audio_clkout1_a";
|
||||||
function = "audio_clk";
|
function = "audio_clk";
|
||||||
};
|
};
|
||||||
|
|
||||||
scif2_pins: scif2 {
|
sound_pins: sound {
|
||||||
groups = "scif2_data_a";
|
groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data";
|
||||||
function = "scif2";
|
function = "ssi";
|
||||||
};
|
};
|
||||||
|
|
||||||
usb0_pins: usb {
|
usb0_pins: usb {
|
||||||
@ -629,7 +634,6 @@
|
|||||||
/* audio_clkout0/1/2/3 */
|
/* audio_clkout0/1/2/3 */
|
||||||
#clock-cells = <1>;
|
#clock-cells = <1>;
|
||||||
clock-frequency = <12288000 11289600>;
|
clock-frequency = <12288000 11289600>;
|
||||||
clkout-lr-synchronous;
|
|
||||||
|
|
||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
||||||
@ -672,38 +676,6 @@
|
|||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
&ssi1 {
|
|
||||||
shared-pin;
|
|
||||||
};
|
|
||||||
|
|
||||||
&usb2_phy0 {
|
|
||||||
pinctrl-0 = <&usb0_pins>;
|
|
||||||
pinctrl-names = "default";
|
|
||||||
|
|
||||||
vbus-supply = <&vbus0_usb2>;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&usb3_peri0 {
|
|
||||||
companion = <&xhci0>;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&vin4 {
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&vin5 {
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&xhci0 {
|
|
||||||
pinctrl-0 = <&usb30_pins>;
|
|
||||||
pinctrl-names = "default";
|
|
||||||
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|
||||||
&sdhi0 {
|
&sdhi0 {
|
||||||
pinctrl-0 = <&sdhi0_pins>;
|
pinctrl-0 = <&sdhi0_pins>;
|
||||||
pinctrl-1 = <&sdhi0_pins_uhs>;
|
pinctrl-1 = <&sdhi0_pins_uhs>;
|
||||||
@ -747,3 +719,35 @@
|
|||||||
non-removable;
|
non-removable;
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&ssi1 {
|
||||||
|
shared-pin;
|
||||||
|
};
|
||||||
|
|
||||||
|
&usb2_phy0 {
|
||||||
|
pinctrl-0 = <&usb0_pins>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
|
||||||
|
vbus-supply = <&vbus0_usb2>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&usb3_peri0 {
|
||||||
|
companion = <&xhci0>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&vin4 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&vin5 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&xhci0 {
|
||||||
|
pinctrl-0 = <&usb30_pins>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|||||||
@ -84,9 +84,11 @@
|
|||||||
compatible = "arm,cortex-a53";
|
compatible = "arm,cortex-a53";
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
device_type = "cpu";
|
device_type = "cpu";
|
||||||
|
#cooling-cells = <2>;
|
||||||
power-domains = <&sysc R8A77990_PD_CA53_CPU0>;
|
power-domains = <&sysc R8A77990_PD_CA53_CPU0>;
|
||||||
next-level-cache = <&L2_CA53>;
|
next-level-cache = <&L2_CA53>;
|
||||||
enable-method = "psci";
|
enable-method = "psci";
|
||||||
|
dynamic-power-coefficient = <277>;
|
||||||
clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
|
clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
|
||||||
operating-points-v2 = <&cluster1_opp>;
|
operating-points-v2 = <&cluster1_opp>;
|
||||||
};
|
};
|
||||||
@ -392,12 +394,12 @@
|
|||||||
#interrupt-cells = <2>;
|
#interrupt-cells = <2>;
|
||||||
interrupt-controller;
|
interrupt-controller;
|
||||||
reg = <0 0xe61c0000 0 0x200>;
|
reg = <0 0xe61c0000 0 0x200>;
|
||||||
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 407>;
|
clocks = <&cpg CPG_MOD 407>;
|
||||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 407>;
|
resets = <&cpg 407>;
|
||||||
@ -630,7 +632,7 @@
|
|||||||
<&usb_dmac1 0>, <&usb_dmac1 1>;
|
<&usb_dmac1 0>, <&usb_dmac1 1>;
|
||||||
dma-names = "ch0", "ch1", "ch2", "ch3";
|
dma-names = "ch0", "ch1", "ch2", "ch3";
|
||||||
renesas,buswait = <11>;
|
renesas,buswait = <11>;
|
||||||
phys = <&usb2_phy0>;
|
phys = <&usb2_phy0 3>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 704>, <&cpg 703>;
|
resets = <&cpg 704>, <&cpg 703>;
|
||||||
@ -641,8 +643,8 @@
|
|||||||
compatible = "renesas,r8a77990-usb-dmac",
|
compatible = "renesas,r8a77990-usb-dmac",
|
||||||
"renesas,usb-dmac";
|
"renesas,usb-dmac";
|
||||||
reg = <0 0xe65a0000 0 0x100>;
|
reg = <0 0xe65a0000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "ch0", "ch1";
|
interrupt-names = "ch0", "ch1";
|
||||||
clocks = <&cpg CPG_MOD 330>;
|
clocks = <&cpg CPG_MOD 330>;
|
||||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||||
@ -655,8 +657,8 @@
|
|||||||
compatible = "renesas,r8a77990-usb-dmac",
|
compatible = "renesas,r8a77990-usb-dmac",
|
||||||
"renesas,usb-dmac";
|
"renesas,usb-dmac";
|
||||||
reg = <0 0xe65b0000 0 0x100>;
|
reg = <0 0xe65b0000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "ch0", "ch1";
|
interrupt-names = "ch0", "ch1";
|
||||||
clocks = <&cpg CPG_MOD 331>;
|
clocks = <&cpg CPG_MOD 331>;
|
||||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||||
@ -669,23 +671,23 @@
|
|||||||
compatible = "renesas,dmac-r8a77990",
|
compatible = "renesas,dmac-r8a77990",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xe6700000 0 0x10000>;
|
reg = <0 0xe6700000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7",
|
"ch4", "ch5", "ch6", "ch7",
|
||||||
@ -711,23 +713,23 @@
|
|||||||
compatible = "renesas,dmac-r8a77990",
|
compatible = "renesas,dmac-r8a77990",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xe7300000 0 0x10000>;
|
reg = <0 0xe7300000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7",
|
"ch4", "ch5", "ch6", "ch7",
|
||||||
@ -753,23 +755,23 @@
|
|||||||
compatible = "renesas,dmac-r8a77990",
|
compatible = "renesas,dmac-r8a77990",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xe7310000 0 0x10000>;
|
reg = <0 0xe7310000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7",
|
"ch4", "ch5", "ch6", "ch7",
|
||||||
@ -1324,6 +1326,17 @@
|
|||||||
"ssi.1", "ssi.0";
|
"ssi.1", "ssi.0";
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
|
|
||||||
|
rcar_sound,ctu {
|
||||||
|
ctu00: ctu-0 { };
|
||||||
|
ctu01: ctu-1 { };
|
||||||
|
ctu02: ctu-2 { };
|
||||||
|
ctu03: ctu-3 { };
|
||||||
|
ctu10: ctu-4 { };
|
||||||
|
ctu11: ctu-5 { };
|
||||||
|
ctu12: ctu-6 { };
|
||||||
|
ctu13: ctu-7 { };
|
||||||
|
};
|
||||||
|
|
||||||
rcar_sound,dvc {
|
rcar_sound,dvc {
|
||||||
dvc0: dvc-0 {
|
dvc0: dvc-0 {
|
||||||
dmas = <&audma0 0xbc>;
|
dmas = <&audma0 0xbc>;
|
||||||
@ -1340,17 +1353,6 @@
|
|||||||
mix1: mix-1 { };
|
mix1: mix-1 { };
|
||||||
};
|
};
|
||||||
|
|
||||||
rcar_sound,ctu {
|
|
||||||
ctu00: ctu-0 { };
|
|
||||||
ctu01: ctu-1 { };
|
|
||||||
ctu02: ctu-2 { };
|
|
||||||
ctu03: ctu-3 { };
|
|
||||||
ctu10: ctu-4 { };
|
|
||||||
ctu11: ctu-5 { };
|
|
||||||
ctu12: ctu-6 { };
|
|
||||||
ctu13: ctu-7 { };
|
|
||||||
};
|
|
||||||
|
|
||||||
rcar_sound,src {
|
rcar_sound,src {
|
||||||
src0: src-0 {
|
src0: src-0 {
|
||||||
interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
@ -1472,23 +1474,23 @@
|
|||||||
compatible = "renesas,dmac-r8a77990",
|
compatible = "renesas,dmac-r8a77990",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xec700000 0 0x10000>;
|
reg = <0 0xec700000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7",
|
"ch4", "ch5", "ch6", "ch7",
|
||||||
@ -1537,7 +1539,7 @@
|
|||||||
reg = <0 0xee080000 0 0x100>;
|
reg = <0 0xee080000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||||
phys = <&usb2_phy0>;
|
phys = <&usb2_phy0 1>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 703>, <&cpg 704>;
|
resets = <&cpg 703>, <&cpg 704>;
|
||||||
@ -1549,7 +1551,7 @@
|
|||||||
reg = <0 0xee080100 0 0x100>;
|
reg = <0 0xee080100 0 0x100>;
|
||||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||||
phys = <&usb2_phy0>;
|
phys = <&usb2_phy0 2>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
companion = <&ohci0>;
|
companion = <&ohci0>;
|
||||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||||
@ -1565,7 +1567,7 @@
|
|||||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 703>, <&cpg 704>;
|
resets = <&cpg 703>, <&cpg 704>;
|
||||||
#phy-cells = <0>;
|
#phy-cells = <1>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -1578,6 +1580,7 @@
|
|||||||
max-frequency = <200000000>;
|
max-frequency = <200000000>;
|
||||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 314>;
|
resets = <&cpg 314>;
|
||||||
|
iommus = <&ipmmu_ds1 32>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -1590,6 +1593,7 @@
|
|||||||
max-frequency = <200000000>;
|
max-frequency = <200000000>;
|
||||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 313>;
|
resets = <&cpg 313>;
|
||||||
|
iommus = <&ipmmu_ds1 33>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -1602,6 +1606,7 @@
|
|||||||
max-frequency = <200000000>;
|
max-frequency = <200000000>;
|
||||||
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 311>;
|
resets = <&cpg 311>;
|
||||||
|
iommus = <&ipmmu_ds1 35>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -1630,10 +1635,10 @@
|
|||||||
#size-cells = <2>;
|
#size-cells = <2>;
|
||||||
bus-range = <0x00 0xff>;
|
bus-range = <0x00 0xff>;
|
||||||
device_type = "pci";
|
device_type = "pci";
|
||||||
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
|
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
|
||||||
0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
|
<0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
|
||||||
0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
|
<0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
|
||||||
0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
|
<0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
|
||||||
/* Map all possible DDR as inbound ranges */
|
/* Map all possible DDR as inbound ranges */
|
||||||
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
|
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
|
||||||
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
|
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
@ -1725,6 +1730,24 @@
|
|||||||
iommus = <&ipmmu_vi0 9>;
|
iommus = <&ipmmu_vi0 9>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
cmm0: cmm@fea40000 {
|
||||||
|
compatible = "renesas,r8a77990-cmm",
|
||||||
|
"renesas,rcar-gen3-cmm";
|
||||||
|
reg = <0 0xfea40000 0 0x1000>;
|
||||||
|
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||||
|
clocks = <&cpg CPG_MOD 711>;
|
||||||
|
resets = <&cpg 711>;
|
||||||
|
};
|
||||||
|
|
||||||
|
cmm1: cmm@fea50000 {
|
||||||
|
compatible = "renesas,r8a77990-cmm",
|
||||||
|
"renesas,rcar-gen3-cmm";
|
||||||
|
reg = <0 0xfea50000 0 0x1000>;
|
||||||
|
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
|
||||||
|
clocks = <&cpg CPG_MOD 710>;
|
||||||
|
resets = <&cpg 710>;
|
||||||
|
};
|
||||||
|
|
||||||
csi40: csi2@feaa0000 {
|
csi40: csi2@feaa0000 {
|
||||||
compatible = "renesas,r8a77990-csi2";
|
compatible = "renesas,r8a77990-csi2";
|
||||||
reg = <0 0xfeaa0000 0 0x10000>;
|
reg = <0 0xfeaa0000 0 0x10000>;
|
||||||
@ -1758,13 +1781,18 @@
|
|||||||
|
|
||||||
du: display@feb00000 {
|
du: display@feb00000 {
|
||||||
compatible = "renesas,du-r8a77990";
|
compatible = "renesas,du-r8a77990";
|
||||||
reg = <0 0xfeb00000 0 0x80000>;
|
reg = <0 0xfeb00000 0 0x40000>;
|
||||||
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
|
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 724>,
|
clocks = <&cpg CPG_MOD 724>,
|
||||||
<&cpg CPG_MOD 723>;
|
<&cpg CPG_MOD 723>;
|
||||||
clock-names = "du.0", "du.1";
|
clock-names = "du.0", "du.1";
|
||||||
vsps = <&vspd0 0 &vspd1 0>;
|
resets = <&cpg 724>;
|
||||||
|
reset-names = "du.0";
|
||||||
|
|
||||||
|
renesas,cmms = <&cmm0>, <&cmm1>;
|
||||||
|
vsps = <&vspd0 0>, <&vspd1 0>;
|
||||||
|
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
|
|
||||||
ports {
|
ports {
|
||||||
@ -1801,6 +1829,8 @@
|
|||||||
resets = <&cpg 727>;
|
resets = <&cpg 727>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
|
|
||||||
|
renesas,companion = <&lvds1>;
|
||||||
|
|
||||||
ports {
|
ports {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
@ -1856,18 +1886,30 @@
|
|||||||
thermal-zones {
|
thermal-zones {
|
||||||
cpu-thermal {
|
cpu-thermal {
|
||||||
polling-delay-passive = <250>;
|
polling-delay-passive = <250>;
|
||||||
polling-delay = <1000>;
|
polling-delay = <0>;
|
||||||
thermal-sensors = <&thermal>;
|
thermal-sensors = <&thermal 0>;
|
||||||
|
sustainable-power = <717>;
|
||||||
|
|
||||||
|
cooling-maps {
|
||||||
|
map0 {
|
||||||
|
trip = <&target>;
|
||||||
|
cooling-device = <&a53_0 0 2>;
|
||||||
|
contribution = <1024>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
trips {
|
trips {
|
||||||
cpu-crit {
|
sensor1_crit: sensor1-crit {
|
||||||
temperature = <120000>;
|
temperature = <120000>;
|
||||||
hysteresis = <2000>;
|
hysteresis = <2000>;
|
||||||
type = "critical";
|
type = "critical";
|
||||||
};
|
};
|
||||||
};
|
|
||||||
|
|
||||||
cooling-maps {
|
target: trip-point1 {
|
||||||
|
temperature = <100000>;
|
||||||
|
hysteresis = <2000>;
|
||||||
|
type = "passive";
|
||||||
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|||||||
@ -19,11 +19,6 @@
|
|||||||
ethernet0 = &avb;
|
ethernet0 = &avb;
|
||||||
};
|
};
|
||||||
|
|
||||||
chosen {
|
|
||||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
|
|
||||||
stdout-path = "serial0:115200n8";
|
|
||||||
};
|
|
||||||
|
|
||||||
backlight: backlight {
|
backlight: backlight {
|
||||||
compatible = "pwm-backlight";
|
compatible = "pwm-backlight";
|
||||||
pwms = <&pwm1 0 50000>;
|
pwms = <&pwm1 0 50000>;
|
||||||
@ -35,6 +30,11 @@
|
|||||||
enable-gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
|
enable-gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
|
||||||
|
stdout-path = "serial0:115200n8";
|
||||||
|
};
|
||||||
|
|
||||||
composite-in {
|
composite-in {
|
||||||
compatible = "composite-video-connector";
|
compatible = "composite-video-connector";
|
||||||
|
|
||||||
@ -97,7 +97,7 @@
|
|||||||
reg = <0x0 0x48000000 0x0 0x18000000>;
|
reg = <0x0 0x48000000 0x0 0x18000000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
reg_1p8v: regulator0 {
|
reg_1p8v: regulator-1p8v {
|
||||||
compatible = "regulator-fixed";
|
compatible = "regulator-fixed";
|
||||||
regulator-name = "fixed-1.8V";
|
regulator-name = "fixed-1.8V";
|
||||||
regulator-min-microvolt = <1800000>;
|
regulator-min-microvolt = <1800000>;
|
||||||
@ -106,7 +106,7 @@
|
|||||||
regulator-always-on;
|
regulator-always-on;
|
||||||
};
|
};
|
||||||
|
|
||||||
reg_3p3v: regulator1 {
|
reg_3p3v: regulator-3p3v {
|
||||||
compatible = "regulator-fixed";
|
compatible = "regulator-fixed";
|
||||||
regulator-name = "fixed-3.3V";
|
regulator-name = "fixed-3.3V";
|
||||||
regulator-min-microvolt = <3300000>;
|
regulator-min-microvolt = <3300000>;
|
||||||
@ -115,7 +115,7 @@
|
|||||||
regulator-always-on;
|
regulator-always-on;
|
||||||
};
|
};
|
||||||
|
|
||||||
reg_12p0v: regulator1 {
|
reg_12p0v: regulator-12p0v {
|
||||||
compatible = "regulator-fixed";
|
compatible = "regulator-fixed";
|
||||||
regulator-name = "D12.0V";
|
regulator-name = "D12.0V";
|
||||||
regulator-min-microvolt = <12000000>;
|
regulator-min-microvolt = <12000000>;
|
||||||
@ -175,6 +175,14 @@
|
|||||||
reg = <0>;
|
reg = <0>;
|
||||||
interrupt-parent = <&gpio5>;
|
interrupt-parent = <&gpio5>;
|
||||||
interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
|
interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
|
||||||
|
/*
|
||||||
|
* TX clock internal delay mode is required for reliable
|
||||||
|
* 1Gbps communication using the KSZ9031RNX phy present on
|
||||||
|
* the Draak board, however, TX clock internal delay mode
|
||||||
|
* isn't supported on r8a77995. Thus, limit speed to
|
||||||
|
* 100Mbps for reliable communication.
|
||||||
|
*/
|
||||||
|
max-speed = <100>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -511,12 +519,7 @@
|
|||||||
status = "okay";
|
status = "okay";
|
||||||
|
|
||||||
ports {
|
ports {
|
||||||
#address-cells = <1>;
|
port {
|
||||||
#size-cells = <0>;
|
|
||||||
|
|
||||||
port@0 {
|
|
||||||
reg = <0>;
|
|
||||||
|
|
||||||
vin4_in: endpoint {
|
vin4_in: endpoint {
|
||||||
remote-endpoint = <&adv7180_out>;
|
remote-endpoint = <&adv7180_out>;
|
||||||
};
|
};
|
||||||
|
|||||||
@ -231,52 +231,17 @@
|
|||||||
#interrupt-cells = <2>;
|
#interrupt-cells = <2>;
|
||||||
interrupt-controller;
|
interrupt-controller;
|
||||||
reg = <0 0xe61c0000 0 0x200>;
|
reg = <0 0xe61c0000 0 0x200>;
|
||||||
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 407>;
|
clocks = <&cpg CPG_MOD 407>;
|
||||||
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 407>;
|
resets = <&cpg 407>;
|
||||||
};
|
};
|
||||||
|
|
||||||
hscif0: serial@e6540000 {
|
|
||||||
compatible = "renesas,hscif-r8a77995",
|
|
||||||
"renesas,rcar-gen3-hscif",
|
|
||||||
"renesas,hscif";
|
|
||||||
reg = <0 0xe6540000 0 0x60>;
|
|
||||||
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
|
|
||||||
clocks = <&cpg CPG_MOD 520>,
|
|
||||||
<&cpg CPG_CORE R8A77995_CLK_S3D1C>,
|
|
||||||
<&scif_clk>;
|
|
||||||
clock-names = "fck", "brg_int", "scif_clk";
|
|
||||||
dmas = <&dmac1 0x31>, <&dmac1 0x30>,
|
|
||||||
<&dmac2 0x31>, <&dmac2 0x30>;
|
|
||||||
dma-names = "tx", "rx", "tx", "rx";
|
|
||||||
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
|
||||||
resets = <&cpg 520>;
|
|
||||||
status = "disabled";
|
|
||||||
};
|
|
||||||
|
|
||||||
hscif3: serial@e66a0000 {
|
|
||||||
compatible = "renesas,hscif-r8a77995",
|
|
||||||
"renesas,rcar-gen3-hscif",
|
|
||||||
"renesas,hscif";
|
|
||||||
reg = <0 0xe66a0000 0 0x60>;
|
|
||||||
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
|
|
||||||
clocks = <&cpg CPG_MOD 517>,
|
|
||||||
<&cpg CPG_CORE R8A77995_CLK_S3D1C>,
|
|
||||||
<&scif_clk>;
|
|
||||||
clock-names = "fck", "brg_int", "scif_clk";
|
|
||||||
dmas = <&dmac0 0x37>, <&dmac0 0x36>;
|
|
||||||
dma-names = "tx", "rx";
|
|
||||||
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
|
||||||
resets = <&cpg 517>;
|
|
||||||
status = "disabled";
|
|
||||||
};
|
|
||||||
|
|
||||||
i2c0: i2c@e6500000 {
|
i2c0: i2c@e6500000 {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
@ -344,6 +309,41 @@
|
|||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
hscif0: serial@e6540000 {
|
||||||
|
compatible = "renesas,hscif-r8a77995",
|
||||||
|
"renesas,rcar-gen3-hscif",
|
||||||
|
"renesas,hscif";
|
||||||
|
reg = <0 0xe6540000 0 0x60>;
|
||||||
|
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&cpg CPG_MOD 520>,
|
||||||
|
<&cpg CPG_CORE R8A77995_CLK_S3D1C>,
|
||||||
|
<&scif_clk>;
|
||||||
|
clock-names = "fck", "brg_int", "scif_clk";
|
||||||
|
dmas = <&dmac1 0x31>, <&dmac1 0x30>,
|
||||||
|
<&dmac2 0x31>, <&dmac2 0x30>;
|
||||||
|
dma-names = "tx", "rx", "tx", "rx";
|
||||||
|
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
||||||
|
resets = <&cpg 520>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
|
hscif3: serial@e66a0000 {
|
||||||
|
compatible = "renesas,hscif-r8a77995",
|
||||||
|
"renesas,rcar-gen3-hscif",
|
||||||
|
"renesas,hscif";
|
||||||
|
reg = <0 0xe66a0000 0 0x60>;
|
||||||
|
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&cpg CPG_MOD 517>,
|
||||||
|
<&cpg CPG_CORE R8A77995_CLK_S3D1C>,
|
||||||
|
<&scif_clk>;
|
||||||
|
clock-names = "fck", "brg_int", "scif_clk";
|
||||||
|
dmas = <&dmac0 0x37>, <&dmac0 0x36>;
|
||||||
|
dma-names = "tx", "rx";
|
||||||
|
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
||||||
|
resets = <&cpg 517>;
|
||||||
|
status = "disabled";
|
||||||
|
};
|
||||||
|
|
||||||
hsusb: usb@e6590000 {
|
hsusb: usb@e6590000 {
|
||||||
compatible = "renesas,usbhs-r8a77995",
|
compatible = "renesas,usbhs-r8a77995",
|
||||||
"renesas,rcar-gen3-usbhs";
|
"renesas,rcar-gen3-usbhs";
|
||||||
@ -354,7 +354,7 @@
|
|||||||
<&usb_dmac1 0>, <&usb_dmac1 1>;
|
<&usb_dmac1 0>, <&usb_dmac1 1>;
|
||||||
dma-names = "ch0", "ch1", "ch2", "ch3";
|
dma-names = "ch0", "ch1", "ch2", "ch3";
|
||||||
renesas,buswait = <11>;
|
renesas,buswait = <11>;
|
||||||
phys = <&usb2_phy0>;
|
phys = <&usb2_phy0 3>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 704>, <&cpg 703>;
|
resets = <&cpg 704>, <&cpg 703>;
|
||||||
@ -365,8 +365,8 @@
|
|||||||
compatible = "renesas,r8a77995-usb-dmac",
|
compatible = "renesas,r8a77995-usb-dmac",
|
||||||
"renesas,usb-dmac";
|
"renesas,usb-dmac";
|
||||||
reg = <0 0xe65a0000 0 0x100>;
|
reg = <0 0xe65a0000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "ch0", "ch1";
|
interrupt-names = "ch0", "ch1";
|
||||||
clocks = <&cpg CPG_MOD 330>;
|
clocks = <&cpg CPG_MOD 330>;
|
||||||
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
||||||
@ -379,8 +379,8 @@
|
|||||||
compatible = "renesas,r8a77995-usb-dmac",
|
compatible = "renesas,r8a77995-usb-dmac",
|
||||||
"renesas,usb-dmac";
|
"renesas,usb-dmac";
|
||||||
reg = <0 0xe65b0000 0 0x100>;
|
reg = <0 0xe65b0000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "ch0", "ch1";
|
interrupt-names = "ch0", "ch1";
|
||||||
clocks = <&cpg CPG_MOD 331>;
|
clocks = <&cpg CPG_MOD 331>;
|
||||||
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
||||||
@ -418,15 +418,15 @@
|
|||||||
compatible = "renesas,dmac-r8a77995",
|
compatible = "renesas,dmac-r8a77995",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xe6700000 0 0x10000>;
|
reg = <0 0xe6700000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7";
|
"ch4", "ch5", "ch6", "ch7";
|
||||||
@ -446,15 +446,15 @@
|
|||||||
compatible = "renesas,dmac-r8a77995",
|
compatible = "renesas,dmac-r8a77995",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xe7300000 0 0x10000>;
|
reg = <0 0xe7300000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7";
|
"ch4", "ch5", "ch6", "ch7";
|
||||||
@ -474,15 +474,15 @@
|
|||||||
compatible = "renesas,dmac-r8a77995",
|
compatible = "renesas,dmac-r8a77995",
|
||||||
"renesas,rcar-dmac";
|
"renesas,rcar-dmac";
|
||||||
reg = <0 0xe7310000 0 0x10000>;
|
reg = <0 0xe7310000 0 0x10000>;
|
||||||
interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
|
interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
|
<GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
interrupt-names = "error",
|
interrupt-names = "error",
|
||||||
"ch0", "ch1", "ch2", "ch3",
|
"ch0", "ch1", "ch2", "ch3",
|
||||||
"ch4", "ch5", "ch6", "ch7";
|
"ch4", "ch5", "ch6", "ch7";
|
||||||
@ -875,7 +875,7 @@
|
|||||||
reg = <0 0xee080000 0 0x100>;
|
reg = <0 0xee080000 0 0x100>;
|
||||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||||
phys = <&usb2_phy0>;
|
phys = <&usb2_phy0 1>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 703>, <&cpg 704>;
|
resets = <&cpg 703>, <&cpg 704>;
|
||||||
@ -887,7 +887,7 @@
|
|||||||
reg = <0 0xee080100 0 0x100>;
|
reg = <0 0xee080100 0 0x100>;
|
||||||
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||||
phys = <&usb2_phy0>;
|
phys = <&usb2_phy0 2>;
|
||||||
phy-names = "usb";
|
phy-names = "usb";
|
||||||
companion = <&ohci0>;
|
companion = <&ohci0>;
|
||||||
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
||||||
@ -903,7 +903,7 @@
|
|||||||
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
||||||
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 703>, <&cpg 704>;
|
resets = <&cpg 703>, <&cpg 704>;
|
||||||
#phy-cells = <0>;
|
#phy-cells = <1>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -916,6 +916,7 @@
|
|||||||
max-frequency = <200000000>;
|
max-frequency = <200000000>;
|
||||||
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
||||||
resets = <&cpg 312>;
|
resets = <&cpg 312>;
|
||||||
|
iommus = <&ipmmu_ds1 34>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -993,15 +994,38 @@
|
|||||||
iommus = <&ipmmu_vi0 9>;
|
iommus = <&ipmmu_vi0 9>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
cmm0: cmm@fea40000 {
|
||||||
|
compatible = "renesas,r8a77995-cmm",
|
||||||
|
"renesas,rcar-gen3-cmm";
|
||||||
|
reg = <0 0xfea40000 0 0x1000>;
|
||||||
|
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
||||||
|
clocks = <&cpg CPG_MOD 711>;
|
||||||
|
resets = <&cpg 711>;
|
||||||
|
};
|
||||||
|
|
||||||
|
cmm1: cmm@fea50000 {
|
||||||
|
compatible = "renesas,r8a77995-cmm",
|
||||||
|
"renesas,rcar-gen3-cmm";
|
||||||
|
reg = <0 0xfea50000 0 0x1000>;
|
||||||
|
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
|
||||||
|
clocks = <&cpg CPG_MOD 710>;
|
||||||
|
resets = <&cpg 710>;
|
||||||
|
};
|
||||||
|
|
||||||
du: display@feb00000 {
|
du: display@feb00000 {
|
||||||
compatible = "renesas,du-r8a77995";
|
compatible = "renesas,du-r8a77995";
|
||||||
reg = <0 0xfeb00000 0 0x80000>;
|
reg = <0 0xfeb00000 0 0x40000>;
|
||||||
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
|
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cpg CPG_MOD 724>,
|
clocks = <&cpg CPG_MOD 724>,
|
||||||
<&cpg CPG_MOD 723>;
|
<&cpg CPG_MOD 723>;
|
||||||
clock-names = "du.0", "du.1";
|
clock-names = "du.0", "du.1";
|
||||||
vsps = <&vspd0 0 &vspd1 0>;
|
resets = <&cpg 724>;
|
||||||
|
reset-names = "du.0";
|
||||||
|
|
||||||
|
renesas,cmms = <&cmm0>, <&cmm1>;
|
||||||
|
vsps = <&vspd0 0>, <&vspd1 0>;
|
||||||
|
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
|
|
||||||
ports {
|
ports {
|
||||||
@ -1038,6 +1062,8 @@
|
|||||||
resets = <&cpg 727>;
|
resets = <&cpg 727>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
|
|
||||||
|
renesas,companion = <&lvds1>;
|
||||||
|
|
||||||
ports {
|
ports {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
@ -1096,6 +1122,9 @@
|
|||||||
polling-delay = <1000>;
|
polling-delay = <1000>;
|
||||||
thermal-sensors = <&thermal>;
|
thermal-sensors = <&thermal>;
|
||||||
|
|
||||||
|
cooling-maps {
|
||||||
|
};
|
||||||
|
|
||||||
trips {
|
trips {
|
||||||
cpu-crit {
|
cpu-crit {
|
||||||
temperature = <120000>;
|
temperature = <120000>;
|
||||||
@ -1103,9 +1132,6 @@
|
|||||||
type = "critical";
|
type = "critical";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
cooling-maps {
|
|
||||||
};
|
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
@ -39,7 +39,7 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
chosen {
|
chosen {
|
||||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
|
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
|
||||||
stdout-path = "serial0:115200n8";
|
stdout-path = "serial0:115200n8";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -87,6 +87,28 @@
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
hdmi0-out {
|
||||||
|
compatible = "hdmi-connector";
|
||||||
|
label = "HDMI0 OUT";
|
||||||
|
type = "a";
|
||||||
|
|
||||||
|
port {
|
||||||
|
hdmi0_con: endpoint {
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
hdmi1-out {
|
||||||
|
compatible = "hdmi-connector";
|
||||||
|
label = "HDMI1 OUT";
|
||||||
|
type = "a";
|
||||||
|
|
||||||
|
port {
|
||||||
|
hdmi1_con: endpoint {
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
keys {
|
keys {
|
||||||
compatible = "gpio-keys";
|
compatible = "gpio-keys";
|
||||||
|
|
||||||
@ -210,8 +232,7 @@
|
|||||||
|
|
||||||
gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
|
gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
|
||||||
gpios-states = <1>;
|
gpios-states = <1>;
|
||||||
states = <3300000 1
|
states = <3300000 1>, <1800000 0>;
|
||||||
1800000 0>;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
vcc_sdhi3: regulator-vcc-sdhi3 {
|
vcc_sdhi3: regulator-vcc-sdhi3 {
|
||||||
@ -234,30 +255,7 @@
|
|||||||
|
|
||||||
gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
|
gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
|
||||||
gpios-states = <1>;
|
gpios-states = <1>;
|
||||||
states = <3300000 1
|
states = <3300000 1>, <1800000 0>;
|
||||||
1800000 0>;
|
|
||||||
};
|
|
||||||
|
|
||||||
hdmi0-out {
|
|
||||||
compatible = "hdmi-connector";
|
|
||||||
label = "HDMI0 OUT";
|
|
||||||
type = "a";
|
|
||||||
|
|
||||||
port {
|
|
||||||
hdmi0_con: endpoint {
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
|
||||||
|
|
||||||
hdmi1-out {
|
|
||||||
compatible = "hdmi-connector";
|
|
||||||
label = "HDMI1 OUT";
|
|
||||||
type = "a";
|
|
||||||
|
|
||||||
port {
|
|
||||||
hdmi1_con: endpoint {
|
|
||||||
};
|
|
||||||
};
|
|
||||||
};
|
};
|
||||||
|
|
||||||
vga {
|
vga {
|
||||||
@ -462,20 +460,6 @@
|
|||||||
#gpio-cells = <2>;
|
#gpio-cells = <2>;
|
||||||
};
|
};
|
||||||
|
|
||||||
csa_vdd: adc@7c {
|
|
||||||
compatible = "maxim,max9611";
|
|
||||||
reg = <0x7c>;
|
|
||||||
|
|
||||||
shunt-resistor-micro-ohms = <5000>;
|
|
||||||
};
|
|
||||||
|
|
||||||
csa_dvfs: adc@7f {
|
|
||||||
compatible = "maxim,max9611";
|
|
||||||
reg = <0x7f>;
|
|
||||||
|
|
||||||
shunt-resistor-micro-ohms = <5000>;
|
|
||||||
};
|
|
||||||
|
|
||||||
video-receiver@70 {
|
video-receiver@70 {
|
||||||
compatible = "adi,adv7482";
|
compatible = "adi,adv7482";
|
||||||
reg = <0x70 0x71 0x72 0x73 0x74 0x75
|
reg = <0x70 0x71 0x72 0x73 0x74 0x75
|
||||||
@ -527,6 +511,20 @@
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
csa_vdd: adc@7c {
|
||||||
|
compatible = "maxim,max9611";
|
||||||
|
reg = <0x7c>;
|
||||||
|
|
||||||
|
shunt-resistor-micro-ohms = <5000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
csa_dvfs: adc@7f {
|
||||||
|
compatible = "maxim,max9611";
|
||||||
|
reg = <0x7f>;
|
||||||
|
|
||||||
|
shunt-resistor-micro-ohms = <5000>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
&i2c_dvfs {
|
&i2c_dvfs {
|
||||||
|
|||||||
29
arch/arm/dts/salvator-xs.dtsi
Normal file
29
arch/arm/dts/salvator-xs.dtsi
Normal file
@ -0,0 +1,29 @@
|
|||||||
|
// SPDX-License-Identifier: GPL-2.0
|
||||||
|
/*
|
||||||
|
* Device Tree Source for the Salvator-X 2nd version board
|
||||||
|
*
|
||||||
|
* Copyright (C) 2015-2017 Renesas Electronics Corp.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "salvator-common.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Renesas Salvator-X 2nd version board";
|
||||||
|
compatible = "renesas,salvator-xs";
|
||||||
|
};
|
||||||
|
|
||||||
|
&extal_clk {
|
||||||
|
clock-frequency = <16640000>;
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c4 {
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
|
||||||
|
versaclock6: clock-generator@6a {
|
||||||
|
compatible = "idt,5p49v6901";
|
||||||
|
reg = <0x6a>;
|
||||||
|
#clock-cells = <1>;
|
||||||
|
clocks = <&x23_clk>;
|
||||||
|
clock-names = "xin";
|
||||||
|
};
|
||||||
|
};
|
||||||
@ -26,7 +26,7 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
chosen {
|
chosen {
|
||||||
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
|
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
|
||||||
stdout-path = "serial0:115200n8";
|
stdout-path = "serial0:115200n8";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -120,8 +120,7 @@
|
|||||||
|
|
||||||
gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
|
gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
|
||||||
gpios-states = <1>;
|
gpios-states = <1>;
|
||||||
states = <3300000 1
|
states = <3300000 1>, <1800000 0>;
|
||||||
1800000 0>;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
x12_clk: x12 {
|
x12_clk: x12 {
|
||||||
@ -428,6 +427,11 @@
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&rwdt {
|
||||||
|
timeout-sec = <60>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
&scif2 {
|
&scif2 {
|
||||||
pinctrl-0 = <&scif2_pins>;
|
pinctrl-0 = <&scif2_pins>;
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
@ -478,8 +482,3 @@
|
|||||||
|
|
||||||
status = "okay";
|
status = "okay";
|
||||||
};
|
};
|
||||||
|
|
||||||
&rwdt {
|
|
||||||
timeout-sec = <60>;
|
|
||||||
status = "okay";
|
|
||||||
};
|
|
||||||
|
|||||||
@ -93,11 +93,11 @@ int board_fit_config_name_match(const char *name)
|
|||||||
u32 cpu_type = rmobile_get_cpu_type();
|
u32 cpu_type = rmobile_get_cpu_type();
|
||||||
|
|
||||||
if ((cpu_type == RMOBILE_CPU_TYPE_R8A7795) &&
|
if ((cpu_type == RMOBILE_CPU_TYPE_R8A7795) &&
|
||||||
!strcmp(name, "r8a7795-salvator-x-u-boot"))
|
!strcmp(name, "r8a77950-salvator-x-u-boot"))
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
if ((cpu_type == RMOBILE_CPU_TYPE_R8A7796) &&
|
if ((cpu_type == RMOBILE_CPU_TYPE_R8A7796) &&
|
||||||
!strcmp(name, "r8a7796-salvator-x-u-boot"))
|
!strcmp(name, "r8a77960-salvator-x-u-boot"))
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
if ((cpu_type == RMOBILE_CPU_TYPE_R8A77965) &&
|
if ((cpu_type == RMOBILE_CPU_TYPE_R8A77965) &&
|
||||||
|
|||||||
@ -75,15 +75,15 @@ int board_fit_config_name_match(const char *name)
|
|||||||
u32 cpu_type = rmobile_get_cpu_type();
|
u32 cpu_type = rmobile_get_cpu_type();
|
||||||
|
|
||||||
if ((cpu_type == RMOBILE_CPU_TYPE_R8A7795) &&
|
if ((cpu_type == RMOBILE_CPU_TYPE_R8A7795) &&
|
||||||
!strcmp(name, "r8a7795-h3ulcb-u-boot"))
|
!strcmp(name, "r8a77950-ulcb-u-boot"))
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
if ((cpu_type == RMOBILE_CPU_TYPE_R8A7796) &&
|
if ((cpu_type == RMOBILE_CPU_TYPE_R8A7796) &&
|
||||||
!strcmp(name, "r8a7796-m3ulcb-u-boot"))
|
!strcmp(name, "r8a77960-ulcb-u-boot"))
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
if ((cpu_type == RMOBILE_CPU_TYPE_R8A77965) &&
|
if ((cpu_type == RMOBILE_CPU_TYPE_R8A77965) &&
|
||||||
!strcmp(name, "r8a77965-m3nulcb-u-boot"))
|
!strcmp(name, "r8a77965-ulcb-u-boot"))
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
return -1;
|
return -1;
|
||||||
|
|||||||
@ -13,7 +13,7 @@ CONFIG_FIT=y
|
|||||||
CONFIG_USE_BOOTARGS=y
|
CONFIG_USE_BOOTARGS=y
|
||||||
CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
|
CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
|
||||||
CONFIG_SUPPORT_RAW_INITRD=y
|
CONFIG_SUPPORT_RAW_INITRD=y
|
||||||
CONFIG_DEFAULT_FDT_FILE="r8a7795-salvator-x.dtb"
|
CONFIG_DEFAULT_FDT_FILE="r8a77950-salvator-x.dtb"
|
||||||
CONFIG_VERSION_VARIABLE=y
|
CONFIG_VERSION_VARIABLE=y
|
||||||
CONFIG_HUSH_PARSER=y
|
CONFIG_HUSH_PARSER=y
|
||||||
CONFIG_CMD_BOOTZ=y
|
CONFIG_CMD_BOOTZ=y
|
||||||
@ -31,8 +31,8 @@ CONFIG_CMD_EXT4_WRITE=y
|
|||||||
CONFIG_CMD_FAT=y
|
CONFIG_CMD_FAT=y
|
||||||
CONFIG_CMD_FS_GENERIC=y
|
CONFIG_CMD_FS_GENERIC=y
|
||||||
CONFIG_OF_CONTROL=y
|
CONFIG_OF_CONTROL=y
|
||||||
CONFIG_DEFAULT_DEVICE_TREE="r8a7795-salvator-x-u-boot"
|
CONFIG_DEFAULT_DEVICE_TREE="r8a77950-salvator-x-u-boot"
|
||||||
CONFIG_OF_LIST="r8a7795-salvator-x-u-boot r8a7796-salvator-x-u-boot r8a77965-salvator-x-u-boot"
|
CONFIG_OF_LIST="r8a77950-salvator-x-u-boot r8a77960-salvator-x-u-boot r8a77965-salvator-x-u-boot"
|
||||||
CONFIG_MULTI_DTB_FIT_LZO=y
|
CONFIG_MULTI_DTB_FIT_LZO=y
|
||||||
CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y
|
CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y
|
||||||
CONFIG_ENV_IS_IN_MMC=y
|
CONFIG_ENV_IS_IN_MMC=y
|
||||||
|
|||||||
@ -14,7 +14,7 @@ CONFIG_FIT=y
|
|||||||
CONFIG_USE_BOOTARGS=y
|
CONFIG_USE_BOOTARGS=y
|
||||||
CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
|
CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
|
||||||
CONFIG_SUPPORT_RAW_INITRD=y
|
CONFIG_SUPPORT_RAW_INITRD=y
|
||||||
CONFIG_DEFAULT_FDT_FILE="r8a7795-h3ulcb.dtb"
|
CONFIG_DEFAULT_FDT_FILE="r8a77950-ulcb.dtb"
|
||||||
CONFIG_VERSION_VARIABLE=y
|
CONFIG_VERSION_VARIABLE=y
|
||||||
CONFIG_HUSH_PARSER=y
|
CONFIG_HUSH_PARSER=y
|
||||||
CONFIG_CMD_BOOTZ=y
|
CONFIG_CMD_BOOTZ=y
|
||||||
@ -31,8 +31,8 @@ CONFIG_CMD_EXT4_WRITE=y
|
|||||||
CONFIG_CMD_FAT=y
|
CONFIG_CMD_FAT=y
|
||||||
CONFIG_CMD_FS_GENERIC=y
|
CONFIG_CMD_FS_GENERIC=y
|
||||||
CONFIG_OF_CONTROL=y
|
CONFIG_OF_CONTROL=y
|
||||||
CONFIG_DEFAULT_DEVICE_TREE="r8a7795-h3ulcb-u-boot"
|
CONFIG_DEFAULT_DEVICE_TREE="r8a77950-ulcb-u-boot"
|
||||||
CONFIG_OF_LIST="r8a7795-h3ulcb-u-boot r8a7796-m3ulcb-u-boot r8a77965-m3nulcb-u-boot"
|
CONFIG_OF_LIST="r8a77950-ulcb-u-boot r8a77960-ulcb-u-boot r8a77965-ulcb-u-boot"
|
||||||
CONFIG_MULTI_DTB_FIT_LZO=y
|
CONFIG_MULTI_DTB_FIT_LZO=y
|
||||||
CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y
|
CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y
|
||||||
CONFIG_ENV_IS_IN_MMC=y
|
CONFIG_ENV_IS_IN_MMC=y
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user