ipu_common: Let the MX6 IPU clock be calculated in run-time
MX6Q/QP IPU operates at 264MHz and MX6DL IPU at 198MHz. When running a SPL target, which supports multiple MX6 variants we cannot properly setup the IPU clock frequency via CONFIG_IPUV3_CLK option as such decision is done in build-time currently. Remove the CONFIG_IPUV3_CLK option and let the IPU clock frequency be configured in run-time on mx6. Reported-by: Eric Nelson <eric@nelint.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Eric Nelson <eric@nelint.com> Reviewed-by: Stefano Babic <sbabic@denx.de> [agust: fixed #endif in cgtqmx6eval.h] Signed-off-by: Anatolij Gustschin <agust@denx.de>
This commit is contained in:
parent
584f316f11
commit
c7430d7d5e
@ -19,6 +19,7 @@
|
||||
#include <linux/errno.h>
|
||||
#include <asm/arch/imx-regs.h>
|
||||
#include <asm/arch/crm_regs.h>
|
||||
#include <asm/arch/sys_proto.h>
|
||||
#include <div64.h>
|
||||
#include "ipu.h"
|
||||
#include "ipu_regs.h"
|
||||
@ -81,6 +82,11 @@ struct ipu_ch_param {
|
||||
|
||||
#define IPU_SW_RST_TOUT_USEC (10000)
|
||||
|
||||
#define IPUV3_CLK_MX51 133000000
|
||||
#define IPUV3_CLK_MX53 200000000
|
||||
#define IPUV3_CLK_MX6Q 264000000
|
||||
#define IPUV3_CLK_MX6DL 198000000
|
||||
|
||||
void clk_enable(struct clk *clk)
|
||||
{
|
||||
if (clk) {
|
||||
@ -196,7 +202,6 @@ static void clk_ipu_disable(struct clk *clk)
|
||||
|
||||
static struct clk ipu_clk = {
|
||||
.name = "ipu_clk",
|
||||
.rate = CONFIG_IPUV3_CLK,
|
||||
#if defined(CONFIG_MX51) || defined(CONFIG_MX53)
|
||||
.enable_reg = (u32 *)(CCM_BASE_ADDR +
|
||||
offsetof(struct mxc_ccm_reg, CCGR5)),
|
||||
@ -476,6 +481,13 @@ int ipu_probe(void)
|
||||
g_pixel_clk[1] = &pixel_clk[1];
|
||||
|
||||
g_ipu_clk = &ipu_clk;
|
||||
#if defined(CONFIG_MX51)
|
||||
g_ipu_clk->rate = IPUV3_CLK_MX51;
|
||||
#elif defined(CONFIG_MX53)
|
||||
g_ipu_clk->rate = IPUV3_CLK_MX53;
|
||||
#else
|
||||
g_ipu_clk->rate = is_mx6sdl() ? IPUV3_CLK_MX6DL : IPUV3_CLK_MX6Q;
|
||||
#endif
|
||||
debug("ipu_clk = %u\n", clk_get_rate(g_ipu_clk));
|
||||
g_ldb_clk = &ldb_clk;
|
||||
debug("ldb_clk = %u\n", clk_get_rate(g_ldb_clk));
|
||||
|
@ -253,7 +253,6 @@
|
||||
#define CONFIG_BMP_16BPP
|
||||
#define CONFIG_VIDEO_LOGO
|
||||
#define CONFIG_VIDEO_BMP_LOGO
|
||||
#define CONFIG_IPUV3_CLK 260000000
|
||||
#define CONFIG_IMX_HDMI
|
||||
#define CONFIG_IMX_VIDEO_SKIP
|
||||
#endif
|
||||
|
@ -117,7 +117,6 @@
|
||||
#define CONFIG_BMP_16BPP
|
||||
#define CONFIG_VIDEO_LOGO
|
||||
#define CONFIG_VIDEO_BMP_LOGO
|
||||
#define CONFIG_IPUV3_CLK 260000000
|
||||
#define CONFIG_CONSOLE_MUX
|
||||
#define CONFIG_IMX_HDMI
|
||||
#define CONFIG_IMX_VIDEO_SKIP
|
||||
|
@ -214,7 +214,6 @@
|
||||
#define CONFIG_BMP_16BPP
|
||||
#define CONFIG_VIDEO_LOGO
|
||||
#define CONFIG_VIDEO_BMP_LOGO
|
||||
#define CONFIG_IPUV3_CLK 198000000
|
||||
#define CONFIG_IMX_VIDEO_SKIP
|
||||
|
||||
#define CONFIG_PWM_IMX
|
||||
|
@ -78,11 +78,6 @@
|
||||
#define CONFIG_BMP_16BPP
|
||||
#define CONFIG_VIDEO_LOGO
|
||||
#define CONFIG_VIDEO_BMP_LOGO
|
||||
#ifdef CONFIG_MX6DL
|
||||
#define CONFIG_IPUV3_CLK 198000000
|
||||
#else
|
||||
#define CONFIG_IPUV3_CLK 264000000
|
||||
#endif
|
||||
#define CONFIG_IMX_HDMI
|
||||
|
||||
/* SATA */
|
||||
|
@ -236,7 +236,6 @@
|
||||
|
||||
/* Display */
|
||||
#define CONFIG_VIDEO_IPUV3
|
||||
#define CONFIG_IPUV3_CLK 260000000
|
||||
#define CONFIG_IMX_HDMI
|
||||
|
||||
#define CONFIG_SPLASH_SCREEN
|
||||
|
@ -103,7 +103,6 @@
|
||||
#define CONFIG_BMP_16BPP
|
||||
#define CONFIG_VIDEO_LOGO
|
||||
#define CONFIG_VIDEO_BMP_LOGO
|
||||
#define CONFIG_IPUV3_CLK 260000000
|
||||
#define CONFIG_CONSOLE_MUX
|
||||
#define CONFIG_IMX_HDMI
|
||||
#define CONFIG_IMX_VIDEO_SKIP
|
||||
|
@ -108,7 +108,6 @@
|
||||
#define CONFIG_BMP_16BPP
|
||||
#define CONFIG_VIDEO_LOGO
|
||||
#define CONFIG_VIDEO_BMP_LOGO
|
||||
#define CONFIG_IPUV3_CLK 260000000
|
||||
#define CONFIG_IMX_HDMI
|
||||
#define CONFIG_IMX_VIDEO_SKIP
|
||||
|
||||
|
@ -277,7 +277,6 @@
|
||||
#define CONFIG_BMP_16BPP
|
||||
#define CONFIG_VIDEO_LOGO
|
||||
#define CONFIG_VIDEO_BMP_LOGO
|
||||
#define CONFIG_IPUV3_CLK 260000000
|
||||
#define CONFIG_IMX_HDMI
|
||||
#define CONFIG_IMX_VIDEO_SKIP
|
||||
#endif
|
||||
|
@ -156,7 +156,6 @@
|
||||
/* Framebuffer and LCD */
|
||||
#define CONFIG_VIDEO_IPUV3
|
||||
#define CONFIG_VIDEO_LOGO
|
||||
#define CONFIG_IPUV3_CLK 260000000
|
||||
#define CONFIG_IMX_HDMI
|
||||
#define CONFIG_IMX_VIDEO_SKIP
|
||||
#define CONFIG_VIDEO_BMP_LOGO
|
||||
|
@ -199,7 +199,6 @@
|
||||
|
||||
/* Framebuffer */
|
||||
#ifdef CONFIG_VIDEO_IPUV3
|
||||
# define CONFIG_IPUV3_CLK 260000000
|
||||
# define CONFIG_IMX_VIDEO_SKIP
|
||||
|
||||
# define CONFIG_SPLASH_SCREEN
|
||||
|
@ -172,7 +172,6 @@
|
||||
#define CONFIG_BMP_16BPP
|
||||
#define CONFIG_VIDEO_LOGO
|
||||
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
|
||||
#define CONFIG_IPUV3_CLK 200000000
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
@ -84,7 +84,6 @@
|
||||
#define CONFIG_SPLASH_SCREEN
|
||||
#define CONFIG_BMP_16BPP
|
||||
#define CONFIG_VIDEO_LOGO
|
||||
#define CONFIG_IPUV3_CLK 133000000
|
||||
|
||||
/* allow to overwrite serial and ethaddr */
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
|
@ -179,6 +179,5 @@
|
||||
#define CONFIG_SPLASH_SCREEN
|
||||
#define CONFIG_BMP_16BPP
|
||||
#define CONFIG_VIDEO_LOGO
|
||||
#define CONFIG_IPUV3_CLK 200000000
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
@ -197,6 +197,5 @@
|
||||
#define CONFIG_SPLASH_SCREEN
|
||||
#define CONFIG_BMP_16BPP
|
||||
#define CONFIG_VIDEO_LOGO
|
||||
#define CONFIG_IPUV3_CLK 200000000
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
@ -41,7 +41,6 @@
|
||||
|
||||
/* Framebuffer */
|
||||
#define CONFIG_VIDEO_IPUV3
|
||||
#define CONFIG_IPUV3_CLK 260000000
|
||||
#define CONFIG_VIDEO_BMP_RLE8
|
||||
#define CONFIG_SPLASH_SCREEN
|
||||
#define CONFIG_SPLASH_SCREEN_ALIGN
|
||||
|
@ -205,11 +205,6 @@
|
||||
#define CONFIG_BMP_16BPP
|
||||
#define CONFIG_VIDEO_LOGO
|
||||
#define CONFIG_VIDEO_BMP_LOGO
|
||||
#ifdef CONFIG_MX6DL
|
||||
#define CONFIG_IPUV3_CLK 198000000
|
||||
#else
|
||||
#define CONFIG_IPUV3_CLK 264000000
|
||||
#endif
|
||||
#define CONFIG_IMX_HDMI
|
||||
#define CONFIG_IMX_VIDEO_SKIP
|
||||
|
||||
|
@ -80,7 +80,6 @@
|
||||
#define CONFIG_VIDEO_BMP_GZIP
|
||||
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024)
|
||||
#define CONFIG_BMP_16BPP
|
||||
#define CONFIG_IPUV3_CLK 260000000
|
||||
#define CONFIG_IMX_HDMI
|
||||
#define CONFIG_IMX_VIDEO_SKIP
|
||||
|
||||
|
@ -141,7 +141,6 @@
|
||||
#define CONFIG_SPLASH_SCREEN
|
||||
#define CONFIG_BMP_16BPP
|
||||
#define CONFIG_VIDEO_LOGO
|
||||
#define CONFIG_IPUV3_CLK 260000000
|
||||
#define CONFIG_IMX_HDMI
|
||||
#define CONFIG_IMX_VIDEO_SKIP
|
||||
#endif
|
||||
|
@ -64,7 +64,6 @@
|
||||
/* Framebuffer */
|
||||
#ifdef CONFIG_VIDEO
|
||||
#define CONFIG_VIDEO_IPUV3
|
||||
#define CONFIG_IPUV3_CLK 260000000
|
||||
#define CONFIG_VIDEO_BMP_RLE8
|
||||
#define CONFIG_IMX_HDMI
|
||||
#define CONFIG_IMX_VIDEO_SKIP
|
||||
|
@ -71,7 +71,6 @@
|
||||
#define CONFIG_BMP_16BPP
|
||||
#define CONFIG_VIDEO_LOGO
|
||||
#define CONFIG_VIDEO_BMP_LOGO
|
||||
#define CONFIG_IPUV3_CLK 260000000
|
||||
#define CONFIG_IMX_HDMI
|
||||
#define CONFIG_IMX_VIDEO_SKIP
|
||||
#endif
|
||||
|
@ -1119,7 +1119,6 @@ CONFIG_IPAM390_GPIO_BOOTMODE
|
||||
CONFIG_IPAM390_GPIO_LED_GREEN
|
||||
CONFIG_IPAM390_GPIO_LED_RED
|
||||
CONFIG_IPROC
|
||||
CONFIG_IPUV3_CLK
|
||||
CONFIG_IP_DEFRAG
|
||||
CONFIG_IRAM_BASE
|
||||
CONFIG_IRAM_END
|
||||
|
Loading…
Reference in New Issue
Block a user